2018-10-10 14:26:48 +03:00
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
crypto: caam/qi - add ablkcipher and authenc algorithms
Add support to submit ablkcipher and authenc algorithms
via the QI backend:
-ablkcipher:
cbc({aes,des,des3_ede})
ctr(aes), rfc3686(ctr(aes))
xts(aes)
-authenc:
authenc(hmac(md5),cbc({aes,des,des3_ede}))
authenc(hmac(sha*),cbc({aes,des,des3_ede}))
caam/qi being a new driver, let's wait some time to settle down without
interfering with existing caam/jr driver.
Accordingly, for now all caam/qi algorithms (caamalg_qi module) are
marked to be of lower priority than caam/jr ones (caamalg module).
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-03-17 12:06:02 +02:00
/*
* Copyright 2013 - 2016 Freescale Semiconductor , Inc .
* Copyright 2016 - 2017 NXP
*/
# ifndef __SG_SW_QM_H
# define __SG_SW_QM_H
# include <soc/fsl/qman.h>
# include "regs.h"
static inline void __dma_to_qm_sg ( struct qm_sg_entry * qm_sg_ptr , dma_addr_t dma ,
u16 offset )
{
qm_sg_entry_set64 ( qm_sg_ptr , dma ) ;
qm_sg_ptr - > __reserved2 = 0 ;
qm_sg_ptr - > bpid = 0 ;
qm_sg_ptr - > offset = cpu_to_be16 ( offset & QM_SG_OFF_MASK ) ;
}
static inline void dma_to_qm_sg_one ( struct qm_sg_entry * qm_sg_ptr ,
dma_addr_t dma , u32 len , u16 offset )
{
__dma_to_qm_sg ( qm_sg_ptr , dma , offset ) ;
qm_sg_entry_set_len ( qm_sg_ptr , len ) ;
}
static inline void dma_to_qm_sg_one_last ( struct qm_sg_entry * qm_sg_ptr ,
dma_addr_t dma , u32 len , u16 offset )
{
__dma_to_qm_sg ( qm_sg_ptr , dma , offset ) ;
qm_sg_entry_set_f ( qm_sg_ptr , len ) ;
}
static inline void dma_to_qm_sg_one_ext ( struct qm_sg_entry * qm_sg_ptr ,
dma_addr_t dma , u32 len , u16 offset )
{
__dma_to_qm_sg ( qm_sg_ptr , dma , offset ) ;
qm_sg_ptr - > cfg = cpu_to_be32 ( QM_SG_EXT | ( len & QM_SG_LEN_MASK ) ) ;
}
static inline void dma_to_qm_sg_one_last_ext ( struct qm_sg_entry * qm_sg_ptr ,
dma_addr_t dma , u32 len ,
u16 offset )
{
__dma_to_qm_sg ( qm_sg_ptr , dma , offset ) ;
qm_sg_ptr - > cfg = cpu_to_be32 ( QM_SG_EXT | QM_SG_FIN |
( len & QM_SG_LEN_MASK ) ) ;
}
/*
* convert scatterlist to h / w link table format
* but does not have final bit ; instead , returns last entry
*/
static inline struct qm_sg_entry *
2019-06-10 16:30:58 +03:00
sg_to_qm_sg ( struct scatterlist * sg , int len ,
crypto: caam/qi - add ablkcipher and authenc algorithms
Add support to submit ablkcipher and authenc algorithms
via the QI backend:
-ablkcipher:
cbc({aes,des,des3_ede})
ctr(aes), rfc3686(ctr(aes))
xts(aes)
-authenc:
authenc(hmac(md5),cbc({aes,des,des3_ede}))
authenc(hmac(sha*),cbc({aes,des,des3_ede}))
caam/qi being a new driver, let's wait some time to settle down without
interfering with existing caam/jr driver.
Accordingly, for now all caam/qi algorithms (caamalg_qi module) are
marked to be of lower priority than caam/jr ones (caamalg module).
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-03-17 12:06:02 +02:00
struct qm_sg_entry * qm_sg_ptr , u16 offset )
{
2019-06-10 16:30:58 +03:00
int ent_len ;
while ( len ) {
ent_len = min_t ( int , sg_dma_len ( sg ) , len ) ;
dma_to_qm_sg_one ( qm_sg_ptr , sg_dma_address ( sg ) , ent_len ,
offset ) ;
crypto: caam/qi - add ablkcipher and authenc algorithms
Add support to submit ablkcipher and authenc algorithms
via the QI backend:
-ablkcipher:
cbc({aes,des,des3_ede})
ctr(aes), rfc3686(ctr(aes))
xts(aes)
-authenc:
authenc(hmac(md5),cbc({aes,des,des3_ede}))
authenc(hmac(sha*),cbc({aes,des,des3_ede}))
caam/qi being a new driver, let's wait some time to settle down without
interfering with existing caam/jr driver.
Accordingly, for now all caam/qi algorithms (caamalg_qi module) are
marked to be of lower priority than caam/jr ones (caamalg module).
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-03-17 12:06:02 +02:00
qm_sg_ptr + + ;
sg = sg_next ( sg ) ;
2019-06-10 16:30:58 +03:00
len - = ent_len ;
crypto: caam/qi - add ablkcipher and authenc algorithms
Add support to submit ablkcipher and authenc algorithms
via the QI backend:
-ablkcipher:
cbc({aes,des,des3_ede})
ctr(aes), rfc3686(ctr(aes))
xts(aes)
-authenc:
authenc(hmac(md5),cbc({aes,des,des3_ede}))
authenc(hmac(sha*),cbc({aes,des,des3_ede}))
caam/qi being a new driver, let's wait some time to settle down without
interfering with existing caam/jr driver.
Accordingly, for now all caam/qi algorithms (caamalg_qi module) are
marked to be of lower priority than caam/jr ones (caamalg module).
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-03-17 12:06:02 +02:00
}
return qm_sg_ptr - 1 ;
}
/*
* convert scatterlist to h / w link table format
* scatterlist must have been previously dma mapped
*/
2019-06-10 16:30:58 +03:00
static inline void sg_to_qm_sg_last ( struct scatterlist * sg , int len ,
crypto: caam/qi - add ablkcipher and authenc algorithms
Add support to submit ablkcipher and authenc algorithms
via the QI backend:
-ablkcipher:
cbc({aes,des,des3_ede})
ctr(aes), rfc3686(ctr(aes))
xts(aes)
-authenc:
authenc(hmac(md5),cbc({aes,des,des3_ede}))
authenc(hmac(sha*),cbc({aes,des,des3_ede}))
caam/qi being a new driver, let's wait some time to settle down without
interfering with existing caam/jr driver.
Accordingly, for now all caam/qi algorithms (caamalg_qi module) are
marked to be of lower priority than caam/jr ones (caamalg module).
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-03-17 12:06:02 +02:00
struct qm_sg_entry * qm_sg_ptr , u16 offset )
{
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qm_sg_ptr = sg_to_qm_sg ( sg , len , qm_sg_ptr , offset ) ;
crypto: caam/qi - add ablkcipher and authenc algorithms
Add support to submit ablkcipher and authenc algorithms
via the QI backend:
-ablkcipher:
cbc({aes,des,des3_ede})
ctr(aes), rfc3686(ctr(aes))
xts(aes)
-authenc:
authenc(hmac(md5),cbc({aes,des,des3_ede}))
authenc(hmac(sha*),cbc({aes,des,des3_ede}))
caam/qi being a new driver, let's wait some time to settle down without
interfering with existing caam/jr driver.
Accordingly, for now all caam/qi algorithms (caamalg_qi module) are
marked to be of lower priority than caam/jr ones (caamalg module).
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-03-17 12:06:02 +02:00
qm_sg_entry_set_f ( qm_sg_ptr , qm_sg_entry_get_len ( qm_sg_ptr ) ) ;
}
# endif /* __SG_SW_QM_H */