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linux/arch/mips/include/asm/stackframe.h

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Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1994, 95, 96, 99, 2001 Ralf Baechle
* Copyright (C) 1994, 1995, 1996 Paul M. Antoine.
* Copyright (C) 1999 Silicon Graphics, Inc.
[MIPS] R4000/R4400 daddiu erratum workaround This complements the generic R4000/R4400 errata workaround code and adds bits for the daddiu problem. In most places it just modifies handwritten assembly code so that the assembler is allowed to use a temporary register as daddiu may now be treated as a macro that expands to a sequence of li and daddu. It is the AT register or, where AT is unavailable or used explicitly for another purpose, an explicitly-named register is selected, using the .set at=<reg> feature added recently to gas. This feature is only used if CONFIG_CPU_DADDI_WORKAROUNDS has been set, so if the workaround remains disabled, the required version of binutils stays unchanged. Similarly, daddiu instructions put in branch delay slots in noreorder fragments are now taken out of them and the assembler is allowed to reorder them itself as possible (which it does making the whole idea of scheduling them into delay slots manually questionable). Also in the very few places where such a simple conversion was not possible, a handcoded longer sequence is implemented. Other than that there are changes to code responsible for building the TLB fault and page clear/copy handlers to avoid daddiu as appropriate. These are only effective if the erratum is verified to be present at the run time. Finally there is a trivial update to __delay(), because it uses daddiu in a branch delay slot. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-23 15:43:25 +04:00
* Copyright (C) 2007 Maciej W. Rozycki
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
*/
#ifndef _ASM_STACKFRAME_H
#define _ASM_STACKFRAME_H
#include <linux/threads.h>
#include <asm/asm.h>
[MIPS] MT: Improved multithreading support. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-05 12:45:45 +04:00
#include <asm/asmmacro.h>
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
#include <asm/mipsregs.h>
kbuild: mips use generic asm-offsets.h support Removed obsolete stuff from arch makefile. mips had a special rule for generating asm-offsets.h so preserved it using an architecture specific hook in top-level Kbuild file. Renamed .h file to asm-offsets.h Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2005-09-10 00:32:31 +04:00
#include <asm/asm-offsets.h>
MIPS: Move definition of SMP processor id register to header file The definition of the CP0 register used to save the smp processor id is repicated in many files, move them all to thread_info.h. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5708/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-11 15:40:16 +04:00
#include <asm/thread_info.h>
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
MIPS: MT: Remove SMTC support Nobody is maintaining SMTC anymore and there also seems to be no userbase. Which is a pity - the SMTC technology primarily developed by Kevin D. Kissell <kevink@paralogos.com> is an ingenious demonstration for the MT ASE's power and elegance. Based on Markos Chandras <Markos.Chandras@imgtec.com> patch https://patchwork.linux-mips.org/patch/6719/ which while very similar did no longer apply cleanly when I tried to merge it plus some additional post-SMTC cleanup - SMTC was a feature as tricky to remove as it was to merge once upon a time. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 18:29:44 +04:00
#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
[MIPS] Fix KMODE for the R3000 This must be the oldest bug that we have got. Leaving interrupts "as they are" for the R3000 obviously means copying IEp to IEc. Since we have got STATMASK now, I took this opportunity to mask the status register "correctly" for the R3000 now too. Oh, and the R3000 hardly ever is 64-bit. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-21 16:47:22 +04:00
#define STATMASK 0x3f
#else
#define STATMASK 0x1f
#endif
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
.macro SAVE_AT
.set push
.set noat
LONG_S $1, PT_R1(sp)
.set pop
.endm
.macro SAVE_TEMP
[MIPS] Add basic SMARTMIPS ASE support This patch adds trivial support for SMARTMIPS extension. This extension is currently implemented by 4KS[CD] CPUs. Basically it saves/restores ACX register, which is part of the SMARTMIPS ASE, when needed. This patch does *not* add any support for Smartmips MMU features. Futhermore this patch does not add explicit support for 4KS[CD] CPUs since they are respectively mips32 and mips32r2 compliant. So with the current processor configuration, a platform that has such CPUs needs to select both configs: CPU_HAS_SMARTMIPS SYS_HAS_CPU_MIPS32_R[12] This is due to the processor configuration which is mixing up all the architecture variants and the processor types. The drawback of this, is that we currently pass '-march=mips32' option to gcc when building a kernel instead of '-march=4ksc' for 4KSC case. This can lead to a kernel image a little bit bigger than required. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-02 19:41:47 +03:00
#ifdef CONFIG_CPU_HAS_SMARTMIPS
mflhxu v1
LONG_S v1, PT_LO(sp)
mflhxu v1
LONG_S v1, PT_HI(sp)
mflhxu v1
LONG_S v1, PT_ACX(sp)
MIPS: asm: stackframe: Do not preserve the HI/LO registers on MIPS R6 The HI/LO registers have been removed from MIPS R6. Instructions such as MULT and DIV have been replaced with a new pair of instructions for the HI/LO operations for example: MULT -> MUL, MUH DIV -> DIV, MOD So we avoid preserving the pre-R6 HI/LO registers in MIPS R6 Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2014-10-27 14:37:47 +03:00
#elif !defined(CONFIG_CPU_MIPSR6)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
mfhi v1
[MIPS] Add basic SMARTMIPS ASE support This patch adds trivial support for SMARTMIPS extension. This extension is currently implemented by 4KS[CD] CPUs. Basically it saves/restores ACX register, which is part of the SMARTMIPS ASE, when needed. This patch does *not* add any support for Smartmips MMU features. Futhermore this patch does not add explicit support for 4KS[CD] CPUs since they are respectively mips32 and mips32r2 compliant. So with the current processor configuration, a platform that has such CPUs needs to select both configs: CPU_HAS_SMARTMIPS SYS_HAS_CPU_MIPS32_R[12] This is due to the processor configuration which is mixing up all the architecture variants and the processor types. The drawback of this, is that we currently pass '-march=mips32' option to gcc when building a kernel instead of '-march=4ksc' for 4KSC case. This can lead to a kernel image a little bit bigger than required. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-02 19:41:47 +03:00
#endif
[PATCH] mips: clean up 32/64-bit configuration Start cleaning 32-bit vs. 64-bit configuration. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-04 02:56:16 +04:00
#ifdef CONFIG_32BIT
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
LONG_S $8, PT_R8(sp)
LONG_S $9, PT_R9(sp)
#endif
LONG_S $10, PT_R10(sp)
LONG_S $11, PT_R11(sp)
LONG_S $12, PT_R12(sp)
MIPS: asm: stackframe: Do not preserve the HI/LO registers on MIPS R6 The HI/LO registers have been removed from MIPS R6. Instructions such as MULT and DIV have been replaced with a new pair of instructions for the HI/LO operations for example: MULT -> MUL, MUH DIV -> DIV, MOD So we avoid preserving the pre-R6 HI/LO registers in MIPS R6 Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2014-10-27 14:37:47 +03:00
#if !defined(CONFIG_CPU_HAS_SMARTMIPS) && !defined(CONFIG_CPU_MIPSR6)
MIPS: Reorder operations in stackframe.h for better scheduling Reorder PT ops to avoid pipeline stalls. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-26 20:01:43 +04:00
LONG_S v1, PT_HI(sp)
mflo v1
#endif
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
LONG_S $13, PT_R13(sp)
LONG_S $14, PT_R14(sp)
LONG_S $15, PT_R15(sp)
LONG_S $24, PT_R24(sp)
MIPS: asm: stackframe: Do not preserve the HI/LO registers on MIPS R6 The HI/LO registers have been removed from MIPS R6. Instructions such as MULT and DIV have been replaced with a new pair of instructions for the HI/LO operations for example: MULT -> MUL, MUH DIV -> DIV, MOD So we avoid preserving the pre-R6 HI/LO registers in MIPS R6 Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2014-10-27 14:37:47 +03:00
#if !defined(CONFIG_CPU_HAS_SMARTMIPS) && !defined(CONFIG_CPU_MIPSR6)
MIPS: Reorder operations in stackframe.h for better scheduling Reorder PT ops to avoid pipeline stalls. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-26 20:01:43 +04:00
LONG_S v1, PT_LO(sp)
MIPS: Don't save/restore OCTEON wide multiplier state on syscalls. The ABI allows these to be clobbered on syscalls, so only save and restore the multiplier state when the temporary registers need to be preserved. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/5540/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-22 01:14:53 +04:00
#endif
#ifdef CONFIG_CPU_CAVIUM_OCTEON
/*
* The Octeon multiplier state is affected by general
* multiply instructions. It must be saved before and
* kernel code might corrupt it
*/
jal octeon_mult_save
MIPS: Reorder operations in stackframe.h for better scheduling Reorder PT ops to avoid pipeline stalls. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-26 20:01:43 +04:00
#endif
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
.endm
.macro SAVE_STATIC
LONG_S $16, PT_R16(sp)
LONG_S $17, PT_R17(sp)
LONG_S $18, PT_R18(sp)
LONG_S $19, PT_R19(sp)
LONG_S $20, PT_R20(sp)
LONG_S $21, PT_R21(sp)
LONG_S $22, PT_R22(sp)
LONG_S $23, PT_R23(sp)
LONG_S $30, PT_R30(sp)
.endm
#ifdef CONFIG_SMP
[MIPS] Optimize and cleanup get_saved_sp, set_saved_sp If CONFIG_BUILD_ELF64 was not selected and gcc had -msym32 option (i.e. 4.0 or newer), there is no point to use %highest, %higher for kernel symbols. This patch also fixes 64-bit SMTC version of get_saved_sp() which is broken but harmless since there is no such CPUs for now. A bonus is set_saved_sp() and SMP version of get_saved_sp() are more readable now. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-10 17:46:52 +04:00
.macro get_saved_sp /* SMP variation */
MIPS: Move definition of SMP processor id register to header file The definition of the CP0 register used to save the smp processor id is repicated in many files, move them all to thread_info.h. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5708/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-11 15:40:16 +04:00
ASM_CPUID_MFC0 k0, ASM_SMP_CPUID_REG
[MIPS] Rename CONFIG_BUILD_ELF64 into KBUILD_64BIT_SYM32 This patch renames it for 3 reasons: - "CONFIG" pattern is used by Kconfig. Now this macro is no more defined by Kconfig but by Kbuild itself make this clear by translating "CONFIG" into "KBUILD". - "ELF32" word is improper because it is irrelevant to ELF format and it makes confusion with CONFIG_BOOT_ELF32. So translate it with SYM32. - Add "64BIT" part to make clear that this macro implies a 64 bits kernel. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-15 16:21:36 +03:00
#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
lui k1, %hi(kernelsp)
#else
[MIPS] Optimize and cleanup get_saved_sp, set_saved_sp If CONFIG_BUILD_ELF64 was not selected and gcc had -msym32 option (i.e. 4.0 or newer), there is no point to use %highest, %higher for kernel symbols. This patch also fixes 64-bit SMTC version of get_saved_sp() which is broken but harmless since there is no such CPUs for now. A bonus is set_saved_sp() and SMP version of get_saved_sp() are more readable now. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-10 17:46:52 +04:00
lui k1, %highest(kernelsp)
daddiu k1, %higher(kernelsp)
dsll k1, 16
daddiu k1, %hi(kernelsp)
dsll k1, 16
#endif
MIPS: Move definition of SMP processor id register to header file The definition of the CP0 register used to save the smp processor id is repicated in many files, move them all to thread_info.h. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5708/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-11 15:40:16 +04:00
LONG_SRL k0, SMP_CPUID_PTRSHIFT
[MIPS] Optimize and cleanup get_saved_sp, set_saved_sp If CONFIG_BUILD_ELF64 was not selected and gcc had -msym32 option (i.e. 4.0 or newer), there is no point to use %highest, %higher for kernel symbols. This patch also fixes 64-bit SMTC version of get_saved_sp() which is broken but harmless since there is no such CPUs for now. A bonus is set_saved_sp() and SMP version of get_saved_sp() are more readable now. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-10 17:46:52 +04:00
LONG_ADDU k1, k0
Rewrite to avoid the use of $at. Unfortunately binutils 2.15 and CVS binutils are broken and don't warn about this use of $at even though gas is in .set noat mode so this for now is an accident waiting to happen. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-02-13 03:32:43 +03:00
LONG_L k1, %lo(kernelsp)(k1)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
.endm
.macro set_saved_sp stackp temp temp2
MIPS: Move definition of SMP processor id register to header file The definition of the CP0 register used to save the smp processor id is repicated in many files, move them all to thread_info.h. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5708/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-11 15:40:16 +04:00
ASM_CPUID_MFC0 \temp, ASM_SMP_CPUID_REG
LONG_SRL \temp, SMP_CPUID_PTRSHIFT
Fix get_saved_sp for 64bit address space. Simplify set_save_sp. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Thiemo Seufer <ths@networkno.de>
2005-07-08 12:03:48 +04:00
LONG_S \stackp, kernelsp(\temp)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
.endm
MIPS: Move definition of SMP processor id register to header file The definition of the CP0 register used to save the smp processor id is repicated in many files, move them all to thread_info.h. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5708/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-11 15:40:16 +04:00
#else /* !CONFIG_SMP */
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
.macro get_saved_sp /* Uniprocessor variation */
MIPS: Loongson-2F: Use CONFIG_CPU_JUMP_WORKAROUNDS to control workarounds. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/1106/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-10 16:07:01 +04:00
#ifdef CONFIG_CPU_JUMP_WORKAROUNDS
MIPS: Loongson-2F: Flush the branch target history in BTB and RAS As per chapter 15 "Errata: Issue of Out-of-order in loongson"[1] to work around the Loongson 2F erratum we need to do: "When switching from user mode to kernel mode, you should flush the branch target history such as BTB and RAS." [1] Chinese version: http://www.loongson.cn/uploadfile/file/200808211 [2] English version of chapter 15: http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Patchwork: http://patchwork.linux-mips.org/patch/1066/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-03-13 07:34:15 +03:00
/*
* Clear BTB (branch target buffer), forbid RAS (return address
* stack) to workaround the Out-of-order Issue in Loongson2F
* via its diagnostic register.
*/
move k0, ra
jal 1f
nop
1: jal 1f
nop
1: jal 1f
nop
1: jal 1f
nop
1: move ra, k0
li k0, 3
mtc0 k0, $22
MIPS: microMIPS: Add support for exception handling. All exceptions must be taken in microMIPS mode, never in classic MIPS mode or the kernel falls apart. A few NOP instructions are used to maintain the correct alignment of microMIPS versions of the exception vectors. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-03-25 21:15:55 +04:00
#endif /* CONFIG_CPU_JUMP_WORKAROUNDS */
[MIPS] Rename CONFIG_BUILD_ELF64 into KBUILD_64BIT_SYM32 This patch renames it for 3 reasons: - "CONFIG" pattern is used by Kconfig. Now this macro is no more defined by Kconfig but by Kbuild itself make this clear by translating "CONFIG" into "KBUILD". - "ELF32" word is improper because it is irrelevant to ELF format and it makes confusion with CONFIG_BOOT_ELF32. So translate it with SYM32. - Add "64BIT" part to make clear that this macro implies a 64 bits kernel. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-15 16:21:36 +03:00
#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
lui k1, %hi(kernelsp)
#else
Fix get_saved_sp for 64bit address space. Simplify set_save_sp. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Thiemo Seufer <ths@networkno.de>
2005-07-08 12:03:48 +04:00
lui k1, %highest(kernelsp)
daddiu k1, %higher(kernelsp)
dsll k1, k1, 16
daddiu k1, %hi(kernelsp)
dsll k1, k1, 16
#endif
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
LONG_L k1, %lo(kernelsp)(k1)
.endm
.macro set_saved_sp stackp temp temp2
LONG_S \stackp, kernelsp
.endm
#endif
.macro SAVE_SOME
.set push
.set noat
.set reorder
mfc0 k0, CP0_STATUS
sll k0, 3 /* extract cu0 bit */
.set noreorder
bltz k0, 8f
move k1, sp
MIPS: Flush RPS on kernel entry with EVA When EVA is enabled, flush the Return Prediction Stack (RPS) present on some MIPS cores on entry to the kernel from user mode. This is important specifically for interAptiv with EVA enabled, otherwise kernel mode RPS mispredicts may trigger speculative fetches of user return addresses, which may be sensitive in the kernel address space due to EVA's overlapping user/kernel address spaces. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> # 3.15.x- Patchwork: https://patchwork.linux-mips.org/patch/10812/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-07-31 18:29:38 +03:00
#ifdef CONFIG_EVA
/*
* Flush interAptiv's Return Prediction Stack (RPS) by writing
* EntryHi. Toggling Config7.RPS is slower and less portable.
*
* The RPS isn't automatically flushed when exceptions are
* taken, which can result in kernel mode speculative accesses
* to user addresses if the RPS mispredicts. That's harmless
* when user and kernel share the same address space, but with
* EVA the same user segments may be unmapped to kernel mode,
* even containing sensitive MMIO regions or invalid memory.
*
* This can happen when the kernel sets the return address to
* ret_from_* and jr's to the exception handler, which looks
* more like a tail call than a function call. If nested calls
* don't evict the last user address in the RPS, it will
* mispredict the return and fetch from a user controlled
* address into the icache.
*
* More recent EVA-capable cores with MAAR to restrict
* speculative accesses aren't affected.
*/
MFC0 k0, CP0_ENTRYHI
MTC0 k0, CP0_ENTRYHI
#endif
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
.set reorder
/* Called from user mode, new stack. */
get_saved_sp
[MIPS] R4000/R4400 daddiu erratum workaround This complements the generic R4000/R4400 errata workaround code and adds bits for the daddiu problem. In most places it just modifies handwritten assembly code so that the assembler is allowed to use a temporary register as daddiu may now be treated as a macro that expands to a sequence of li and daddu. It is the AT register or, where AT is unavailable or used explicitly for another purpose, an explicitly-named register is selected, using the .set at=<reg> feature added recently to gas. This feature is only used if CONFIG_CPU_DADDI_WORKAROUNDS has been set, so if the workaround remains disabled, the required version of binutils stays unchanged. Similarly, daddiu instructions put in branch delay slots in noreorder fragments are now taken out of them and the assembler is allowed to reorder them itself as possible (which it does making the whole idea of scheduling them into delay slots manually questionable). Also in the very few places where such a simple conversion was not possible, a handcoded longer sequence is implemented. Other than that there are changes to code responsible for building the TLB fault and page clear/copy handlers to avoid daddiu as appropriate. These are only effective if the erratum is verified to be present at the run time. Finally there is a trivial update to __delay(), because it uses daddiu in a branch delay slot. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-23 15:43:25 +04:00
#ifndef CONFIG_CPU_DADDI_WORKAROUNDS
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
8: move k0, sp
PTR_SUBU sp, k1, PT_SIZE
[MIPS] R4000/R4400 daddiu erratum workaround This complements the generic R4000/R4400 errata workaround code and adds bits for the daddiu problem. In most places it just modifies handwritten assembly code so that the assembler is allowed to use a temporary register as daddiu may now be treated as a macro that expands to a sequence of li and daddu. It is the AT register or, where AT is unavailable or used explicitly for another purpose, an explicitly-named register is selected, using the .set at=<reg> feature added recently to gas. This feature is only used if CONFIG_CPU_DADDI_WORKAROUNDS has been set, so if the workaround remains disabled, the required version of binutils stays unchanged. Similarly, daddiu instructions put in branch delay slots in noreorder fragments are now taken out of them and the assembler is allowed to reorder them itself as possible (which it does making the whole idea of scheduling them into delay slots manually questionable). Also in the very few places where such a simple conversion was not possible, a handcoded longer sequence is implemented. Other than that there are changes to code responsible for building the TLB fault and page clear/copy handlers to avoid daddiu as appropriate. These are only effective if the erratum is verified to be present at the run time. Finally there is a trivial update to __delay(), because it uses daddiu in a branch delay slot. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-23 15:43:25 +04:00
#else
.set at=k0
8: PTR_SUBU k1, PT_SIZE
.set noat
move k0, sp
move sp, k1
#endif
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
LONG_S k0, PT_R29(sp)
LONG_S $3, PT_R3(sp)
[MIPS] MT: Improved multithreading support. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-05 12:45:45 +04:00
/*
* You might think that you don't need to save $0,
* but the FPU emulator and gdb remote debug stub
* need it to operate correctly
*/
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
LONG_S $0, PT_R0(sp)
mfc0 v1, CP0_STATUS
LONG_S $2, PT_R2(sp)
MIPS: microMIPS: Add support for exception handling. All exceptions must be taken in microMIPS mode, never in classic MIPS mode or the kernel falls apart. A few NOP instructions are used to maintain the correct alignment of microMIPS versions of the exception vectors. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-03-25 21:15:55 +04:00
LONG_S v1, PT_STATUS(sp)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
LONG_S $4, PT_R4(sp)
MIPS: Reorder operations in stackframe.h for better scheduling Reorder PT ops to avoid pipeline stalls. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-26 20:01:43 +04:00
mfc0 v1, CP0_CAUSE
MIPS: microMIPS: Add support for exception handling. All exceptions must be taken in microMIPS mode, never in classic MIPS mode or the kernel falls apart. A few NOP instructions are used to maintain the correct alignment of microMIPS versions of the exception vectors. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-03-25 21:15:55 +04:00
LONG_S $5, PT_R5(sp)
MIPS: Reorder operations in stackframe.h for better scheduling Reorder PT ops to avoid pipeline stalls. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-26 20:01:43 +04:00
LONG_S v1, PT_CAUSE(sp)
MIPS: microMIPS: Add support for exception handling. All exceptions must be taken in microMIPS mode, never in classic MIPS mode or the kernel falls apart. A few NOP instructions are used to maintain the correct alignment of microMIPS versions of the exception vectors. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-03-25 21:15:55 +04:00
LONG_S $6, PT_R6(sp)
MIPS: Reorder operations in stackframe.h for better scheduling Reorder PT ops to avoid pipeline stalls. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-26 20:01:43 +04:00
MFC0 v1, CP0_EPC
MIPS: microMIPS: Add support for exception handling. All exceptions must be taken in microMIPS mode, never in classic MIPS mode or the kernel falls apart. A few NOP instructions are used to maintain the correct alignment of microMIPS versions of the exception vectors. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-03-25 21:15:55 +04:00
LONG_S $7, PT_R7(sp)
[PATCH] mips: clean up 32/64-bit configuration Start cleaning 32-bit vs. 64-bit configuration. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-04 02:56:16 +04:00
#ifdef CONFIG_64BIT
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
LONG_S $8, PT_R8(sp)
LONG_S $9, PT_R9(sp)
#endif
MIPS: microMIPS: Add support for exception handling. All exceptions must be taken in microMIPS mode, never in classic MIPS mode or the kernel falls apart. A few NOP instructions are used to maintain the correct alignment of microMIPS versions of the exception vectors. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-03-25 21:15:55 +04:00
LONG_S v1, PT_EPC(sp)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
LONG_S $25, PT_R25(sp)
LONG_S $28, PT_R28(sp)
LONG_S $31, PT_R31(sp)
ori $28, sp, _THREAD_MASK
xori $28, _THREAD_MASK
MIPS: Cavium OCTEON multiplier state preservation. For OCTEON, implement a save and restore of the multiplier state across context switches. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-12-12 02:33:33 +03:00
#ifdef CONFIG_CPU_CAVIUM_OCTEON
MIPS: Don't save/restore OCTEON wide multiplier state on syscalls. The ABI allows these to be clobbered on syscalls, so only save and restore the multiplier state when the temporary registers need to be preserved. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/5540/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-22 01:14:53 +04:00
.set mips64
pref 0, 0($28) /* Prefetch the current pointer */
MIPS: Cavium OCTEON multiplier state preservation. For OCTEON, implement a save and restore of the multiplier state across context switches. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-12-12 02:33:33 +03:00
#endif
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
.set pop
.endm
.macro SAVE_ALL
SAVE_SOME
SAVE_AT
SAVE_TEMP
SAVE_STATIC
.endm
.macro RESTORE_AT
.set push
.set noat
LONG_L $1, PT_R1(sp)
.set pop
.endm
.macro RESTORE_TEMP
MIPS: Don't save/restore OCTEON wide multiplier state on syscalls. The ABI allows these to be clobbered on syscalls, so only save and restore the multiplier state when the temporary registers need to be preserved. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/5540/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-22 01:14:53 +04:00
#ifdef CONFIG_CPU_CAVIUM_OCTEON
/* Restore the Octeon multiplier state */
jal octeon_mult_restore
#endif
[MIPS] Add basic SMARTMIPS ASE support This patch adds trivial support for SMARTMIPS extension. This extension is currently implemented by 4KS[CD] CPUs. Basically it saves/restores ACX register, which is part of the SMARTMIPS ASE, when needed. This patch does *not* add any support for Smartmips MMU features. Futhermore this patch does not add explicit support for 4KS[CD] CPUs since they are respectively mips32 and mips32r2 compliant. So with the current processor configuration, a platform that has such CPUs needs to select both configs: CPU_HAS_SMARTMIPS SYS_HAS_CPU_MIPS32_R[12] This is due to the processor configuration which is mixing up all the architecture variants and the processor types. The drawback of this, is that we currently pass '-march=mips32' option to gcc when building a kernel instead of '-march=4ksc' for 4KSC case. This can lead to a kernel image a little bit bigger than required. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-02 19:41:47 +03:00
#ifdef CONFIG_CPU_HAS_SMARTMIPS
LONG_L $24, PT_ACX(sp)
mtlhx $24
LONG_L $24, PT_HI(sp)
mtlhx $24
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
LONG_L $24, PT_LO(sp)
[MIPS] Add basic SMARTMIPS ASE support This patch adds trivial support for SMARTMIPS extension. This extension is currently implemented by 4KS[CD] CPUs. Basically it saves/restores ACX register, which is part of the SMARTMIPS ASE, when needed. This patch does *not* add any support for Smartmips MMU features. Futhermore this patch does not add explicit support for 4KS[CD] CPUs since they are respectively mips32 and mips32r2 compliant. So with the current processor configuration, a platform that has such CPUs needs to select both configs: CPU_HAS_SMARTMIPS SYS_HAS_CPU_MIPS32_R[12] This is due to the processor configuration which is mixing up all the architecture variants and the processor types. The drawback of this, is that we currently pass '-march=mips32' option to gcc when building a kernel instead of '-march=4ksc' for 4KSC case. This can lead to a kernel image a little bit bigger than required. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-02 19:41:47 +03:00
mtlhx $24
MIPS: asm: stackframe: Do not preserve the HI/LO registers on MIPS R6 The HI/LO registers have been removed from MIPS R6. Instructions such as MULT and DIV have been replaced with a new pair of instructions for the HI/LO operations for example: MULT -> MUL, MUH DIV -> DIV, MOD So we avoid preserving the pre-R6 HI/LO registers in MIPS R6 Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2014-10-27 14:37:47 +03:00
#elif !defined(CONFIG_CPU_MIPSR6)
[MIPS] Add basic SMARTMIPS ASE support This patch adds trivial support for SMARTMIPS extension. This extension is currently implemented by 4KS[CD] CPUs. Basically it saves/restores ACX register, which is part of the SMARTMIPS ASE, when needed. This patch does *not* add any support for Smartmips MMU features. Futhermore this patch does not add explicit support for 4KS[CD] CPUs since they are respectively mips32 and mips32r2 compliant. So with the current processor configuration, a platform that has such CPUs needs to select both configs: CPU_HAS_SMARTMIPS SYS_HAS_CPU_MIPS32_R[12] This is due to the processor configuration which is mixing up all the architecture variants and the processor types. The drawback of this, is that we currently pass '-march=mips32' option to gcc when building a kernel instead of '-march=4ksc' for 4KSC case. This can lead to a kernel image a little bit bigger than required. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-02 19:41:47 +03:00
LONG_L $24, PT_LO(sp)
mtlo $24
LONG_L $24, PT_HI(sp)
mthi $24
#endif
[PATCH] mips: clean up 32/64-bit configuration Start cleaning 32-bit vs. 64-bit configuration. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-04 02:56:16 +04:00
#ifdef CONFIG_32BIT
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
LONG_L $8, PT_R8(sp)
LONG_L $9, PT_R9(sp)
#endif
LONG_L $10, PT_R10(sp)
LONG_L $11, PT_R11(sp)
LONG_L $12, PT_R12(sp)
LONG_L $13, PT_R13(sp)
LONG_L $14, PT_R14(sp)
LONG_L $15, PT_R15(sp)
LONG_L $24, PT_R24(sp)
.endm
.macro RESTORE_STATIC
LONG_L $16, PT_R16(sp)
LONG_L $17, PT_R17(sp)
LONG_L $18, PT_R18(sp)
LONG_L $19, PT_R19(sp)
LONG_L $20, PT_R20(sp)
LONG_L $21, PT_R21(sp)
LONG_L $22, PT_R22(sp)
LONG_L $23, PT_R23(sp)
LONG_L $30, PT_R30(sp)
.endm
#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
.macro RESTORE_SOME
.set push
.set reorder
.set noat
mfc0 a0, CP0_STATUS
li v1, 0xff00
[MIPS] Fix KMODE for the R3000 This must be the oldest bug that we have got. Leaving interrupts "as they are" for the R3000 obviously means copying IEp to IEc. Since we have got STATMASK now, I took this opportunity to mask the status register "correctly" for the R3000 now too. Oh, and the R3000 hardly ever is 64-bit. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-21 16:47:22 +04:00
ori a0, STATMASK
xori a0, STATMASK
mtc0 a0, CP0_STATUS
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
and a0, v1
LONG_L v0, PT_STATUS(sp)
nor v1, $0, v1
and v0, v1
or v0, a0
mtc0 v0, CP0_STATUS
LONG_L $31, PT_R31(sp)
LONG_L $28, PT_R28(sp)
LONG_L $25, PT_R25(sp)
LONG_L $7, PT_R7(sp)
LONG_L $6, PT_R6(sp)
LONG_L $5, PT_R5(sp)
LONG_L $4, PT_R4(sp)
LONG_L $3, PT_R3(sp)
LONG_L $2, PT_R2(sp)
.set pop
.endm
.macro RESTORE_SP_AND_RET
.set push
.set noreorder
LONG_L k0, PT_EPC(sp)
LONG_L sp, PT_R29(sp)
jr k0
rfe
.set pop
.endm
#else
.macro RESTORE_SOME
.set push
.set reorder
.set noat
mfc0 a0, CP0_STATUS
[MIPS] MT: Improved multithreading support. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-05 12:45:45 +04:00
ori a0, STATMASK
xori a0, STATMASK
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
mtc0 a0, CP0_STATUS
li v1, 0xff00
and a0, v1
LONG_L v0, PT_STATUS(sp)
nor v1, $0, v1
and v0, v1
or v0, a0
mtc0 v0, CP0_STATUS
LONG_L v1, PT_EPC(sp)
MTC0 v1, CP0_EPC
LONG_L $31, PT_R31(sp)
LONG_L $28, PT_R28(sp)
LONG_L $25, PT_R25(sp)
[PATCH] mips: clean up 32/64-bit configuration Start cleaning 32-bit vs. 64-bit configuration. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-04 02:56:16 +04:00
#ifdef CONFIG_64BIT
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
LONG_L $8, PT_R8(sp)
LONG_L $9, PT_R9(sp)
#endif
LONG_L $7, PT_R7(sp)
LONG_L $6, PT_R6(sp)
LONG_L $5, PT_R5(sp)
LONG_L $4, PT_R4(sp)
LONG_L $3, PT_R3(sp)
LONG_L $2, PT_R2(sp)
.set pop
.endm
.macro RESTORE_SP_AND_RET
LONG_L sp, PT_R29(sp)
MIPS: Fix gigaton of warning building with microMIPS. With binutils 2.24 the attempt to switch with microMIPS mode to MIPS III mode through .set mips3 results in *lots* of warnings like {standard input}: Assembler messages: {standard input}:397: Warning: the 64-bit MIPS architecture does not support the `smartmips' extension during a kernel build. Fixed by using .set arch=r4000 instead. This breaks support for building the kernel with binutils 2.13 which was supported for 32 bit kernels only anyway and 2.14 which was a bad vintage for MIPS anyway. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-30 15:20:10 +04:00
.set arch=r4000
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
eret
.set mips0
.endm
#endif
.macro RESTORE_SP
LONG_L sp, PT_R29(sp)
.endm
.macro RESTORE_ALL
RESTORE_TEMP
RESTORE_STATIC
RESTORE_AT
RESTORE_SOME
RESTORE_SP
.endm
.macro RESTORE_ALL_AND_RET
RESTORE_TEMP
RESTORE_STATIC
RESTORE_AT
RESTORE_SOME
RESTORE_SP_AND_RET
.endm
/*
* Move to kernel mode and disable interrupts.
* Set cp0 enable bit as sign that we're running on the kernel stack
*/
.macro CLI
mfc0 t0, CP0_STATUS
[MIPS] Fix KMODE for the R3000 This must be the oldest bug that we have got. Leaving interrupts "as they are" for the R3000 obviously means copying IEp to IEc. Since we have got STATMASK now, I took this opportunity to mask the status register "correctly" for the R3000 now too. Oh, and the R3000 hardly ever is 64-bit. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-21 16:47:22 +04:00
li t1, ST0_CU0 | STATMASK
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
or t0, t1
[MIPS] Fix KMODE for the R3000 This must be the oldest bug that we have got. Leaving interrupts "as they are" for the R3000 obviously means copying IEp to IEc. Since we have got STATMASK now, I took this opportunity to mask the status register "correctly" for the R3000 now too. Oh, and the R3000 hardly ever is 64-bit. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-21 16:47:22 +04:00
xori t0, STATMASK
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
mtc0 t0, CP0_STATUS
irq_disable_hazard
.endm
/*
* Move to kernel mode and enable interrupts.
* Set cp0 enable bit as sign that we're running on the kernel stack
*/
.macro STI
mfc0 t0, CP0_STATUS
[MIPS] Fix KMODE for the R3000 This must be the oldest bug that we have got. Leaving interrupts "as they are" for the R3000 obviously means copying IEp to IEc. Since we have got STATMASK now, I took this opportunity to mask the status register "correctly" for the R3000 now too. Oh, and the R3000 hardly ever is 64-bit. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-21 16:47:22 +04:00
li t1, ST0_CU0 | STATMASK
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
or t0, t1
[MIPS] Fix KMODE for the R3000 This must be the oldest bug that we have got. Leaving interrupts "as they are" for the R3000 obviously means copying IEp to IEc. Since we have got STATMASK now, I took this opportunity to mask the status register "correctly" for the R3000 now too. Oh, and the R3000 hardly ever is 64-bit. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-21 16:47:22 +04:00
xori t0, STATMASK & ~1
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
mtc0 t0, CP0_STATUS
irq_enable_hazard
.endm
/*
[MIPS] Fix KMODE for the R3000 This must be the oldest bug that we have got. Leaving interrupts "as they are" for the R3000 obviously means copying IEp to IEc. Since we have got STATMASK now, I took this opportunity to mask the status register "correctly" for the R3000 now too. Oh, and the R3000 hardly ever is 64-bit. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-21 16:47:22 +04:00
* Just move to kernel mode and leave interrupts as they are. Note
* for the R3000 this means copying the previous enable from IEp.
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
* Set cp0 enable bit as sign that we're running on the kernel stack
*/
.macro KMODE
mfc0 t0, CP0_STATUS
[MIPS] Fix KMODE for the R3000 This must be the oldest bug that we have got. Leaving interrupts "as they are" for the R3000 obviously means copying IEp to IEc. Since we have got STATMASK now, I took this opportunity to mask the status register "correctly" for the R3000 now too. Oh, and the R3000 hardly ever is 64-bit. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-21 16:47:22 +04:00
li t1, ST0_CU0 | (STATMASK & ~1)
#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
andi t2, t0, ST0_IEP
srl t2, 2
or t0, t2
#endif
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
or t0, t1
[MIPS] Fix KMODE for the R3000 This must be the oldest bug that we have got. Leaving interrupts "as they are" for the R3000 obviously means copying IEp to IEc. Since we have got STATMASK now, I took this opportunity to mask the status register "correctly" for the R3000 now too. Oh, and the R3000 hardly ever is 64-bit. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-21 16:47:22 +04:00
xori t0, STATMASK & ~1
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
mtc0 t0, CP0_STATUS
irq_disable_hazard
.endm
#endif /* _ASM_STACKFRAME_H */
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