2012-08-15 13:59:49 +01:00
/*
* Copyright ( C ) 2012 Russell King
* Rewritten from the dovefb driver , and Armada510 manuals .
*
* This program is free software ; you can redistribute it and / or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation .
*/
# include <drm/drmP.h>
2015-06-15 10:17:57 +01:00
# include <drm/drm_plane_helper.h>
2012-08-15 13:59:49 +01:00
# include "armada_crtc.h"
# include "armada_drm.h"
# include "armada_fb.h"
# include "armada_gem.h"
# include "armada_hw.h"
# include <drm/armada_drm.h>
# include "armada_ioctlP.h"
2016-05-17 13:51:08 +01:00
# include "armada_trace.h"
2012-08-15 13:59:49 +01:00
2015-07-15 18:11:23 +01:00
struct armada_ovl_plane_properties {
2012-08-15 13:59:49 +01:00
uint32_t colorkey_yr ;
uint32_t colorkey_ug ;
uint32_t colorkey_vb ;
# define K2R(val) (((val) >> 0) & 0xff)
# define K2G(val) (((val) >> 8) & 0xff)
# define K2B(val) (((val) >> 16) & 0xff)
int16_t brightness ;
uint16_t contrast ;
uint16_t saturation ;
uint32_t colorkey_mode ;
} ;
2015-07-15 18:11:23 +01:00
struct armada_ovl_plane {
2015-07-15 18:11:24 +01:00
struct armada_plane base ;
2012-08-15 13:59:49 +01:00
struct drm_framebuffer * old_fb ;
struct {
2015-08-07 09:33:05 +01:00
struct armada_plane_work work ;
2012-08-15 13:59:49 +01:00
struct armada_regs regs [ 13 ] ;
} vbl ;
2015-07-15 18:11:23 +01:00
struct armada_ovl_plane_properties prop ;
2012-08-15 13:59:49 +01:00
} ;
2015-07-15 18:11:24 +01:00
# define drm_to_armada_ovl_plane(p) \
container_of ( p , struct armada_ovl_plane , base . base )
2012-08-15 13:59:49 +01:00
static void
2015-07-15 18:11:23 +01:00
armada_ovl_update_attr ( struct armada_ovl_plane_properties * prop ,
2012-08-15 13:59:49 +01:00
struct armada_crtc * dcrtc )
{
writel_relaxed ( prop - > colorkey_yr , dcrtc - > base + LCD_SPU_COLORKEY_Y ) ;
writel_relaxed ( prop - > colorkey_ug , dcrtc - > base + LCD_SPU_COLORKEY_U ) ;
writel_relaxed ( prop - > colorkey_vb , dcrtc - > base + LCD_SPU_COLORKEY_V ) ;
writel_relaxed ( prop - > brightness < < 16 | prop - > contrast ,
dcrtc - > base + LCD_SPU_CONTRAST ) ;
/* Docs say 15:0, but it seems to actually be 31:16 on Armada 510 */
writel_relaxed ( prop - > saturation < < 16 ,
dcrtc - > base + LCD_SPU_SATURATION ) ;
writel_relaxed ( 0x00002000 , dcrtc - > base + LCD_SPU_CBSH_HUE ) ;
spin_lock_irq ( & dcrtc - > irq_lock ) ;
armada_updatel ( prop - > colorkey_mode | CFG_ALPHAM_GRA ,
CFG_CKMODE_MASK | CFG_ALPHAM_MASK | CFG_ALPHA_MASK ,
dcrtc - > base + LCD_SPU_DMA_CTRL1 ) ;
armada_updatel ( ADV_GRACOLORKEY , 0 , dcrtc - > base + LCD_SPU_ADV_REG ) ;
spin_unlock_irq ( & dcrtc - > irq_lock ) ;
}
2015-07-15 18:11:24 +01:00
static void armada_ovl_retire_fb ( struct armada_ovl_plane * dplane ,
struct drm_framebuffer * fb )
{
struct drm_framebuffer * old_fb ;
2015-07-15 18:11:24 +01:00
old_fb = xchg ( & dplane - > old_fb , fb ) ;
2015-07-15 18:11:24 +01:00
if ( old_fb )
2015-07-15 18:11:24 +01:00
armada_drm_queue_unref_work ( dplane - > base . base . dev , old_fb ) ;
2015-07-15 18:11:24 +01:00
}
2012-08-15 13:59:49 +01:00
/* === Plane support === */
2015-08-07 09:33:05 +01:00
static void armada_ovl_plane_work ( struct armada_crtc * dcrtc ,
struct armada_plane * plane , struct armada_plane_work * work )
2012-08-15 13:59:49 +01:00
{
2015-08-07 09:33:05 +01:00
struct armada_ovl_plane * dplane = container_of ( plane , struct armada_ovl_plane , base ) ;
2012-08-15 13:59:49 +01:00
2016-05-17 13:51:08 +01:00
trace_armada_ovl_plane_work ( & dcrtc - > crtc , & plane - > base ) ;
2012-08-15 13:59:49 +01:00
armada_drm_crtc_update_regs ( dcrtc , dplane - > vbl . regs ) ;
2015-07-15 18:11:24 +01:00
armada_ovl_retire_fb ( dplane , NULL ) ;
2012-08-15 13:59:49 +01:00
}
static int
2015-07-15 18:11:23 +01:00
armada_ovl_plane_update ( struct drm_plane * plane , struct drm_crtc * crtc ,
2012-08-15 13:59:49 +01:00
struct drm_framebuffer * fb ,
int crtc_x , int crtc_y , unsigned crtc_w , unsigned crtc_h ,
2017-03-22 22:50:41 +01:00
uint32_t src_x , uint32_t src_y , uint32_t src_w , uint32_t src_h ,
struct drm_modeset_acquire_ctx * ctx )
2012-08-15 13:59:49 +01:00
{
2015-07-15 18:11:23 +01:00
struct armada_ovl_plane * dplane = drm_to_armada_ovl_plane ( plane ) ;
2012-08-15 13:59:49 +01:00
struct armada_crtc * dcrtc = drm_to_armada_crtc ( crtc ) ;
2015-06-15 10:17:57 +01:00
struct drm_rect src = {
. x1 = src_x ,
. y1 = src_y ,
. x2 = src_x + src_w ,
. y2 = src_y + src_h ,
} ;
struct drm_rect dest = {
. x1 = crtc_x ,
. y1 = crtc_y ,
. x2 = crtc_x + crtc_w ,
. y2 = crtc_y + crtc_h ,
} ;
const struct drm_rect clip = {
. x2 = crtc - > mode . hdisplay ,
. y2 = crtc - > mode . vdisplay ,
} ;
2012-08-15 13:59:49 +01:00
uint32_t val , ctrl0 ;
unsigned idx = 0 ;
2015-06-15 10:17:57 +01:00
bool visible ;
2012-08-15 13:59:49 +01:00
int ret ;
2016-05-17 13:51:08 +01:00
trace_armada_ovl_plane_update ( plane , crtc , fb ,
crtc_x , crtc_y , crtc_w , crtc_h ,
src_x , src_y , src_w , src_h ) ;
2015-06-15 10:17:57 +01:00
ret = drm_plane_helper_check_update ( plane , crtc , fb , & src , & dest , & clip ,
2017-05-19 16:50:17 -04:00
DRM_MODE_ROTATE_0 ,
2015-06-15 10:17:57 +01:00
0 , INT_MAX , true , false , & visible ) ;
if ( ret )
return ret ;
2012-08-15 13:59:49 +01:00
ctrl0 = CFG_DMA_FMT ( drm_fb_to_armada_fb ( fb ) - > fmt ) |
CFG_DMA_MOD ( drm_fb_to_armada_fb ( fb ) - > mod ) |
CFG_CBSH_ENA | CFG_DMA_HSMOOTH | CFG_DMA_ENA ;
/* Does the position/size result in nothing to display? */
2015-06-15 10:17:57 +01:00
if ( ! visible )
2012-08-15 13:59:49 +01:00
ctrl0 & = ~ CFG_DMA_ENA ;
if ( ! dcrtc - > plane ) {
dcrtc - > plane = plane ;
armada_ovl_update_attr ( & dplane - > prop , dcrtc ) ;
}
/* FIXME: overlay on an interlaced display */
/* Just updating the position/size? */
2016-08-16 22:09:08 +01:00
if ( plane - > fb = = fb & & dplane - > base . state . ctrl0 = = ctrl0 ) {
2015-06-15 10:17:57 +01:00
val = ( drm_rect_height ( & src ) & 0xffff0000 ) |
drm_rect_width ( & src ) > > 16 ;
2016-08-16 22:09:08 +01:00
dplane - > base . state . src_hw = val ;
2012-08-15 13:59:49 +01:00
writel_relaxed ( val , dcrtc - > base + LCD_SPU_DMA_HPXL_VLN ) ;
2015-06-15 10:17:57 +01:00
val = drm_rect_height ( & dest ) < < 16 | drm_rect_width ( & dest ) ;
2016-08-16 22:09:08 +01:00
dplane - > base . state . dst_hw = val ;
2012-08-15 13:59:49 +01:00
writel_relaxed ( val , dcrtc - > base + LCD_SPU_DZM_HPXL_VLN ) ;
2015-06-15 10:17:57 +01:00
val = dest . y1 < < 16 | dest . x1 ;
2016-08-16 22:09:08 +01:00
dplane - > base . state . dst_yx = val ;
2012-08-15 13:59:49 +01:00
writel_relaxed ( val , dcrtc - > base + LCD_SPU_DMA_OVSA_HPXL_VLN ) ;
2015-06-15 10:17:57 +01:00
2012-08-15 13:59:49 +01:00
return 0 ;
2016-08-16 22:09:08 +01:00
} else if ( ~ dplane - > base . state . ctrl0 & ctrl0 & CFG_DMA_ENA ) {
2012-08-15 13:59:49 +01:00
/* Power up the Y/U/V FIFOs on ENA 0->1 transitions */
armada_updatel ( 0 , CFG_PDWN16x66 | CFG_PDWN32x66 ,
dcrtc - > base + LCD_SPU_SRAM_PARA1 ) ;
}
2015-08-07 09:33:05 +01:00
if ( armada_drm_plane_work_wait ( & dplane - > base , HZ / 25 ) = = 0 )
armada_drm_plane_work_cancel ( dcrtc , & dplane - > base ) ;
2012-08-15 13:59:49 +01:00
if ( plane - > fb ! = fb ) {
2016-08-16 22:09:11 +01:00
u32 addrs [ 3 ] , pixel_format ;
int num_planes , hsub ;
2012-08-15 13:59:49 +01:00
/*
* Take a reference on the new framebuffer - we want to
* hold on to it while the hardware is displaying it .
*/
drm_framebuffer_reference ( fb ) ;
2015-07-15 18:11:24 +01:00
if ( plane - > fb )
armada_ovl_retire_fb ( dplane , plane - > fb ) ;
2012-08-15 13:59:49 +01:00
2015-06-15 10:17:57 +01:00
src_y = src . y1 > > 16 ;
src_x = src . x1 > > 16 ;
2015-06-15 10:18:02 +01:00
2016-08-16 22:09:11 +01:00
armada_drm_plane_calc_addrs ( addrs , fb , src_x , src_y ) ;
2016-12-14 23:32:55 +02:00
pixel_format = fb - > format - > format ;
2015-06-15 10:18:02 +01:00
hsub = drm_format_horz_chroma_subsampling ( pixel_format ) ;
2016-12-14 23:30:22 +02:00
num_planes = fb - > format - > num_planes ;
2015-06-15 10:18:02 +01:00
/*
* Annoyingly , shifting a YUYV - format image by one pixel
* causes the U / V planes to toggle . Toggle the UV swap .
* ( Unfortunately , this causes momentary colour flickering . )
*/
if ( src_x & ( hsub - 1 ) & & num_planes = = 1 )
ctrl0 ^ = CFG_DMA_MOD ( CFG_SWAPUV ) ;
2016-08-16 22:09:11 +01:00
armada_reg_queue_set ( dplane - > vbl . regs , idx , addrs [ 0 ] ,
2012-08-15 13:59:49 +01:00
LCD_SPU_DMA_START_ADDR_Y0 ) ;
2016-08-16 22:09:11 +01:00
armada_reg_queue_set ( dplane - > vbl . regs , idx , addrs [ 1 ] ,
2012-08-15 13:59:49 +01:00
LCD_SPU_DMA_START_ADDR_U0 ) ;
2016-08-16 22:09:11 +01:00
armada_reg_queue_set ( dplane - > vbl . regs , idx , addrs [ 2 ] ,
2012-08-15 13:59:49 +01:00
LCD_SPU_DMA_START_ADDR_V0 ) ;
2016-08-16 22:09:11 +01:00
armada_reg_queue_set ( dplane - > vbl . regs , idx , addrs [ 0 ] ,
2012-08-15 13:59:49 +01:00
LCD_SPU_DMA_START_ADDR_Y1 ) ;
2016-08-16 22:09:11 +01:00
armada_reg_queue_set ( dplane - > vbl . regs , idx , addrs [ 1 ] ,
2012-08-15 13:59:49 +01:00
LCD_SPU_DMA_START_ADDR_U1 ) ;
2016-08-16 22:09:11 +01:00
armada_reg_queue_set ( dplane - > vbl . regs , idx , addrs [ 2 ] ,
2012-08-15 13:59:49 +01:00
LCD_SPU_DMA_START_ADDR_V1 ) ;
val = fb - > pitches [ 0 ] < < 16 | fb - > pitches [ 0 ] ;
armada_reg_queue_set ( dplane - > vbl . regs , idx , val ,
LCD_SPU_DMA_PITCH_YC ) ;
val = fb - > pitches [ 1 ] < < 16 | fb - > pitches [ 2 ] ;
armada_reg_queue_set ( dplane - > vbl . regs , idx , val ,
LCD_SPU_DMA_PITCH_UV ) ;
}
2015-06-15 10:17:57 +01:00
val = ( drm_rect_height ( & src ) & 0xffff0000 ) | drm_rect_width ( & src ) > > 16 ;
2016-08-16 22:09:08 +01:00
if ( dplane - > base . state . src_hw ! = val ) {
dplane - > base . state . src_hw = val ;
2012-08-15 13:59:49 +01:00
armada_reg_queue_set ( dplane - > vbl . regs , idx , val ,
LCD_SPU_DMA_HPXL_VLN ) ;
}
2015-06-15 10:17:57 +01:00
val = drm_rect_height ( & dest ) < < 16 | drm_rect_width ( & dest ) ;
2016-08-16 22:09:08 +01:00
if ( dplane - > base . state . dst_hw ! = val ) {
dplane - > base . state . dst_hw = val ;
2012-08-15 13:59:49 +01:00
armada_reg_queue_set ( dplane - > vbl . regs , idx , val ,
LCD_SPU_DZM_HPXL_VLN ) ;
}
2015-06-15 10:17:57 +01:00
val = dest . y1 < < 16 | dest . x1 ;
2016-08-16 22:09:08 +01:00
if ( dplane - > base . state . dst_yx ! = val ) {
dplane - > base . state . dst_yx = val ;
2012-08-15 13:59:49 +01:00
armada_reg_queue_set ( dplane - > vbl . regs , idx , val ,
LCD_SPU_DMA_OVSA_HPXL_VLN ) ;
}
2015-06-15 10:17:57 +01:00
2016-08-16 22:09:08 +01:00
if ( dplane - > base . state . ctrl0 ! = ctrl0 ) {
dplane - > base . state . ctrl0 = ctrl0 ;
2012-08-15 13:59:49 +01:00
armada_reg_queue_mod ( dplane - > vbl . regs , idx , ctrl0 ,
CFG_CBSH_ENA | CFG_DMAFORMAT | CFG_DMA_FTOGGLE |
CFG_DMA_HSMOOTH | CFG_DMA_TSTMODE |
CFG_DMA_MOD ( CFG_SWAPRB | CFG_SWAPUV | CFG_SWAPYU |
CFG_YUV2RGB ) | CFG_DMA_ENA ,
LCD_SPU_DMA_CTRL0 ) ;
}
if ( idx ) {
armada_reg_queue_end ( dplane - > vbl . regs , idx ) ;
2015-08-07 09:33:05 +01:00
armada_drm_plane_work_queue ( dcrtc , & dplane - > base ,
& dplane - > vbl . work ) ;
2012-08-15 13:59:49 +01:00
}
return 0 ;
}
2017-03-22 22:50:43 +01:00
static int armada_ovl_plane_disable ( struct drm_plane * plane ,
struct drm_modeset_acquire_ctx * ctx )
2012-08-15 13:59:49 +01:00
{
2015-07-15 18:11:23 +01:00
struct armada_ovl_plane * dplane = drm_to_armada_ovl_plane ( plane ) ;
2012-08-15 13:59:49 +01:00
struct drm_framebuffer * fb ;
struct armada_crtc * dcrtc ;
2015-07-15 18:11:24 +01:00
if ( ! dplane - > base . base . crtc )
2012-08-15 13:59:49 +01:00
return 0 ;
2015-07-15 18:11:24 +01:00
dcrtc = drm_to_armada_crtc ( dplane - > base . base . crtc ) ;
2012-08-15 13:59:49 +01:00
2015-08-07 09:33:05 +01:00
armada_drm_plane_work_cancel ( dcrtc , & dplane - > base ) ;
armada_drm_crtc_plane_disable ( dcrtc , plane ) ;
2012-08-15 13:59:49 +01:00
2015-08-07 09:33:05 +01:00
dcrtc - > plane = NULL ;
2016-08-16 22:09:08 +01:00
dplane - > base . state . ctrl0 = 0 ;
2015-07-15 18:11:25 +01:00
2015-07-15 18:11:24 +01:00
fb = xchg ( & dplane - > old_fb , NULL ) ;
2012-08-15 13:59:49 +01:00
if ( fb )
drm_framebuffer_unreference ( fb ) ;
return 0 ;
}
2015-07-15 18:11:23 +01:00
static void armada_ovl_plane_destroy ( struct drm_plane * plane )
2012-08-15 13:59:49 +01:00
{
2015-07-15 18:11:23 +01:00
struct armada_ovl_plane * dplane = drm_to_armada_ovl_plane ( plane ) ;
2015-06-15 10:13:30 +01:00
drm_plane_cleanup ( plane ) ;
kfree ( dplane ) ;
2012-08-15 13:59:49 +01:00
}
2015-07-15 18:11:23 +01:00
static int armada_ovl_plane_set_property ( struct drm_plane * plane ,
2012-08-15 13:59:49 +01:00
struct drm_property * property , uint64_t val )
{
struct armada_private * priv = plane - > dev - > dev_private ;
2015-07-15 18:11:23 +01:00
struct armada_ovl_plane * dplane = drm_to_armada_ovl_plane ( plane ) ;
2012-08-15 13:59:49 +01:00
bool update_attr = false ;
if ( property = = priv - > colorkey_prop ) {
# define CCC(v) ((v) << 24 | (v) << 16 | (v) << 8)
dplane - > prop . colorkey_yr = CCC ( K2R ( val ) ) ;
dplane - > prop . colorkey_ug = CCC ( K2G ( val ) ) ;
dplane - > prop . colorkey_vb = CCC ( K2B ( val ) ) ;
# undef CCC
update_attr = true ;
} else if ( property = = priv - > colorkey_min_prop ) {
dplane - > prop . colorkey_yr & = ~ 0x00ff0000 ;
dplane - > prop . colorkey_yr | = K2R ( val ) < < 16 ;
dplane - > prop . colorkey_ug & = ~ 0x00ff0000 ;
dplane - > prop . colorkey_ug | = K2G ( val ) < < 16 ;
dplane - > prop . colorkey_vb & = ~ 0x00ff0000 ;
dplane - > prop . colorkey_vb | = K2B ( val ) < < 16 ;
update_attr = true ;
} else if ( property = = priv - > colorkey_max_prop ) {
dplane - > prop . colorkey_yr & = ~ 0xff000000 ;
dplane - > prop . colorkey_yr | = K2R ( val ) < < 24 ;
dplane - > prop . colorkey_ug & = ~ 0xff000000 ;
dplane - > prop . colorkey_ug | = K2G ( val ) < < 24 ;
dplane - > prop . colorkey_vb & = ~ 0xff000000 ;
dplane - > prop . colorkey_vb | = K2B ( val ) < < 24 ;
update_attr = true ;
} else if ( property = = priv - > colorkey_val_prop ) {
dplane - > prop . colorkey_yr & = ~ 0x0000ff00 ;
dplane - > prop . colorkey_yr | = K2R ( val ) < < 8 ;
dplane - > prop . colorkey_ug & = ~ 0x0000ff00 ;
dplane - > prop . colorkey_ug | = K2G ( val ) < < 8 ;
dplane - > prop . colorkey_vb & = ~ 0x0000ff00 ;
dplane - > prop . colorkey_vb | = K2B ( val ) < < 8 ;
update_attr = true ;
} else if ( property = = priv - > colorkey_alpha_prop ) {
dplane - > prop . colorkey_yr & = ~ 0x000000ff ;
dplane - > prop . colorkey_yr | = K2R ( val ) ;
dplane - > prop . colorkey_ug & = ~ 0x000000ff ;
dplane - > prop . colorkey_ug | = K2G ( val ) ;
dplane - > prop . colorkey_vb & = ~ 0x000000ff ;
dplane - > prop . colorkey_vb | = K2B ( val ) ;
update_attr = true ;
} else if ( property = = priv - > colorkey_mode_prop ) {
dplane - > prop . colorkey_mode & = ~ CFG_CKMODE_MASK ;
dplane - > prop . colorkey_mode | = CFG_CKMODE ( val ) ;
update_attr = true ;
} else if ( property = = priv - > brightness_prop ) {
dplane - > prop . brightness = val - 256 ;
update_attr = true ;
} else if ( property = = priv - > contrast_prop ) {
dplane - > prop . contrast = val ;
update_attr = true ;
} else if ( property = = priv - > saturation_prop ) {
dplane - > prop . saturation = val ;
update_attr = true ;
}
2015-07-15 18:11:24 +01:00
if ( update_attr & & dplane - > base . base . crtc )
2012-08-15 13:59:49 +01:00
armada_ovl_update_attr ( & dplane - > prop ,
2015-07-15 18:11:24 +01:00
drm_to_armada_crtc ( dplane - > base . base . crtc ) ) ;
2012-08-15 13:59:49 +01:00
return 0 ;
}
2015-07-15 18:11:23 +01:00
static const struct drm_plane_funcs armada_ovl_plane_funcs = {
. update_plane = armada_ovl_plane_update ,
. disable_plane = armada_ovl_plane_disable ,
. destroy = armada_ovl_plane_destroy ,
. set_property = armada_ovl_plane_set_property ,
2012-08-15 13:59:49 +01:00
} ;
2015-07-15 18:11:23 +01:00
static const uint32_t armada_ovl_formats [ ] = {
2012-08-15 13:59:49 +01:00
DRM_FORMAT_UYVY ,
DRM_FORMAT_YUYV ,
DRM_FORMAT_YUV420 ,
DRM_FORMAT_YVU420 ,
DRM_FORMAT_YUV422 ,
DRM_FORMAT_YVU422 ,
DRM_FORMAT_VYUY ,
DRM_FORMAT_YVYU ,
DRM_FORMAT_ARGB8888 ,
DRM_FORMAT_ABGR8888 ,
DRM_FORMAT_XRGB8888 ,
DRM_FORMAT_XBGR8888 ,
DRM_FORMAT_RGB888 ,
DRM_FORMAT_BGR888 ,
DRM_FORMAT_ARGB1555 ,
DRM_FORMAT_ABGR1555 ,
DRM_FORMAT_RGB565 ,
DRM_FORMAT_BGR565 ,
} ;
static struct drm_prop_enum_list armada_drm_colorkey_enum_list [ ] = {
{ CKMODE_DISABLE , " disabled " } ,
{ CKMODE_Y , " Y component " } ,
{ CKMODE_U , " U component " } ,
{ CKMODE_V , " V component " } ,
{ CKMODE_RGB , " RGB " } ,
{ CKMODE_R , " R component " } ,
{ CKMODE_G , " G component " } ,
{ CKMODE_B , " B component " } ,
} ;
static int armada_overlay_create_properties ( struct drm_device * dev )
{
struct armada_private * priv = dev - > dev_private ;
if ( priv - > colorkey_prop )
return 0 ;
priv - > colorkey_prop = drm_property_create_range ( dev , 0 ,
" colorkey " , 0 , 0xffffff ) ;
priv - > colorkey_min_prop = drm_property_create_range ( dev , 0 ,
" colorkey_min " , 0 , 0xffffff ) ;
priv - > colorkey_max_prop = drm_property_create_range ( dev , 0 ,
" colorkey_max " , 0 , 0xffffff ) ;
priv - > colorkey_val_prop = drm_property_create_range ( dev , 0 ,
" colorkey_val " , 0 , 0xffffff ) ;
priv - > colorkey_alpha_prop = drm_property_create_range ( dev , 0 ,
" colorkey_alpha " , 0 , 0xffffff ) ;
priv - > colorkey_mode_prop = drm_property_create_enum ( dev , 0 ,
" colorkey_mode " ,
armada_drm_colorkey_enum_list ,
ARRAY_SIZE ( armada_drm_colorkey_enum_list ) ) ;
priv - > brightness_prop = drm_property_create_range ( dev , 0 ,
" brightness " , 0 , 256 + 255 ) ;
priv - > contrast_prop = drm_property_create_range ( dev , 0 ,
" contrast " , 0 , 0x7fff ) ;
priv - > saturation_prop = drm_property_create_range ( dev , 0 ,
" saturation " , 0 , 0x7fff ) ;
if ( ! priv - > colorkey_prop )
return - ENOMEM ;
return 0 ;
}
int armada_overlay_plane_create ( struct drm_device * dev , unsigned long crtcs )
{
struct armada_private * priv = dev - > dev_private ;
struct drm_mode_object * mobj ;
2015-07-15 18:11:23 +01:00
struct armada_ovl_plane * dplane ;
2012-08-15 13:59:49 +01:00
int ret ;
ret = armada_overlay_create_properties ( dev ) ;
if ( ret )
return ret ;
dplane = kzalloc ( sizeof ( * dplane ) , GFP_KERNEL ) ;
if ( ! dplane )
return - ENOMEM ;
2015-07-15 18:11:25 +01:00
ret = armada_drm_plane_init ( & dplane - > base ) ;
if ( ret ) {
kfree ( dplane ) ;
return ret ;
}
2015-08-07 09:33:05 +01:00
dplane - > vbl . work . fn = armada_ovl_plane_work ;
2012-08-15 13:59:49 +01:00
2015-07-15 18:11:24 +01:00
ret = drm_universal_plane_init ( dev , & dplane - > base . base , crtcs ,
2015-07-15 18:11:24 +01:00
& armada_ovl_plane_funcs ,
armada_ovl_formats ,
ARRAY_SIZE ( armada_ovl_formats ) ,
drm: Pass 'name' to drm_universal_plane_init()
Done with coccinelle for the most part. It choked on
msm/mdp/mdp5/mdp5_plane.c like so:
"BAD:!!!!! enum drm_plane_type type;"
No idea how to deal with that, so I just fixed that up
by hand.
Also it thinks '...' is part of the semantic patch, so I put an
'int DOTDOTDOT' placeholder in its place and got rid of it with
sed afterwards.
I didn't convert drm_plane_init() since passing the varargs through
would mean either cpp macros or va_list, and I figured we don't
care about these legacy functions enough to warrant the extra pain.
@@
typedef uint32_t;
identifier dev, plane, possible_crtcs, funcs, formats, format_count, type;
@@
int drm_universal_plane_init(struct drm_device *dev,
struct drm_plane *plane,
unsigned long possible_crtcs,
const struct drm_plane_funcs *funcs,
const uint32_t *formats,
unsigned int format_count,
enum drm_plane_type type
+ ,const char *name, int DOTDOTDOT
)
{ ... }
@@
identifier dev, plane, possible_crtcs, funcs, formats, format_count, type;
@@
int drm_universal_plane_init(struct drm_device *dev,
struct drm_plane *plane,
unsigned long possible_crtcs,
const struct drm_plane_funcs *funcs,
const uint32_t *formats,
unsigned int format_count,
enum drm_plane_type type
+ ,const char *name, int DOTDOTDOT
);
@@
expression E1, E2, E3, E4, E5, E6, E7;
@@
drm_universal_plane_init(E1, E2, E3, E4, E5, E6, E7
+ ,NULL
)
v2: Split crtc and plane changes apart
Pass NUL for no-name instead of ""
Leave drm_plane_init() alone
v3: Add ', or NULL...' to @name kernel doc (Jani)
Annotate the function with __printf() attribute (Jani)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449670795-2853-1-git-send-email-ville.syrjala@linux.intel.com
2015-12-09 16:19:55 +02:00
DRM_PLANE_TYPE_OVERLAY , NULL ) ;
2015-07-15 18:11:23 +01:00
if ( ret ) {
kfree ( dplane ) ;
return ret ;
}
2012-08-15 13:59:49 +01:00
dplane - > prop . colorkey_yr = 0xfefefe00 ;
dplane - > prop . colorkey_ug = 0x01010100 ;
dplane - > prop . colorkey_vb = 0x01010100 ;
dplane - > prop . colorkey_mode = CFG_CKMODE ( CKMODE_RGB ) ;
dplane - > prop . brightness = 0 ;
dplane - > prop . contrast = 0x4000 ;
dplane - > prop . saturation = 0x4000 ;
2015-07-15 18:11:24 +01:00
mobj = & dplane - > base . base . base ;
2012-08-15 13:59:49 +01:00
drm_object_attach_property ( mobj , priv - > colorkey_prop ,
0x0101fe ) ;
drm_object_attach_property ( mobj , priv - > colorkey_min_prop ,
0x0101fe ) ;
drm_object_attach_property ( mobj , priv - > colorkey_max_prop ,
0x0101fe ) ;
drm_object_attach_property ( mobj , priv - > colorkey_val_prop ,
0x0101fe ) ;
drm_object_attach_property ( mobj , priv - > colorkey_alpha_prop ,
0x000000 ) ;
drm_object_attach_property ( mobj , priv - > colorkey_mode_prop ,
CKMODE_RGB ) ;
drm_object_attach_property ( mobj , priv - > brightness_prop , 256 ) ;
drm_object_attach_property ( mobj , priv - > contrast_prop ,
dplane - > prop . contrast ) ;
drm_object_attach_property ( mobj , priv - > saturation_prop ,
dplane - > prop . saturation ) ;
return 0 ;
}