[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-25 23:32:13 -07:00
/ *
* Copy t o / f r o m u s e r s p a c e w i t h o p t i o n a l a d d r e s s s p a c e c h e c k i n g .
*
* Copyright 2 0 0 4 - 2 0 0 6 A t m e l C o r p o r a t i o n
*
* This p r o g r a m i s f r e e s o f t w a r e ; you can redistribute it and/or modify
* it u n d e r t h e t e r m s o f t h e G N U G e n e r a l P u b l i c L i c e n s e v e r s i o n 2 a s
* published b y t h e F r e e S o f t w a r e F o u n d a t i o n .
* /
# include < a s m / p a g e . h >
# include < a s m / t h r e a d _ i n f o . h >
# include < a s m / a s m . h >
/ *
* _ _ kernel_ s i z e _ t
* _ _ copy_ u s e r ( v o i d * t o , c o n s t v o i d * f r o m , _ _ k e r n e l _ s i z e _ t n )
*
* Returns t h e n u m b e r o f b y t e s n o t c o p i e d . M i g h t b e o f f b y
* max 3 b y t e s i f w e g e t a f a u l t i n t h e m a i n l o o p .
*
* The a d d r e s s - s p a c e c h e c k i n g f u n c t i o n s s i m p l y f a l l t h r o u g h t o
* the n o n - c h e c k i n g v e r s i o n .
* /
.text
.align 1
2016-09-17 07:52:49 -07:00
.global ___copy_from_user
.type _ _ _ copy_ f r o m _ u s e r , @function
2016-09-09 19:28:23 -04:00
___copy_from_user :
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-25 23:32:13 -07:00
branch_ i f _ k e r n e l r8 , _ _ c o p y _ u s e r
ret_ i f _ p r i v i l e g e d r8 , r11 , r10 , r10
rjmp _ _ c o p y _ u s e r
2016-09-09 19:28:23 -04:00
.size _ _ _ copy_ f r o m _ u s e r , . - _ _ _ c o p y _ f r o m _ u s e r
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-25 23:32:13 -07:00
.global copy_to_user
.type _ t o _ u s e r , @function
copy_to_user :
branch_ i f _ k e r n e l r8 , _ _ c o p y _ u s e r
ret_ i f _ p r i v i l e g e d r8 , r12 , r10 , r10
.size _ t o _ u s e r , . - c o p y _ t o _ u s e r
.global __copy_user
.type _ _ copy_ u s e r , @function
__copy_user :
mov r9 , r11
andl r9 , 3 , C O H
brne 6 f
/* At this point, from is word-aligned */
1 : sub r10 , 4
brlt 3 f
2 :
10 : ld. w r8 , r11 + +
11 : st. w r12 + + , r8
sub r10 , 4
brge 2 b
3 : sub r10 , - 4
reteq 0
/ *
* Handle u n a l i g n e d c o u n t . N e e d t o b e c a r e f u l w i t h r10 h e r e s o
* that w e r e t u r n t h e c o r r e c t v a l u e e v e n i f w e g e t a f a u l t
* /
4 :
20 : ld. u b r8 , r11 + +
21 : st. b r12 + + , r8
sub r10 , 1
reteq 0
22 : ld. u b r8 , r11 + +
23 : st. b r12 + + , r8
sub r10 , 1
reteq 0
24 : ld. u b r8 , r11 + +
25 : st. b r12 + + , r8
retal 0
/* Handle unaligned from-pointer */
6 : cp. w r10 , 4
brlt 4 b
rsub r9 , r9 , 4
30 : ld. u b r8 , r11 + +
31 : st. b r12 + + , r8
sub r10 , 1
sub r9 , 1
breq 1 b
32 : ld. u b r8 , r11 + +
33 : st. b r12 + + , r8
sub r10 , 1
sub r9 , 1
breq 1 b
34 : ld. u b r8 , r11 + +
35 : st. b r12 + + , r8
sub r10 , 1
rjmp 1 b
.size _ _ copy_ u s e r , . - _ _ c o p y _ u s e r
.section .fixup , " ax"
.align 1
19 : sub r10 , - 4
29 : retal r10
.section _ _ ex_ t a b l e ," a "
.align 2
.long 1 0 b, 1 9 b
.long 1 1 b, 1 9 b
.long 2 0 b, 2 9 b
.long 2 1 b, 2 9 b
.long 2 2 b, 2 9 b
.long 2 3 b, 2 9 b
.long 2 4 b, 2 9 b
.long 2 5 b, 2 9 b
.long 3 0 b, 2 9 b
.long 3 1 b, 2 9 b
.long 3 2 b, 2 9 b
.long 3 3 b, 2 9 b
.long 3 4 b, 2 9 b
.long 3 5 b, 2 9 b
