2019-05-27 08:55:01 +02:00
/* SPDX-License-Identifier: GPL-2.0-or-later */
2005-10-28 22:53:37 +10:00
/ *
* Copyright ( C ) 1 9 9 6 P a u l M a c k e r r a s .
*
* NOTE : assert( s i z e o f ( b u f ) > 2 3 * s i z e o f ( l o n g ) )
* /
# include < a s m / p r o c e s s o r . h >
# include < a s m / p p c _ a s m . h >
# include < a s m / a s m - o f f s e t s . h >
2010-11-18 15:06:17 +00:00
# include < a s m / p t r a c e . h >
2018-07-05 16:24:57 +00:00
# include < a s m / a s m - c o m p a t . h >
2005-10-28 22:53:37 +10:00
/ *
* Grab t h e r e g i s t e r v a l u e s a s t h e y a r e n o w .
2011-03-30 22:57:33 -03:00
* This w o n ' t d o a p a r t i c u l a r l y g o o d j o b b e c a u s e w e r e a l l y
2005-10-28 22:53:37 +10:00
* want o u r c a l l e r ' s c a l l e r ' s r e g i s t e r s , a n d o u r c a l l e r h a s
* already e x e c u t e d i t s p r o l o g u e .
* ToDo : We c o u l d r e a c h b a c k i n t o t h e c a l l e r ' s s a v e a r e a t o d o
* a b e t t e r j o b o f r e p r e s e n t i n g t h e c a l l e r ' s s t a t e ( n o t e t h a t
* that w i l l b e d i f f e r e n t f o r 3 2 - b i t a n d 6 4 - b i t , b e c a u s e o f t h e
* different A B I s , t h o u g h ) .
* /
2008-12-17 10:08:55 +00:00
_ GLOBAL( p p c _ s a v e _ r e g s )
[PATCH] powerpc: Consolidate asm compatibility macros
This patch consolidates macros used to generate assembly for
compatibility across different CPUs or configs. A new header,
asm-powerpc/asm-compat.h contains the main compatibility macros. It
uses some preprocessor magic to make the macros suitable both for use
in .S files, and in inline asm in .c files. Headers (bitops.h,
uaccess.h, atomic.h, bug.h) which had their own such compatibility
macros are changed to use asm-compat.h.
ppc_asm.h is now for use in .S files *only*, and a #error enforces
that. As such, we're a lot more careless about namespace pollution
here than in asm-compat.h.
While we're at it, this patch adds a call to the PPC405_ERR77 macro in
futex.h which should have had it already, but didn't.
Built and booted on pSeries, Maple and iSeries (ARCH=powerpc). Built
for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc).
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-10 12:56:55 +11:00
PPC_ S T L r0 ,0 * S Z L ( r3 )
2018-04-17 19:08:18 +02:00
# ifdef C O N F I G _ P P C 3 2
stmw r2 , 2 * S Z L ( r3 )
# else
[PATCH] powerpc: Consolidate asm compatibility macros
This patch consolidates macros used to generate assembly for
compatibility across different CPUs or configs. A new header,
asm-powerpc/asm-compat.h contains the main compatibility macros. It
uses some preprocessor magic to make the macros suitable both for use
in .S files, and in inline asm in .c files. Headers (bitops.h,
uaccess.h, atomic.h, bug.h) which had their own such compatibility
macros are changed to use asm-compat.h.
ppc_asm.h is now for use in .S files *only*, and a #error enforces
that. As such, we're a lot more careless about namespace pollution
here than in asm-compat.h.
While we're at it, this patch adds a call to the PPC405_ERR77 macro in
futex.h which should have had it already, but didn't.
Built and booted on pSeries, Maple and iSeries (ARCH=powerpc). Built
for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc).
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-10 12:56:55 +11:00
PPC_ S T L r2 ,2 * S Z L ( r3 )
PPC_ S T L r3 ,3 * S Z L ( r3 )
PPC_ S T L r4 ,4 * S Z L ( r3 )
PPC_ S T L r5 ,5 * S Z L ( r3 )
PPC_ S T L r6 ,6 * S Z L ( r3 )
PPC_ S T L r7 ,7 * S Z L ( r3 )
PPC_ S T L r8 ,8 * S Z L ( r3 )
PPC_ S T L r9 ,9 * S Z L ( r3 )
PPC_ S T L r10 ,1 0 * S Z L ( r3 )
PPC_ S T L r11 ,1 1 * S Z L ( r3 )
PPC_ S T L r12 ,1 2 * S Z L ( r3 )
PPC_ S T L r13 ,1 3 * S Z L ( r3 )
PPC_ S T L r14 ,1 4 * S Z L ( r3 )
PPC_ S T L r15 ,1 5 * S Z L ( r3 )
PPC_ S T L r16 ,1 6 * S Z L ( r3 )
PPC_ S T L r17 ,1 7 * S Z L ( r3 )
PPC_ S T L r18 ,1 8 * S Z L ( r3 )
PPC_ S T L r19 ,1 9 * S Z L ( r3 )
PPC_ S T L r20 ,2 0 * S Z L ( r3 )
PPC_ S T L r21 ,2 1 * S Z L ( r3 )
PPC_ S T L r22 ,2 2 * S Z L ( r3 )
PPC_ S T L r23 ,2 3 * S Z L ( r3 )
PPC_ S T L r24 ,2 4 * S Z L ( r3 )
PPC_ S T L r25 ,2 5 * S Z L ( r3 )
PPC_ S T L r26 ,2 6 * S Z L ( r3 )
PPC_ S T L r27 ,2 7 * S Z L ( r3 )
PPC_ S T L r28 ,2 8 * S Z L ( r3 )
PPC_ S T L r29 ,2 9 * S Z L ( r3 )
PPC_ S T L r30 ,3 0 * S Z L ( r3 )
PPC_ S T L r31 ,3 1 * S Z L ( r3 )
powerpc: Improve ppc_save_regs()
Make ppc_save_regs() a bit more useful:
- Set NIP to our caller rather rather than the caller's
caller (which is what we save to LR in the stack frame).
- Set SOFTE to the current irq soft-mask state rather than
uninitialised.
- Zero CFAR rather than leave it uninitialised.
In qemu, injecting a nmi to an idle CPU gives a nicer stack
trace (note NIP, IRQMASK, CFAR).
Oops: System Reset, sig: 6 [#1]
LE PAGE_SIZE=64K MMU=Hash PREEMPT SMP NR_CPUS=2048 NUMA PowerNV
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.6.0-rc2-00429-ga76e38fd80bf #1277
NIP: c0000000000b6e5c LR: c0000000000b6e5c CTR: c000000000b06270
REGS: c00000000173fb08 TRAP: 0100 Not tainted
MSR: 9000000000001033 <SF,HV,ME,IR,DR,RI,LE> CR: 28000224 XER: 00000000
CFAR: c0000000016a2128 IRQMASK: c00000000173fc80
GPR00: c0000000000b6e5c c00000000173fc80 c000000001743400 c00000000173fb08
GPR04: 0000000000000000 0000000000000000 0000000000000008 0000000000000001
GPR08: 00000001fea80000 0000000000000000 0000000000000000 ffffffffffffffff
GPR12: c000000000b06270 c000000001930000 00000000300026c0 0000000000000000
GPR16: 0000000000000000 0000000000000000 0000000000000003 c0000000016a2128
GPR20: c0000001ffc97148 0000000000000001 c000000000f289a8 0000000000080000
GPR24: c0000000016e1480 000000011dc870ba 0000000000000000 0000000000000003
GPR28: c0000000016a2128 c0000001ffc97148 c0000000016a2260 0000000000000003
NIP [c0000000000b6e5c] power9_idle_type+0x5c/0x70
LR [c0000000000b6e5c] power9_idle_type+0x5c/0x70
Call Trace:
[c00000000173fc80] [c0000000000b6e5c] power9_idle_type+0x5c/0x70 (unreliable)
[c00000000173fcb0] [c000000000b062b0] stop_loop+0x40/0x60
[c00000000173fce0] [c000000000b022d8] cpuidle_enter_state+0xa8/0x660
[c00000000173fd60] [c000000000b0292c] cpuidle_enter+0x4c/0x70
[c00000000173fda0] [c00000000017624c] call_cpuidle+0x4c/0x90
[c00000000173fdc0] [c000000000176768] do_idle+0x338/0x460
[c00000000173fe60] [c000000000176b3c] cpu_startup_entry+0x3c/0x40
[c00000000173fe90] [c0000000000126b4] rest_init+0x124/0x140
[c00000000173fed0] [c0000000010948d4] start_kernel+0x938/0x988
[c00000000173ff90] [c00000000000cdcc] start_here_common+0x1c/0x20
Oops: System Reset, sig: 6 [#1]
LE PAGE_SIZE=64K MMU=Hash PREEMPT SMP NR_CPUS=2048 NUMA PowerNV
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.6.0-rc2-00430-gddce91b8712f #1278
NIP: c00000000001d150 LR: c0000000000b6e5c CTR: c000000000b06270
REGS: c00000000173fb08 TRAP: 0100 Not tainted
MSR: 9000000000001033 <SF,HV,ME,IR,DR,RI,LE> CR: 28000224 XER: 00000000
CFAR: 0000000000000000 IRQMASK: 1
GPR00: c0000000000b6e5c c00000000173fc80 c000000001743400 c00000000173fb08
GPR04: 0000000000000000 0000000000000000 0000000000000008 0000000000000001
GPR08: 00000001fea80000 0000000000000000 0000000000000000 ffffffffffffffff
GPR12: c000000000b06270 c000000001930000 00000000300026c0 0000000000000000
GPR16: 0000000000000000 0000000000000000 0000000000000003 c0000000016a2128
GPR20: c0000001ffc97148 0000000000000001 c000000000f289a8 0000000000080000
GPR24: c0000000016e1480 00000000b68db8ce 0000000000000000 0000000000000003
GPR28: c0000000016a2128 c0000001ffc97148 c0000000016a2260 0000000000000003
NIP [c00000000001d150] replay_system_reset+0x30/0xa0
LR [c0000000000b6e5c] power9_idle_type+0x5c/0x70
Call Trace:
[c00000000173fc80] [c0000000000b6e5c] power9_idle_type+0x5c/0x70 (unreliable)
[c00000000173fcb0] [c000000000b062b0] stop_loop+0x40/0x60
[c00000000173fce0] [c000000000b022d8] cpuidle_enter_state+0xa8/0x660
[c00000000173fd60] [c000000000b0292c] cpuidle_enter+0x4c/0x70
[c00000000173fda0] [c00000000017624c] call_cpuidle+0x4c/0x90
[c00000000173fdc0] [c000000000176768] do_idle+0x338/0x460
[c00000000173fe60] [c000000000176b38] cpu_startup_entry+0x38/0x40
[c00000000173fe90] [c0000000000126b4] rest_init+0x124/0x140
[c00000000173fed0] [c0000000010948d4] start_kernel+0x938/0x988
[c00000000173ff90] [c00000000000cdcc] start_here_common+0x1c/0x20
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200403131006.123243-1-npiggin@gmail.com
2020-04-03 23:10:05 +10:00
lbz r0 ,P A C A I R Q S O F T M A S K ( r13 )
PPC_ S T L r0 ,S O F T E - S T A C K _ F R A M E _ O V E R H E A D ( r3 )
2018-04-17 19:08:18 +02:00
# endif
2005-10-28 22:53:37 +10:00
/* go up one stack frame for SP */
[PATCH] powerpc: Consolidate asm compatibility macros
This patch consolidates macros used to generate assembly for
compatibility across different CPUs or configs. A new header,
asm-powerpc/asm-compat.h contains the main compatibility macros. It
uses some preprocessor magic to make the macros suitable both for use
in .S files, and in inline asm in .c files. Headers (bitops.h,
uaccess.h, atomic.h, bug.h) which had their own such compatibility
macros are changed to use asm-compat.h.
ppc_asm.h is now for use in .S files *only*, and a #error enforces
that. As such, we're a lot more careless about namespace pollution
here than in asm-compat.h.
While we're at it, this patch adds a call to the PPC405_ERR77 macro in
futex.h which should have had it already, but didn't.
Built and booted on pSeries, Maple and iSeries (ARCH=powerpc). Built
for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc).
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-10 12:56:55 +11:00
PPC_ L L r4 ,0 ( r1 )
PPC_ S T L r4 ,1 * S Z L ( r3 )
2005-10-28 22:53:37 +10:00
/* get caller's LR */
[PATCH] powerpc: Consolidate asm compatibility macros
This patch consolidates macros used to generate assembly for
compatibility across different CPUs or configs. A new header,
asm-powerpc/asm-compat.h contains the main compatibility macros. It
uses some preprocessor magic to make the macros suitable both for use
in .S files, and in inline asm in .c files. Headers (bitops.h,
uaccess.h, atomic.h, bug.h) which had their own such compatibility
macros are changed to use asm-compat.h.
ppc_asm.h is now for use in .S files *only*, and a #error enforces
that. As such, we're a lot more careless about namespace pollution
here than in asm-compat.h.
While we're at it, this patch adds a call to the PPC405_ERR77 macro in
futex.h which should have had it already, but didn't.
Built and booted on pSeries, Maple and iSeries (ARCH=powerpc). Built
for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc).
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-10 12:56:55 +11:00
PPC_ L L r0 ,L R S A V E ( r4 )
PPC_ S T L r0 ,_ L I N K - S T A C K _ F R A M E _ O V E R H E A D ( r3 )
powerpc: Improve ppc_save_regs()
Make ppc_save_regs() a bit more useful:
- Set NIP to our caller rather rather than the caller's
caller (which is what we save to LR in the stack frame).
- Set SOFTE to the current irq soft-mask state rather than
uninitialised.
- Zero CFAR rather than leave it uninitialised.
In qemu, injecting a nmi to an idle CPU gives a nicer stack
trace (note NIP, IRQMASK, CFAR).
Oops: System Reset, sig: 6 [#1]
LE PAGE_SIZE=64K MMU=Hash PREEMPT SMP NR_CPUS=2048 NUMA PowerNV
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.6.0-rc2-00429-ga76e38fd80bf #1277
NIP: c0000000000b6e5c LR: c0000000000b6e5c CTR: c000000000b06270
REGS: c00000000173fb08 TRAP: 0100 Not tainted
MSR: 9000000000001033 <SF,HV,ME,IR,DR,RI,LE> CR: 28000224 XER: 00000000
CFAR: c0000000016a2128 IRQMASK: c00000000173fc80
GPR00: c0000000000b6e5c c00000000173fc80 c000000001743400 c00000000173fb08
GPR04: 0000000000000000 0000000000000000 0000000000000008 0000000000000001
GPR08: 00000001fea80000 0000000000000000 0000000000000000 ffffffffffffffff
GPR12: c000000000b06270 c000000001930000 00000000300026c0 0000000000000000
GPR16: 0000000000000000 0000000000000000 0000000000000003 c0000000016a2128
GPR20: c0000001ffc97148 0000000000000001 c000000000f289a8 0000000000080000
GPR24: c0000000016e1480 000000011dc870ba 0000000000000000 0000000000000003
GPR28: c0000000016a2128 c0000001ffc97148 c0000000016a2260 0000000000000003
NIP [c0000000000b6e5c] power9_idle_type+0x5c/0x70
LR [c0000000000b6e5c] power9_idle_type+0x5c/0x70
Call Trace:
[c00000000173fc80] [c0000000000b6e5c] power9_idle_type+0x5c/0x70 (unreliable)
[c00000000173fcb0] [c000000000b062b0] stop_loop+0x40/0x60
[c00000000173fce0] [c000000000b022d8] cpuidle_enter_state+0xa8/0x660
[c00000000173fd60] [c000000000b0292c] cpuidle_enter+0x4c/0x70
[c00000000173fda0] [c00000000017624c] call_cpuidle+0x4c/0x90
[c00000000173fdc0] [c000000000176768] do_idle+0x338/0x460
[c00000000173fe60] [c000000000176b3c] cpu_startup_entry+0x3c/0x40
[c00000000173fe90] [c0000000000126b4] rest_init+0x124/0x140
[c00000000173fed0] [c0000000010948d4] start_kernel+0x938/0x988
[c00000000173ff90] [c00000000000cdcc] start_here_common+0x1c/0x20
Oops: System Reset, sig: 6 [#1]
LE PAGE_SIZE=64K MMU=Hash PREEMPT SMP NR_CPUS=2048 NUMA PowerNV
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.6.0-rc2-00430-gddce91b8712f #1278
NIP: c00000000001d150 LR: c0000000000b6e5c CTR: c000000000b06270
REGS: c00000000173fb08 TRAP: 0100 Not tainted
MSR: 9000000000001033 <SF,HV,ME,IR,DR,RI,LE> CR: 28000224 XER: 00000000
CFAR: 0000000000000000 IRQMASK: 1
GPR00: c0000000000b6e5c c00000000173fc80 c000000001743400 c00000000173fb08
GPR04: 0000000000000000 0000000000000000 0000000000000008 0000000000000001
GPR08: 00000001fea80000 0000000000000000 0000000000000000 ffffffffffffffff
GPR12: c000000000b06270 c000000001930000 00000000300026c0 0000000000000000
GPR16: 0000000000000000 0000000000000000 0000000000000003 c0000000016a2128
GPR20: c0000001ffc97148 0000000000000001 c000000000f289a8 0000000000080000
GPR24: c0000000016e1480 00000000b68db8ce 0000000000000000 0000000000000003
GPR28: c0000000016a2128 c0000001ffc97148 c0000000016a2260 0000000000000003
NIP [c00000000001d150] replay_system_reset+0x30/0xa0
LR [c0000000000b6e5c] power9_idle_type+0x5c/0x70
Call Trace:
[c00000000173fc80] [c0000000000b6e5c] power9_idle_type+0x5c/0x70 (unreliable)
[c00000000173fcb0] [c000000000b062b0] stop_loop+0x40/0x60
[c00000000173fce0] [c000000000b022d8] cpuidle_enter_state+0xa8/0x660
[c00000000173fd60] [c000000000b0292c] cpuidle_enter+0x4c/0x70
[c00000000173fda0] [c00000000017624c] call_cpuidle+0x4c/0x90
[c00000000173fdc0] [c000000000176768] do_idle+0x338/0x460
[c00000000173fe60] [c000000000176b38] cpu_startup_entry+0x38/0x40
[c00000000173fe90] [c0000000000126b4] rest_init+0x124/0x140
[c00000000173fed0] [c0000000010948d4] start_kernel+0x938/0x988
[c00000000173ff90] [c00000000000cdcc] start_here_common+0x1c/0x20
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200403131006.123243-1-npiggin@gmail.com
2020-04-03 23:10:05 +10:00
mflr r0
PPC_ S T L r0 ,_ N I P - S T A C K _ F R A M E _ O V E R H E A D ( r3 )
2005-10-28 22:53:37 +10:00
mfmsr r0
[PATCH] powerpc: Consolidate asm compatibility macros
This patch consolidates macros used to generate assembly for
compatibility across different CPUs or configs. A new header,
asm-powerpc/asm-compat.h contains the main compatibility macros. It
uses some preprocessor magic to make the macros suitable both for use
in .S files, and in inline asm in .c files. Headers (bitops.h,
uaccess.h, atomic.h, bug.h) which had their own such compatibility
macros are changed to use asm-compat.h.
ppc_asm.h is now for use in .S files *only*, and a #error enforces
that. As such, we're a lot more careless about namespace pollution
here than in asm-compat.h.
While we're at it, this patch adds a call to the PPC405_ERR77 macro in
futex.h which should have had it already, but didn't.
Built and booted on pSeries, Maple and iSeries (ARCH=powerpc). Built
for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc).
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-10 12:56:55 +11:00
PPC_ S T L r0 ,_ M S R - S T A C K _ F R A M E _ O V E R H E A D ( r3 )
2005-10-28 22:53:37 +10:00
mfctr r0
[PATCH] powerpc: Consolidate asm compatibility macros
This patch consolidates macros used to generate assembly for
compatibility across different CPUs or configs. A new header,
asm-powerpc/asm-compat.h contains the main compatibility macros. It
uses some preprocessor magic to make the macros suitable both for use
in .S files, and in inline asm in .c files. Headers (bitops.h,
uaccess.h, atomic.h, bug.h) which had their own such compatibility
macros are changed to use asm-compat.h.
ppc_asm.h is now for use in .S files *only*, and a #error enforces
that. As such, we're a lot more careless about namespace pollution
here than in asm-compat.h.
While we're at it, this patch adds a call to the PPC405_ERR77 macro in
futex.h which should have had it already, but didn't.
Built and booted on pSeries, Maple and iSeries (ARCH=powerpc). Built
for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc).
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-10 12:56:55 +11:00
PPC_ S T L r0 ,_ C T R - S T A C K _ F R A M E _ O V E R H E A D ( r3 )
2005-10-28 22:53:37 +10:00
mfxer r0
[PATCH] powerpc: Consolidate asm compatibility macros
This patch consolidates macros used to generate assembly for
compatibility across different CPUs or configs. A new header,
asm-powerpc/asm-compat.h contains the main compatibility macros. It
uses some preprocessor magic to make the macros suitable both for use
in .S files, and in inline asm in .c files. Headers (bitops.h,
uaccess.h, atomic.h, bug.h) which had their own such compatibility
macros are changed to use asm-compat.h.
ppc_asm.h is now for use in .S files *only*, and a #error enforces
that. As such, we're a lot more careless about namespace pollution
here than in asm-compat.h.
While we're at it, this patch adds a call to the PPC405_ERR77 macro in
futex.h which should have had it already, but didn't.
Built and booted on pSeries, Maple and iSeries (ARCH=powerpc). Built
for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc).
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-10 12:56:55 +11:00
PPC_ S T L r0 ,_ X E R - S T A C K _ F R A M E _ O V E R H E A D ( r3 )
2005-10-28 22:53:37 +10:00
mfcr r0
[PATCH] powerpc: Consolidate asm compatibility macros
This patch consolidates macros used to generate assembly for
compatibility across different CPUs or configs. A new header,
asm-powerpc/asm-compat.h contains the main compatibility macros. It
uses some preprocessor magic to make the macros suitable both for use
in .S files, and in inline asm in .c files. Headers (bitops.h,
uaccess.h, atomic.h, bug.h) which had their own such compatibility
macros are changed to use asm-compat.h.
ppc_asm.h is now for use in .S files *only*, and a #error enforces
that. As such, we're a lot more careless about namespace pollution
here than in asm-compat.h.
While we're at it, this patch adds a call to the PPC405_ERR77 macro in
futex.h which should have had it already, but didn't.
Built and booted on pSeries, Maple and iSeries (ARCH=powerpc). Built
for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc).
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-10 12:56:55 +11:00
PPC_ S T L r0 ,_ C C R - S T A C K _ F R A M E _ O V E R H E A D ( r3 )
2005-10-28 22:53:37 +10:00
li r0 ,0
[PATCH] powerpc: Consolidate asm compatibility macros
This patch consolidates macros used to generate assembly for
compatibility across different CPUs or configs. A new header,
asm-powerpc/asm-compat.h contains the main compatibility macros. It
uses some preprocessor magic to make the macros suitable both for use
in .S files, and in inline asm in .c files. Headers (bitops.h,
uaccess.h, atomic.h, bug.h) which had their own such compatibility
macros are changed to use asm-compat.h.
ppc_asm.h is now for use in .S files *only*, and a #error enforces
that. As such, we're a lot more careless about namespace pollution
here than in asm-compat.h.
While we're at it, this patch adds a call to the PPC405_ERR77 macro in
futex.h which should have had it already, but didn't.
Built and booted on pSeries, Maple and iSeries (ARCH=powerpc). Built
for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc).
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-10 12:56:55 +11:00
PPC_ S T L r0 ,_ T R A P - S T A C K _ F R A M E _ O V E R H E A D ( r3 )
powerpc: Improve ppc_save_regs()
Make ppc_save_regs() a bit more useful:
- Set NIP to our caller rather rather than the caller's
caller (which is what we save to LR in the stack frame).
- Set SOFTE to the current irq soft-mask state rather than
uninitialised.
- Zero CFAR rather than leave it uninitialised.
In qemu, injecting a nmi to an idle CPU gives a nicer stack
trace (note NIP, IRQMASK, CFAR).
Oops: System Reset, sig: 6 [#1]
LE PAGE_SIZE=64K MMU=Hash PREEMPT SMP NR_CPUS=2048 NUMA PowerNV
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.6.0-rc2-00429-ga76e38fd80bf #1277
NIP: c0000000000b6e5c LR: c0000000000b6e5c CTR: c000000000b06270
REGS: c00000000173fb08 TRAP: 0100 Not tainted
MSR: 9000000000001033 <SF,HV,ME,IR,DR,RI,LE> CR: 28000224 XER: 00000000
CFAR: c0000000016a2128 IRQMASK: c00000000173fc80
GPR00: c0000000000b6e5c c00000000173fc80 c000000001743400 c00000000173fb08
GPR04: 0000000000000000 0000000000000000 0000000000000008 0000000000000001
GPR08: 00000001fea80000 0000000000000000 0000000000000000 ffffffffffffffff
GPR12: c000000000b06270 c000000001930000 00000000300026c0 0000000000000000
GPR16: 0000000000000000 0000000000000000 0000000000000003 c0000000016a2128
GPR20: c0000001ffc97148 0000000000000001 c000000000f289a8 0000000000080000
GPR24: c0000000016e1480 000000011dc870ba 0000000000000000 0000000000000003
GPR28: c0000000016a2128 c0000001ffc97148 c0000000016a2260 0000000000000003
NIP [c0000000000b6e5c] power9_idle_type+0x5c/0x70
LR [c0000000000b6e5c] power9_idle_type+0x5c/0x70
Call Trace:
[c00000000173fc80] [c0000000000b6e5c] power9_idle_type+0x5c/0x70 (unreliable)
[c00000000173fcb0] [c000000000b062b0] stop_loop+0x40/0x60
[c00000000173fce0] [c000000000b022d8] cpuidle_enter_state+0xa8/0x660
[c00000000173fd60] [c000000000b0292c] cpuidle_enter+0x4c/0x70
[c00000000173fda0] [c00000000017624c] call_cpuidle+0x4c/0x90
[c00000000173fdc0] [c000000000176768] do_idle+0x338/0x460
[c00000000173fe60] [c000000000176b3c] cpu_startup_entry+0x3c/0x40
[c00000000173fe90] [c0000000000126b4] rest_init+0x124/0x140
[c00000000173fed0] [c0000000010948d4] start_kernel+0x938/0x988
[c00000000173ff90] [c00000000000cdcc] start_here_common+0x1c/0x20
Oops: System Reset, sig: 6 [#1]
LE PAGE_SIZE=64K MMU=Hash PREEMPT SMP NR_CPUS=2048 NUMA PowerNV
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.6.0-rc2-00430-gddce91b8712f #1278
NIP: c00000000001d150 LR: c0000000000b6e5c CTR: c000000000b06270
REGS: c00000000173fb08 TRAP: 0100 Not tainted
MSR: 9000000000001033 <SF,HV,ME,IR,DR,RI,LE> CR: 28000224 XER: 00000000
CFAR: 0000000000000000 IRQMASK: 1
GPR00: c0000000000b6e5c c00000000173fc80 c000000001743400 c00000000173fb08
GPR04: 0000000000000000 0000000000000000 0000000000000008 0000000000000001
GPR08: 00000001fea80000 0000000000000000 0000000000000000 ffffffffffffffff
GPR12: c000000000b06270 c000000001930000 00000000300026c0 0000000000000000
GPR16: 0000000000000000 0000000000000000 0000000000000003 c0000000016a2128
GPR20: c0000001ffc97148 0000000000000001 c000000000f289a8 0000000000080000
GPR24: c0000000016e1480 00000000b68db8ce 0000000000000000 0000000000000003
GPR28: c0000000016a2128 c0000001ffc97148 c0000000016a2260 0000000000000003
NIP [c00000000001d150] replay_system_reset+0x30/0xa0
LR [c0000000000b6e5c] power9_idle_type+0x5c/0x70
Call Trace:
[c00000000173fc80] [c0000000000b6e5c] power9_idle_type+0x5c/0x70 (unreliable)
[c00000000173fcb0] [c000000000b062b0] stop_loop+0x40/0x60
[c00000000173fce0] [c000000000b022d8] cpuidle_enter_state+0xa8/0x660
[c00000000173fd60] [c000000000b0292c] cpuidle_enter+0x4c/0x70
[c00000000173fda0] [c00000000017624c] call_cpuidle+0x4c/0x90
[c00000000173fdc0] [c000000000176768] do_idle+0x338/0x460
[c00000000173fe60] [c000000000176b38] cpu_startup_entry+0x38/0x40
[c00000000173fe90] [c0000000000126b4] rest_init+0x124/0x140
[c00000000173fed0] [c0000000010948d4] start_kernel+0x938/0x988
[c00000000173ff90] [c00000000000cdcc] start_here_common+0x1c/0x20
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200403131006.123243-1-npiggin@gmail.com
2020-04-03 23:10:05 +10:00
PPC_ S T L r0 ,O R I G _ G P R 3 - S T A C K _ F R A M E _ O V E R H E A D ( r3 )
2005-10-28 22:53:37 +10:00
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