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/*
* Freescale eSDHC controller driver .
*
* Copyright ( c ) 2007 Freescale Semiconductor , Inc .
* Copyright ( c ) 2009 MontaVista Software , Inc .
*
* Authors : Xiaobo Xie < X . Xie @ freescale . com >
* Anton Vorontsov < avorontsov @ ru . mvista . com >
*
* This program is free software ; you can redistribute it and / or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation ; either version 2 of the License , or ( at
* your option ) any later version .
*/
# include <linux/io.h>
# include <linux/delay.h>
# include <linux/mmc/host.h>
# include "sdhci-of.h"
# include "sdhci.h"
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# include "sdhci-esdhc.h"
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static u16 esdhc_readw ( struct sdhci_host * host , int reg )
{
u16 ret ;
if ( unlikely ( reg = = SDHCI_HOST_VERSION ) )
ret = in_be16 ( host - > ioaddr + reg ) ;
else
ret = sdhci_be32bs_readw ( host , reg ) ;
return ret ;
}
static void esdhc_writew ( struct sdhci_host * host , u16 val , int reg )
{
if ( reg = = SDHCI_BLOCK_SIZE ) {
/*
* Two last DMA bits are reserved , and first one is used for
* non - standard blksz of 4096 bytes that we don ' t support
* yet . So clear the DMA boundary bits .
*/
val & = ~ SDHCI_MAKE_BLKSZ ( 0x7 , 0 ) ;
}
sdhci_be32bs_writew ( host , val , reg ) ;
}
static void esdhc_writeb ( struct sdhci_host * host , u8 val , int reg )
{
/* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
if ( reg = = SDHCI_HOST_CONTROL )
val & = ~ ESDHC_HOST_CONTROL_RES ;
sdhci_be32bs_writeb ( host , val , reg ) ;
}
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static int esdhc_of_enable_dma ( struct sdhci_host * host )
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{
setbits32 ( host - > ioaddr + ESDHC_DMA_SYSCTL , ESDHC_DMA_SNOOP ) ;
return 0 ;
}
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static unsigned int esdhc_of_get_max_clock ( struct sdhci_host * host )
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{
struct sdhci_of_host * of_host = sdhci_priv ( host ) ;
return of_host - > clock ;
}
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static unsigned int esdhc_of_get_min_clock ( struct sdhci_host * host )
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{
struct sdhci_of_host * of_host = sdhci_priv ( host ) ;
return of_host - > clock / 256 / 16 ;
}
struct sdhci_of_data sdhci_esdhc = {
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/* card detection could be handled via GPIO */
. quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION ,
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. ops = {
sdhci: build fix: rename SDHCI I/O accessor functions
Unfortunately some architectures #define their read{b,w,l} and
write{b,w,l} I/O accessors which makes the SDHCI I/O accessor functions of
the same names subject to preprocessing. This leads to the following
compiler error,
In file included from drivers/mmc/host/sdhci.c:26:
drivers/mmc/host/sdhci.h:318:35: error: macro "writel" passed 3 arguments, but takes just 2
Rename the SDHCI I/O functions so that CONFIG_MMC_SDHCI_IO_ACCESSORS can
be enabled for architectures that implement their read{b,w,l} and
write{b,w,l} functions with macros.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Cc: Zhangfei Gao <zgao6@marvell.com>
Acked-by: Anton Vorontsov <cbouatmailru@gmail.com>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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. read_l = sdhci_be32bs_readl ,
. read_w = esdhc_readw ,
. read_b = sdhci_be32bs_readb ,
. write_l = sdhci_be32bs_writel ,
. write_w = esdhc_writew ,
. write_b = esdhc_writeb ,
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. set_clock = esdhc_set_clock ,
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. enable_dma = esdhc_of_enable_dma ,
. get_max_clock = esdhc_of_get_max_clock ,
. get_min_clock = esdhc_of_get_min_clock ,
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} ,
} ;