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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright ( c ) 2011 - 2012 , The Linux Foundation . All rights reserved .
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*
* Description : CoreSight Trace Port Interface Unit driver
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*/
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# include <linux/atomic.h>
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# include <linux/kernel.h>
# include <linux/init.h>
# include <linux/device.h>
# include <linux/io.h>
# include <linux/err.h>
# include <linux/slab.h>
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# include <linux/pm_runtime.h>
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# include <linux/coresight.h>
# include <linux/amba/bus.h>
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# include <linux/clk.h>
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# include "coresight-priv.h"
# define TPIU_SUPP_PORTSZ 0x000
# define TPIU_CURR_PORTSZ 0x004
# define TPIU_SUPP_TRIGMODES 0x100
# define TPIU_TRIG_CNTRVAL 0x104
# define TPIU_TRIG_MULT 0x108
# define TPIU_SUPP_TESTPATM 0x200
# define TPIU_CURR_TESTPATM 0x204
# define TPIU_TEST_PATREPCNTR 0x208
# define TPIU_FFSR 0x300
# define TPIU_FFCR 0x304
# define TPIU_FSYNC_CNTR 0x308
# define TPIU_EXTCTL_INPORT 0x400
# define TPIU_EXTCTL_OUTPORT 0x404
# define TPIU_ITTRFLINACK 0xee4
# define TPIU_ITTRFLIN 0xee8
# define TPIU_ITATBDATA0 0xeec
# define TPIU_ITATBCTR2 0xef0
# define TPIU_ITATBCTR1 0xef4
# define TPIU_ITATBCTR0 0xef8
/** register definition **/
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/* FFSR - 0x300 */
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# define FFSR_FT_STOPPED_BIT 1
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/* FFCR - 0x304 */
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# define FFCR_FON_MAN_BIT 6
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# define FFCR_FON_MAN BIT(6)
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# define FFCR_STOP_FI BIT(12)
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DEFINE_CORESIGHT_DEVLIST ( tpiu_devs , " tpiu " ) ;
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/*
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* @ base : memory mapped base address for this component .
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* @ atclk : optional clock for the core parts of the TPIU .
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* @ csdev : component vitals needed by the framework .
*/
struct tpiu_drvdata {
void __iomem * base ;
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struct clk * atclk ;
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struct coresight_device * csdev ;
} ;
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static void tpiu_enable_hw ( struct csdev_access * csa )
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{
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CS_UNLOCK ( csa - > base ) ;
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/* TODO: fill this up */
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CS_LOCK ( csa - > base ) ;
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}
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static int tpiu_enable ( struct coresight_device * csdev , u32 mode , void * __unused )
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{
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tpiu_enable_hw ( & csdev - > access ) ;
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atomic_inc ( csdev - > refcnt ) ;
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dev_dbg ( & csdev - > dev , " TPIU enabled \n " ) ;
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return 0 ;
}
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static void tpiu_disable_hw ( struct csdev_access * csa )
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{
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CS_UNLOCK ( csa - > base ) ;
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/* Clear formatter and stop on flush */
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csdev_access_relaxed_write32 ( csa , FFCR_STOP_FI , TPIU_FFCR ) ;
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/* Generate manual flush */
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csdev_access_relaxed_write32 ( csa , FFCR_STOP_FI | FFCR_FON_MAN , TPIU_FFCR ) ;
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/* Wait for flush to complete */
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coresight_timeout ( csa , TPIU_FFCR , FFCR_FON_MAN_BIT , 0 ) ;
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/* Wait for formatter to stop */
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coresight_timeout ( csa , TPIU_FFSR , FFSR_FT_STOPPED_BIT , 1 ) ;
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CS_LOCK ( csa - > base ) ;
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}
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static int tpiu_disable ( struct coresight_device * csdev )
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{
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if ( atomic_dec_return ( csdev - > refcnt ) )
return - EBUSY ;
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tpiu_disable_hw ( & csdev - > access ) ;
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dev_dbg ( & csdev - > dev , " TPIU disabled \n " ) ;
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return 0 ;
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}
static const struct coresight_ops_sink tpiu_sink_ops = {
. enable = tpiu_enable ,
. disable = tpiu_disable ,
} ;
static const struct coresight_ops tpiu_cs_ops = {
. sink_ops = & tpiu_sink_ops ,
} ;
static int tpiu_probe ( struct amba_device * adev , const struct amba_id * id )
{
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int ret ;
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void __iomem * base ;
struct device * dev = & adev - > dev ;
struct coresight_platform_data * pdata = NULL ;
struct tpiu_drvdata * drvdata ;
struct resource * res = & adev - > res ;
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struct coresight_desc desc = { 0 } ;
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desc . name = coresight_alloc_device_name ( & tpiu_devs , dev ) ;
if ( ! desc . name )
return - ENOMEM ;
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drvdata = devm_kzalloc ( dev , sizeof ( * drvdata ) , GFP_KERNEL ) ;
if ( ! drvdata )
return - ENOMEM ;
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drvdata - > atclk = devm_clk_get ( & adev - > dev , " atclk " ) ; /* optional */
if ( ! IS_ERR ( drvdata - > atclk ) ) {
ret = clk_prepare_enable ( drvdata - > atclk ) ;
if ( ret )
return ret ;
}
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dev_set_drvdata ( dev , drvdata ) ;
/* Validity for the resource is already checked by the AMBA core */
base = devm_ioremap_resource ( dev , res ) ;
if ( IS_ERR ( base ) )
return PTR_ERR ( base ) ;
drvdata - > base = base ;
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desc . access = CSDEV_ACCESS_IOMEM ( base ) ;
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/* Disable tpiu to support older devices */
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tpiu_disable_hw ( & desc . access ) ;
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pdata = coresight_get_platform_data ( dev ) ;
if ( IS_ERR ( pdata ) )
return PTR_ERR ( pdata ) ;
dev - > platform_data = pdata ;
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desc . type = CORESIGHT_DEV_TYPE_SINK ;
desc . subtype . sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT ;
desc . ops = & tpiu_cs_ops ;
desc . pdata = pdata ;
desc . dev = dev ;
drvdata - > csdev = coresight_register ( & desc ) ;
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if ( ! IS_ERR ( drvdata - > csdev ) ) {
pm_runtime_put ( & adev - > dev ) ;
return 0 ;
}
return PTR_ERR ( drvdata - > csdev ) ;
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}
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static void tpiu_remove ( struct amba_device * adev )
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{
struct tpiu_drvdata * drvdata = dev_get_drvdata ( & adev - > dev ) ;
coresight_unregister ( drvdata - > csdev ) ;
}
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# ifdef CONFIG_PM
static int tpiu_runtime_suspend ( struct device * dev )
{
struct tpiu_drvdata * drvdata = dev_get_drvdata ( dev ) ;
if ( drvdata & & ! IS_ERR ( drvdata - > atclk ) )
clk_disable_unprepare ( drvdata - > atclk ) ;
return 0 ;
}
static int tpiu_runtime_resume ( struct device * dev )
{
struct tpiu_drvdata * drvdata = dev_get_drvdata ( dev ) ;
if ( drvdata & & ! IS_ERR ( drvdata - > atclk ) )
clk_prepare_enable ( drvdata - > atclk ) ;
return 0 ;
}
# endif
static const struct dev_pm_ops tpiu_dev_pm_ops = {
SET_RUNTIME_PM_OPS ( tpiu_runtime_suspend , tpiu_runtime_resume , NULL )
} ;
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static const struct amba_id tpiu_ids [ ] = {
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{
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. id = 0x000bb912 ,
. mask = 0x000fffff ,
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} ,
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{
. id = 0x0004b912 ,
. mask = 0x0007ffff ,
} ,
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{
/* Coresight SoC-600 */
. id = 0x000bb9e7 ,
. mask = 0x000fffff ,
} ,
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{ 0 , 0 } ,
} ;
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MODULE_DEVICE_TABLE ( amba , tpiu_ids ) ;
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static struct amba_driver tpiu_driver = {
. drv = {
. name = " coresight-tpiu " ,
. owner = THIS_MODULE ,
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. pm = & tpiu_dev_pm_ops ,
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. suppress_bind_attrs = true ,
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} ,
. probe = tpiu_probe ,
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. remove = tpiu_remove ,
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. id_table = tpiu_ids ,
} ;
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module_amba_driver ( tpiu_driver ) ;
MODULE_AUTHOR ( " Pratik Patel <pratikp@codeaurora.org> " ) ;
MODULE_AUTHOR ( " Mathieu Poirier <mathieu.poirier@linaro.org> " ) ;
MODULE_DESCRIPTION ( " Arm CoreSight TPIU (Trace Port Interface Unit) driver " ) ;
MODULE_LICENSE ( " GPL v2 " ) ;