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/ *
* linux/ a r c h / a r m / m m / p r o c - f a52 6 . S : M M U f u n c t i o n s f o r F A 5 2 6
*
* Written b y : L u k e L e e
* Copyright ( C ) 2 0 0 5 F a r a d a y C o r p .
* Copyright ( C ) 2 0 0 8 - 2 0 0 9 P a u l i u s Z a l e c k a s < p a u l i u s . z a l e c k a s @teltonika.lt>
*
* This p r o g r a m i s f r e e s o f t w a r e ; you can redistribute it and/or modify
* it u n d e r t h e t e r m s o f t h e G N U G e n e r a l P u b l i c L i c e n s e a s p u b l i s h e d b y
* the F r e e S o f t w a r e F o u n d a t i o n ; either version 2 of the License, or
* ( at y o u r o p t i o n ) a n y l a t e r v e r s i o n .
*
*
* These a r e t h e l o w l e v e l a s s e m b l e r f o r p e r f o r m i n g c a c h e a n d T L B
* functions o n t h e f a52 6 .
* /
# include < l i n u x / l i n k a g e . h >
# include < l i n u x / i n i t . h >
# include < a s m / a s s e m b l e r . h >
# include < a s m / h w c a p . h >
# include < a s m / p g t a b l e - h w d e f . h >
# include < a s m / p g t a b l e . h >
# include < a s m / p a g e . h >
# include < a s m / p t r a c e . h >
# include " p r o c - m a c r o s . S "
# define C A C H E _ D L I N E S I Z E 1 6
.text
/ *
* cpu_ f a52 6 _ p r o c _ i n i t ( )
* /
ENTRY( c p u _ f a52 6 _ p r o c _ i n i t )
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ret l r
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/ *
* cpu_ f a52 6 _ p r o c _ f i n ( )
* /
ENTRY( c p u _ f a52 6 _ p r o c _ f i n )
mrc p15 , 0 , r0 , c1 , c0 , 0 @ ctrl register
bic r0 , r0 , #0x1000 @ ...i............
bic r0 , r0 , #0x000e @ ............wca.
mcr p15 , 0 , r0 , c1 , c0 , 0 @ disable caches
nop
nop
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ret l r
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/ *
* cpu_ f a52 6 _ r e s e t ( l o c )
*
* Perform a s o f t r e s e t o f t h e s y s t e m . P u t t h e C P U i n t o t h e
* same s t a t e a s i t w o u l d b e i f i t h a d b e e n r e s e t , a n d b r a n c h
* to w h a t w o u l d b e t h e r e s e t v e c t o r .
*
* loc : location t o j u m p t o f o r s o f t r e s e t
* /
.align 4
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.pushsection .idmap .text , " ax"
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ENTRY( c p u _ f a52 6 _ r e s e t )
/* TODO: Use CP8 if possible... */
mov i p , #0
mcr p15 , 0 , i p , c7 , c7 , 0 @ invalidate I,D caches
mcr p15 , 0 , i p , c7 , c10 , 4 @ drain WB
# ifdef C O N F I G _ M M U
mcr p15 , 0 , i p , c8 , c7 , 0 @ invalidate I & D TLBs
# endif
mrc p15 , 0 , i p , c1 , c0 , 0 @ ctrl register
bic i p , i p , #0x000f @ ............wcam
bic i p , i p , #0x1100 @ ...i...s........
bic i p , i p , #0x0800 @ BTB off
mcr p15 , 0 , i p , c1 , c0 , 0 @ ctrl register
nop
nop
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ret r0
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ENDPROC( c p u _ f a52 6 _ r e s e t )
.popsection
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/ *
* cpu_ f a52 6 _ d o _ i d l e ( )
* /
.align 4
ENTRY( c p u _ f a52 6 _ d o _ i d l e )
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ret l r
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ENTRY( c p u _ f a52 6 _ d c a c h e _ c l e a n _ a r e a )
1 : mcr p15 , 0 , r0 , c7 , c10 , 1 @ clean D entry
add r0 , r0 , #C A C H E _ D L I N E S I Z E
subs r1 , r1 , #C A C H E _ D L I N E S I Z E
bhi 1 b
mcr p15 , 0 , r0 , c7 , c10 , 4 @ drain WB
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ret l r
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/* =============================== PageTable ============================== */
/ *
* cpu_ f a52 6 _ s w i t c h _ m m ( p g d )
*
* Set t h e t r a n s l a t i o n b a s e p o i n t e r t o b e a s d e s c r i b e d b y p g d .
*
* pgd : new p a g e t a b l e s
* /
.align 4
ENTRY( c p u _ f a52 6 _ s w i t c h _ m m )
# ifdef C O N F I G _ M M U
mov i p , #0
# ifdef C O N F I G _ C P U _ D C A C H E _ W R I T E T H R O U G H
mcr p15 , 0 , i p , c7 , c6 , 0 @ invalidate D cache
# else
mcr p15 , 0 , i p , c7 , c14 , 0 @ clean and invalidate whole D cache
# endif
mcr p15 , 0 , i p , c7 , c5 , 0 @ invalidate I cache
mcr p15 , 0 , i p , c7 , c5 , 6 @ invalidate BTB since mm changed
mcr p15 , 0 , i p , c7 , c10 , 4 @ data write barrier
mcr p15 , 0 , i p , c7 , c5 , 4 @ prefetch flush
mcr p15 , 0 , r0 , c2 , c0 , 0 @ load page table pointer
mcr p15 , 0 , i p , c8 , c7 , 0 @ invalidate UTLB
# endif
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ret l r
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/ *
* cpu_ f a52 6 _ s e t _ p t e _ e x t ( p t e p , p t e , e x t )
*
* Set a P T E a n d f l u s h i t o u t
* /
.align 4
ENTRY( c p u _ f a52 6 _ s e t _ p t e _ e x t )
# ifdef C O N F I G _ M M U
armv3 _ s e t _ p t e _ e x t
mov r0 , r0
mcr p15 , 0 , r0 , c7 , c10 , 1 @ clean D entry
mov r0 , #0
mcr p15 , 0 , r0 , c7 , c10 , 4 @ drain WB
# endif
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ret l r
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.type _ _ fa5 2 6 _ s e t u p , #f u n c t i o n
__fa526_setup :
/* On return of this routine, r0 must carry correct flags for CFG register */
mov r0 , #0
mcr p15 , 0 , r0 , c7 , c7 @ invalidate I,D caches on v4
mcr p15 , 0 , r0 , c7 , c10 , 4 @ drain write buffer on v4
# ifdef C O N F I G _ M M U
mcr p15 , 0 , r0 , c8 , c7 @ invalidate I,D TLBs on v4
# endif
mcr p15 , 0 , r0 , c7 , c5 , 5 @ invalidate IScratchpad RAM
mov r0 , #1
mcr p15 , 0 , r0 , c1 , c1 , 0 @ turn-on ECR
mov r0 , #0
mcr p15 , 0 , r0 , c7 , c5 , 6 @ invalidate BTB All
mcr p15 , 0 , r0 , c7 , c10 , 4 @ data write barrier
mcr p15 , 0 , r0 , c7 , c5 , 4 @ prefetch flush
mov r0 , #0x1f @ Domains 0, 1 = manager, 2 = client
mcr p15 , 0 , r0 , c3 , c0 @ load domain access register
mrc p15 , 0 , r0 , c1 , c0 @ get control register v4
ldr r5 , f a52 6 _ c r1 _ c l e a r
bic r0 , r0 , r5
ldr r5 , f a52 6 _ c r1 _ s e t
orr r0 , r0 , r5
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ret l r
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.size _ _ fa5 2 6 _ s e t u p , . - _ _ f a52 6 _ s e t u p
/ *
* .RVI ZFRS BLDP W C A M
* . .11 1001 .111 1101
*
* /
.type 5 2 6 _ c r1 _ c l e a r , #o b j e c t
.type 5 2 6 _ c r1 _ s e t , #o b j e c t
fa526_cr1_clear :
.word 0x3f3f
fa526_cr1_set :
.word 0x397D
_ _ INITDATA
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@ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
define_ p r o c e s s o r _ f u n c t i o n s f a52 6 , d a b o r t =v4_early_abort , p a b o r t =legacy_pabort
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.section " .rodata "
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string c p u _ a r c h _ n a m e , " a r m v4 "
string c p u _ e l f _ n a m e , " v4 "
string c p u _ f a52 6 _ n a m e , " F A 5 2 6 "
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.align
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.section " .proc .info .init " , # alloc
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.type _ _ fa5 2 6 _ p r o c _ i n f o ,#o b j e c t
__fa526_proc_info :
.long 0x66015261
.long 0xff01fff1
.long PMD_TYPE_SECT | \
PMD_ S E C T _ B U F F E R A B L E | \
PMD_ S E C T _ C A C H E A B L E | \
PMD_ B I T 4 | \
PMD_ S E C T _ A P _ W R I T E | \
PMD_ S E C T _ A P _ R E A D
.long PMD_TYPE_SECT | \
PMD_ B I T 4 | \
PMD_ S E C T _ A P _ W R I T E | \
PMD_ S E C T _ A P _ R E A D
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initfn _ _ f a52 6 _ s e t u p , _ _ f a52 6 _ p r o c _ i n f o
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.long cpu_arch_name
.long cpu_elf_name
.long HWCAP_SWP | HWCAP_ H A L F
.long cpu_fa526_name
.long fa526_processor_functions
.long fa_tlb_fns
.long fa_user_fns
.long fa_cache_fns
.size _ _ fa5 2 6 _ p r o c _ i n f o , . - _ _ f a52 6 _ p r o c _ i n f o
