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linux/arch/arm/mach-shmobile/include/mach/sh73a0.h

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ARM: mach-shmobile: Initial AG5 and AG5EVM support This patch adds initial support for Renesas SH-Mobile AG5. At this point the AG5 CPU support is limited to the ARM core, SCIF serial and a CMT timer together with L2 cache and the GIC. The AG5EVM board also supports Ethernet. Future patches will add support for GPIO, INTCS, CPGA and platform data / driver updates for devices such as IIC, LCDC, FSI, KEYSC, CEU and SDHI among others. The code in entry-macro.S will be cleaned up when the ARM IRQ demux code improvements have been merged. Depends on the AG5EVM mach-type recently registered but not yet present in arch/arm/tools/mach-types. As the AG5EVM board comes with 512MiB memory it is recommended to turn on HIGHMEM. Many thanks to Yoshii-san for initial bring up. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-17 10:59:31 +00:00
#ifndef __ASM_SH73A0_H__
#define __ASM_SH73A0_H__
ARM: mach-shmobile: sh73a0 DMA Engine support for SY-DMAC Add SY-DMAC support via shdma.c to the sh73a0 SoC including slave ids, platform data and clock bindings. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-24 10:37:16 +00:00
/* DMA slave IDs */
enum {
ARM: mach-shmobile: sh73a0: mark DMA slave ID 0 as invalid This makes it possible to leave DMA slave IDs in the platform data at default 0 value without hitting DMA channel allocation error paths. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-24 11:19:35 +00:00
SHDMA_SLAVE_INVALID,
ARM: mach-shmobile: sh73a0 DMA Engine support for SY-DMAC Add SY-DMAC support via shdma.c to the sh73a0 SoC including slave ids, platform data and clock bindings. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-24 10:37:16 +00:00
SHDMA_SLAVE_SCIF0_TX,
SHDMA_SLAVE_SCIF0_RX,
SHDMA_SLAVE_SCIF1_TX,
SHDMA_SLAVE_SCIF1_RX,
SHDMA_SLAVE_SCIF2_TX,
SHDMA_SLAVE_SCIF2_RX,
SHDMA_SLAVE_SCIF3_TX,
SHDMA_SLAVE_SCIF3_RX,
SHDMA_SLAVE_SCIF4_TX,
SHDMA_SLAVE_SCIF4_RX,
SHDMA_SLAVE_SCIF5_TX,
SHDMA_SLAVE_SCIF5_RX,
SHDMA_SLAVE_SCIF6_TX,
SHDMA_SLAVE_SCIF6_RX,
SHDMA_SLAVE_SCIF7_TX,
SHDMA_SLAVE_SCIF7_RX,
SHDMA_SLAVE_SCIF8_TX,
SHDMA_SLAVE_SCIF8_RX,
SHDMA_SLAVE_SDHI0_TX,
SHDMA_SLAVE_SDHI0_RX,
SHDMA_SLAVE_SDHI1_TX,
SHDMA_SLAVE_SDHI1_RX,
SHDMA_SLAVE_SDHI2_TX,
SHDMA_SLAVE_SDHI2_RX,
SHDMA_SLAVE_MMCIF_TX,
SHDMA_SLAVE_MMCIF_RX,
ARM: shmobile: sh73a0: add DMAEngine support for MPDMAC Current shdmac can support MPDMAC (= sound DMA) on sh73a0. This support reduce CPU load when sound was playback. On v2.0 manual, MPDMAC MID/RID number were wrong. This patch is using the number which seems correct. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2012-06-25 03:39:20 -07:00
SHDMA_SLAVE_FSI2A_TX,
SHDMA_SLAVE_FSI2A_RX,
SHDMA_SLAVE_FSI2B_TX,
SHDMA_SLAVE_FSI2B_RX,
SHDMA_SLAVE_FSI2C_TX,
SHDMA_SLAVE_FSI2C_RX,
SHDMA_SLAVE_FSI2D_RX,
ARM: mach-shmobile: sh73a0 DMA Engine support for SY-DMAC Add SY-DMAC support via shdma.c to the sh73a0 SoC including slave ids, platform data and clock bindings. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-24 10:37:16 +00:00
};
ARM: mach-shmobile: Initial AG5 and AG5EVM support This patch adds initial support for Renesas SH-Mobile AG5. At this point the AG5 CPU support is limited to the ARM core, SCIF serial and a CMT timer together with L2 cache and the GIC. The AG5EVM board also supports Ethernet. Future patches will add support for GPIO, INTCS, CPGA and platform data / driver updates for devices such as IIC, LCDC, FSI, KEYSC, CEU and SDHI among others. The code in entry-macro.S will be cleaned up when the ARM IRQ demux code improvements have been merged. Depends on the AG5EVM mach-type recently registered but not yet present in arch/arm/tools/mach-types. As the AG5EVM board comes with 512MiB memory it is recommended to turn on HIGHMEM. Many thanks to Yoshii-san for initial bring up. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-17 10:59:31 +00:00
ARM: mach-shmobile: sh73a0: fixup PINT/IRQ16-IRQ31 irq number conflict Current IRQ16-IRQ31 irq number are located around 800 from 1ee8299a9ec1ce5137a044c7768293007b9a3267 (ARM: mach-shmobile: Use 0x3400 as INTCS vector offset) But, the PINT0/1 IRQ number are also located around 800 from 0df1a838d678fc6ab49f983a19e905f6a42297a0 (ARM: mach-shmobile: sh73a0 PINT IRQ base fix) This patch relocates PINT0/1 IRQ number to around 700 where is not used, and adds current IRQ location table in comment area. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2012-05-17 00:25:14 +02:00
/*
* SH73A0 IRQ LOCATION TABLE
*
* 416 -----------------------------------------
* IRQ0-IRQ15
* 431 -----------------------------------------
* ...
* 448 -----------------------------------------
* sh73a0-intcs
* sh73a0-intca-irq-pins
* 680 -----------------------------------------
* ...
* 700 -----------------------------------------
* sh73a0-pint0
* 731 -----------------------------------------
* 732 -----------------------------------------
* sh73a0-pint1
* 739 -----------------------------------------
* ...
* 800 -----------------------------------------
* IRQ16-IRQ31
* 815 -----------------------------------------
* ...
* 928 -----------------------------------------
* sh73a0-intca-irq-pins
* 943 -----------------------------------------
*/
/* PINT interrupts are located at Linux IRQ 700 and up */
#define SH73A0_PINT0_IRQ(irq) ((irq) + 700)
#define SH73A0_PINT1_IRQ(irq) ((irq) + 732)
ARM: mach-shmobile: sh73a0 and AG5EVM PINT support Support PINT on sh73a0 and AG5EVM using INTC PINT macros. With this patch applied the AG5EVM ethernet is handled through one of the chained sh73a0 PINT interrupt controllers. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-10-17 18:00:52 +09:00
ARM: shmobile: sh73a0: move global functions to sh73a0.h There is no reason each CPU's own function has to exist in common.h. sh73a0_xxx() go to sh73a0.h Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-28 01:48:30 -07:00
extern void sh73a0_init_delay(void);
extern void sh73a0_init_irq(void);
extern void sh73a0_init_irq_dt(void);
extern void sh73a0_map_io(void);
extern void sh73a0_earlytimer_init(void);
extern void sh73a0_add_early_devices(void);
extern void sh73a0_add_standard_devices(void);
extern void sh73a0_add_standard_devices_dt(void);
extern void sh73a0_clock_init(void);
extern void sh73a0_pinmux_init(void);
extern void sh73a0_pm_init(void);
extern struct clk sh73a0_extal1_clk;
extern struct clk sh73a0_extal2_clk;
extern struct clk sh73a0_extcki_clk;
extern struct clk sh73a0_extalr_clk;
ARM: SoC: convert shmobile SMP to SMP operations Convert shmobile SMP platforms to use struct smp_operations to provide their SMP and CPU hotplug operations. Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2011-09-08 13:15:22 +01:00
extern struct smp_operations sh73a0_smp_ops;
ARM: mach-shmobile: Initial AG5 and AG5EVM support This patch adds initial support for Renesas SH-Mobile AG5. At this point the AG5 CPU support is limited to the ARM core, SCIF serial and a CMT timer together with L2 cache and the GIC. The AG5EVM board also supports Ethernet. Future patches will add support for GPIO, INTCS, CPGA and platform data / driver updates for devices such as IIC, LCDC, FSI, KEYSC, CEU and SDHI among others. The code in entry-macro.S will be cleaned up when the ARM IRQ demux code improvements have been merged. Depends on the AG5EVM mach-type recently registered but not yet present in arch/arm/tools/mach-types. As the AG5EVM board comes with 512MiB memory it is recommended to turn on HIGHMEM. Many thanks to Yoshii-san for initial bring up. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-17 10:59:31 +00:00
#endif /* __ASM_SH73A0_H__ */
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