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linux/arch/arm/mach-omap2/prcm43xx.h

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ARM: OMAP2+: PRCM: AM43x definitions Add AM43x CMINST, CDOFFS, RM_RSTST & RM_RSTCTRL definitions - minimal ones that would be used. Signed-off-by: Afzal Mohammed <afzal@ti.com> Acked-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-10-12 15:45:45 +05:30
/*
* AM43x PRCM defines
*
ARM: OMAP2+: Replace HTTP links with HTTPS ones Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-19 12:30:33 +02:00
* Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
ARM: OMAP2+: PRCM: AM43x definitions Add AM43x CMINST, CDOFFS, RM_RSTST & RM_RSTCTRL definitions - minimal ones that would be used. Signed-off-by: Afzal Mohammed <afzal@ti.com> Acked-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#ifndef __ARCH_ARM_MACH_OMAP2_PRCM_43XX_H
#define __ARCH_ARM_MACH_OMAP2_PRCM_43XX_H
#define AM43XX_PRM_PARTITION 1
#define AM43XX_CM_PARTITION 1
/* PRM instances */
#define AM43XX_PRM_OCP_SOCKET_INST 0x0000
#define AM43XX_PRM_MPU_INST 0x0300
#define AM43XX_PRM_GFX_INST 0x0400
#define AM43XX_PRM_RTC_INST 0x0500
#define AM43XX_PRM_TAMPER_INST 0x0600
#define AM43XX_PRM_CEFUSE_INST 0x0700
#define AM43XX_PRM_PER_INST 0x0800
#define AM43XX_PRM_WKUP_INST 0x2000
#define AM43XX_PRM_DEVICE_INST 0x4000
ARM: AM43xx: Add the PRM IRQ register offsets Add the PRM IRQ register offsets. This is needed to support PRM I/O wakeup on AM43xx. Signed-off-by: Keerthy <j-keerthy@ti.com> [paul@pwsan.com: improved patch description, moved the PRM_IO_PMCTRL macro out of the CM section] Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-07-08 11:12:24 +05:30
/* PRM_IRQ offsets */
#define AM43XX_PRM_IRQSTATUS_MPU_OFFSET 0x0004
#define AM43XX_PRM_IRQENABLE_MPU_OFFSET 0x0008
/* Other PRM offsets */
#define AM43XX_PRM_IO_PMCTRL_OFFSET 0x0024
ARM: OMAP2+: PRCM: AM43x definitions Add AM43x CMINST, CDOFFS, RM_RSTST & RM_RSTCTRL definitions - minimal ones that would be used. Signed-off-by: Afzal Mohammed <afzal@ti.com> Acked-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-10-12 15:45:45 +05:30
/* CM instances */
#define AM43XX_CM_WKUP_INST 0x2800
#define AM43XX_CM_MPU_INST 0x8300
#define AM43XX_CM_GFX_INST 0x8400
#define AM43XX_CM_RTC_INST 0x8500
#define AM43XX_CM_TAMPER_INST 0x8600
#define AM43XX_CM_CEFUSE_INST 0x8700
#define AM43XX_CM_PER_INST 0x8800
/* CD offsets */
#define AM43XX_CM_WKUP_L3_AON_CDOFFS 0x0000
#define AM43XX_CM_WKUP_L3S_TSC_CDOFFS 0x0100
#define AM43XX_CM_WKUP_L4_WKUP_AON_CDOFFS 0x0200
#define AM43XX_CM_WKUP_WKUP_CDOFFS 0x0300
#define AM43XX_CM_MPU_MPU_CDOFFS 0x0000
#define AM43XX_CM_GFX_GFX_L3_CDOFFS 0x0000
#define AM43XX_CM_RTC_RTC_CDOFFS 0x0000
#define AM43XX_CM_TAMPER_TAMPER_CDOFFS 0x0000
#define AM43XX_CM_CEFUSE_CEFUSE_CDOFFS 0x0000
#define AM43XX_CM_PER_L3_CDOFFS 0x0000
#define AM43XX_CM_PER_L3S_CDOFFS 0x0200
#define AM43XX_CM_PER_ICSS_CDOFFS 0x0300
#define AM43XX_CM_PER_L4LS_CDOFFS 0x0400
#define AM43XX_CM_PER_EMIF_CDOFFS 0x0700
ARM: OMAP2+: am43xx: Add lcdc clockdomain As described in AM437x TRM, spruhl7h, Revised January 2018, there is an LCDC clockdomain present in the PER power domain. Although it is entirely unused on AM437x, it should be defined along with the other clockdomains so it can be shut off by Linux as there are no users. Reported-by: Munan Xu <munan@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-11 14:25:58 -06:00
#define AM43XX_CM_PER_LCDC_CDOFFS 0x0800
ARM: OMAP2+: PRCM: AM43x definitions Add AM43x CMINST, CDOFFS, RM_RSTST & RM_RSTCTRL definitions - minimal ones that would be used. Signed-off-by: Afzal Mohammed <afzal@ti.com> Acked-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-10-12 15:45:45 +05:30
#define AM43XX_CM_PER_DSS_CDOFFS 0x0a00
#define AM43XX_CM_PER_CPSW_CDOFFS 0x0b00
#define AM43XX_CM_PER_OCPWP_L3_CDOFFS 0x0c00
/* CLK CTRL offsets */
#define AM43XX_CM_MPU_MPU_CLKCTRL_OFFSET 0x0020
ARM: OMAP: AM43xx hwmod: Add data for am43xx emif hwmod Without a hwmod for am43xx emif use counting for emif clockdomain does not happen correctly so it may be shut off by pm code unintentionally. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> [paul@pwsan.com: updated to apply] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-06-01 19:22:11 -06:00
#define AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET 0x0720
ARM: OMAP2+: PRCM: AM43x definitions Add AM43x CMINST, CDOFFS, RM_RSTST & RM_RSTCTRL definitions - minimal ones that would be used. Signed-off-by: Afzal Mohammed <afzal@ti.com> Acked-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-10-12 15:45:45 +05:30
#endif
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