2005-04-17 02:20:36 +04:00
/ *
* This f i l e c o n t a i n s t h e l i g h t - w e i g h t s y s t e m c a l l h a n d l e r s ( f s y s c a l l - h a n d l e r s ) .
*
* Copyright ( C ) 2 0 0 3 H e w l e t t - P a c k a r d C o
* David M o s b e r g e r - T a n g < d a v i d m @hpl.hp.com>
*
* 2 5 - Sep- 0 3 d a v i d m I m p l e m e n t f s y s _ r t _ s i g p r o c m a s k ( ) .
* 1 8 - Feb- 0 3 l o u i s k I m p l e m e n t f s y s _ g e t t i m e o f d a y ( ) .
* 2 8 - Feb- 0 3 d a v i d m F i x e d s e v e r a l b u g s i n f s y s _ g e t t i m e o f d a y ( ) . T u n e d i t s o m e m o r e ,
* probably b r o k e i t a l o n g t h e w a y . . . ;-)
* 1 3 - Jul- 0 4 c l a m e t e r I m p l e m e n t f s y s _ c l o c k _ g e t t i m e a n d r e v i s e f s y s _ g e t t i m e o f d a y t o m a k e
* it c a p a b l e o f u s i n g m e m o r y b a s e d c l o c k s w i t h o u t f a l l i n g b a c k t o C c o d e .
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* 0 8 - Feb- 0 7 F e n g h u a Y u I m p l e m e n t f s y s _ g e t c p u .
*
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* /
# include < a s m / a s m m a c r o . h >
# include < a s m / e r r n o . h >
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# include < a s m / a s m - o f f s e t s . h >
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# include < a s m / p e r c p u . h >
# include < a s m / t h r e a d _ i n f o . h >
# include < a s m / s a l . h >
# include < a s m / s i g n a l . h >
# include < a s m / s y s t e m . h >
# include < a s m / u n i s t d . h >
# include " e n t r y . h "
/ *
* See D o c u m e n t a t i o n / i a64 / f s y s . t x t f o r d e t a i l s o n f s y s c a l l s .
*
* On e n t r y t o a n f s y s c a l l h a n d l e r :
* r1 0 = 0 ( i . e . , d e f a u l t s t o " s u c c e s s f u l s y s c a l l r e t u r n " )
* r1 1 = s a v e d a r . p f s ( a u s e r - l e v e l v a l u e )
* r1 5 = s y s t e m c a l l n u m b e r
* r1 6 = " c u r r e n t " t a s k p o i n t e r ( i n n o r m a l k e r n e l - m o d e , t h i s i s i n r13 )
* r3 2 - r39 = s y s t e m c a l l a r g u m e n t s
* b6 = r e t u r n a d d r e s s ( a u s e r - l e v e l v a l u e )
* ar. p f s = p r e v i o u s f r a m e - s t a t e ( a u s e r - l e v e l v a l u e )
* PSR. b e = c l e a r e d t o z e r o ( i . e . , l i t t l e - e n d i a n b y t e o r d e r i s i n e f f e c t )
* all o t h e r r e g i s t e r s m a y c o n t a i n v a l u e s p a s s e d i n f r o m u s e r - m o d e
*
* On r e t u r n f r o m a n f s y s c a l l h a n d l e r :
* r1 1 = s a v e d a r . p f s ( a s p a s s e d i n t o t h e f s y s c a l l h a n d l e r )
* r1 5 = s y s t e m c a l l n u m b e r ( a s p a s s e d i n t o t h e f s y s c a l l h a n d l e r )
* r3 2 - r39 = s y s t e m c a l l a r g u m e n t s ( a s p a s s e d i n t o t h e f s y s c a l l h a n d l e r )
* b6 = r e t u r n a d d r e s s ( a s p a s s e d i n t o t h e f s y s c a l l h a n d l e r )
* ar. p f s = p r e v i o u s f r a m e - s t a t e ( a s p a s s e d i n t o t h e f s y s c a l l h a n d l e r )
* /
ENTRY( f s y s _ n i _ s y s c a l l )
.prologue
.altrp b6
.body
mov r8 =ENOSYS
mov r10 = - 1
FSYS_ R E T U R N
END( f s y s _ n i _ s y s c a l l )
ENTRY( f s y s _ g e t p i d )
.prologue
.altrp b6
.body
2008-03-29 00:27:00 +03:00
add r17 =IA64_TASK_GROUP_LEADER_OFFSET ,r16
;;
ld8 r17 = [ r17 ] / / r17 = c u r r e n t - > g r o u p _ l e a d e r
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add r9 =TI_FLAGS + I A 6 4 _ T A S K _ S I Z E ,r16
;;
ld4 r9 = [ r9 ]
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add r17 =IA64_TASK_TGIDLINK_OFFSET ,r17
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;;
and r9 =TIF_ALLWORK_MASK ,r9
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ld8 r17 = [ r17 ] / / r17 = c u r r e n t - > g r o u p _ l e a d e r - > p i d s [ P I D T Y P E _ P I D ] . p i d
;;
add r8 =IA64_PID_LEVEL_OFFSET ,r17
;;
ld4 r8 = [ r8 ] / / r8 = p i d - > l e v e l
add r17 =IA64_PID_UPID_OFFSET ,r17 / / r17 = & p i d - > n u m b e r s [ 0 ]
;;
shl r8 =r8 ,I A 6 4 _ U P I D _ S H I F T
;;
add r17 =r17 ,r8 / / r17 = & p i d - > n u m b e r s [ p i d - > l e v e l ]
;;
ld4 r8 = [ r17 ] / / r8 = p i d - > n u m b e r s [ p i d - > l e v e l ] . n r
;;
mov r17 =0
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;;
cmp. n e p8 ,p0 =0 ,r9
( p8 ) b r . s p n t . m a n y f s y s _ f a l l b a c k _ s y s c a l l
FSYS_ R E T U R N
END( f s y s _ g e t p i d )
ENTRY( f s y s _ g e t p p i d )
.prologue
.altrp b6
.body
add r17 =IA64_TASK_GROUP_LEADER_OFFSET ,r16
;;
ld8 r17 = [ r17 ] / / r17 = c u r r e n t - > g r o u p _ l e a d e r
add r9 =TI_FLAGS + I A 6 4 _ T A S K _ S I Z E ,r16
;;
ld4 r9 = [ r9 ]
add r17 =IA64_TASK_REAL_PARENT_OFFSET ,r17 / / r17 = & c u r r e n t - > g r o u p _ l e a d e r - > r e a l _ p a r e n t
;;
and r9 =TIF_ALLWORK_MASK ,r9
1 : ld8 r18 = [ r17 ] / / r18 = c u r r e n t - > g r o u p _ l e a d e r - > r e a l _ p a r e n t
;;
cmp. n e p8 ,p0 =0 ,r9
add r8 =IA64_TASK_TGID_OFFSET ,r18 / / r8 = & c u r r e n t - > g r o u p _ l e a d e r - > r e a l _ p a r e n t - > t g i d
;;
/ *
* The . a c q i s n e e d e d t o e n s u r e t h a t t h e r e a d o f t g i d h a s r e t u r n e d i t s d a t a b e f o r e
* we r e - c h e c k " r e a l _ p a r e n t " .
* /
ld4 . a c q r8 = [ r8 ] / / r8 = c u r r e n t - > g r o u p _ l e a d e r - > r e a l _ p a r e n t - > t g i d
# ifdef C O N F I G _ S M P
/ *
* Re- r e a d c u r r e n t - > g r o u p _ l e a d e r - > r e a l _ p a r e n t .
* /
ld8 r19 = [ r17 ] / / r19 = c u r r e n t - > g r o u p _ l e a d e r - > r e a l _ p a r e n t
( p8 ) b r . s p n t . m a n y f s y s _ f a l l b a c k _ s y s c a l l
;;
cmp. n e p6 ,p0 =r18 ,r19 / / d i d r e a l _ p a r e n t c h a n g e ?
mov r19 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
( p6 ) b r . c o n d . s p n t . f e w 1 b / / y e s - > r e d o t h e r e a d o f t g i d a n d t h e c h e c k
;;
mov r17 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
mov r18 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
# else
mov r17 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
mov r18 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
mov r19 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
# endif
FSYS_ R E T U R N
END( f s y s _ g e t p p i d )
ENTRY( f s y s _ s e t _ t i d _ a d d r e s s )
.prologue
.altrp b6
.body
add r9 =TI_FLAGS + I A 6 4 _ T A S K _ S I Z E ,r16
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add r17 =IA64_TASK_TGIDLINK_OFFSET ,r16
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;;
ld4 r9 = [ r9 ]
tnat. z p6 ,p7 =r32 / / c h e c k a r g u m e n t r e g i s t e r f o r b e i n g N a T
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ld8 r17 = [ r17 ] / / r17 = c u r r e n t - > p i d s [ P I D T Y P E _ P I D ] . p i d
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;;
and r9 =TIF_ALLWORK_MASK ,r9
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add r8 =IA64_PID_LEVEL_OFFSET ,r17
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add r18 =IA64_TASK_CLEAR_CHILD_TID_OFFSET ,r16
;;
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ld4 r8 = [ r8 ] / / r8 = p i d - > l e v e l
add r17 =IA64_PID_UPID_OFFSET ,r17 / / r17 = & p i d - > n u m b e r s [ 0 ]
;;
shl r8 =r8 ,I A 6 4 _ U P I D _ S H I F T
;;
add r17 =r17 ,r8 / / r17 = & p i d - > n u m b e r s [ p i d - > l e v e l ]
;;
ld4 r8 = [ r17 ] / / r8 = p i d - > n u m b e r s [ p i d - > l e v e l ] . n r
;;
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cmp. n e p8 ,p0 =0 ,r9
mov r17 = - 1
;;
( p6 ) s t 8 [ r18 ] =r32
( p7 ) s t 8 [ r18 ] =r17
( p8 ) b r . s p n t . m a n y f s y s _ f a l l b a c k _ s y s c a l l
;;
mov r17 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
mov r18 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
FSYS_ R E T U R N
END( f s y s _ s e t _ t i d _ a d d r e s s )
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# if I A 6 4 _ G T O D _ L O C K _ O F F S E T ! =0
# error f s y s _ g e t t i m e o f d a y i n c o m p a t i b l e w i t h c h a n g e s t o s t r u c t f s y s c a l l _ g t o d _ d a t a _ t
# endif
# if I A 6 4 _ I T C _ J I T T E R _ O F F S E T ! =0
# error f s y s _ g e t t i m e o f d a y i n c o m p a t i b l e w i t h c h a n g e s t o s t r u c t i t c _ j i t t e r _ d a t a _ t
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# endif
# define C L O C K _ R E A L T I M E 0
# define C L O C K _ M O N O T O N I C 1
# define C L O C K _ D I V I D E _ B Y _ 1 0 0 0 0 x40 0 0
# define C L O C K _ A D D _ M O N O T O N I C 0 x80 0 0
ENTRY( f s y s _ g e t t i m e o f d a y )
.prologue
.altrp b6
.body
mov r31 = r32
tnat. n z p6 ,p0 = r33 / / g u a r d a g a i n s t N a T a r g u m e n t
( p6 ) b r . c o n d . s p n t . f e w . f a i l _ e i n v a l
mov r30 = C L O C K _ D I V I D E _ B Y _ 1 0 0 0
;;
.gettime :
/ / Register m a p
/ / Incoming r31 = p o i n t e r t o a d d r e s s w h e r e t o p l a c e r e s u l t
/ / r3 0 = f l a g s d e t e r m i n i n g h o w t i m e i s p r o c e s s e d
/ / r2 ,r3 = t e m p r4 - r7 p r e s e r v e d
/ / r8 = r e s u l t n a n o s e c o n d s
/ / r9 = r e s u l t s e c o n d s
/ / r1 0 = t e m p o r a r y s t o r a g e f o r c l o c k d i f f e r e n c e
/ / r1 1 = p r e s e r v e d : s a v e d a r . p f s
/ / r1 2 = p r e s e r v e d : m e m o r y s t a c k
/ / r1 3 = p r e s e r v e d : t h r e a d p o i n t e r
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/ / r1 4 = a d d r e s s o f m a s k / m a s k v a l u e
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/ / r1 5 = p r e s e r v e d : s y s t e m c a l l n u m b e r
/ / r1 6 = p r e s e r v e d : c u r r e n t t a s k p o i n t e r
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/ / r1 7 = ( n o t u s e d )
/ / r1 8 = ( n o t u s e d )
/ / r1 9 = a d d r e s s o f i t c _ l a s t c y c l e
/ / r2 0 = s t r u c t f s y s c a l l _ g t o d _ d a t a ( = a d d r e s s o f g t o d _ l o c k . s e q u e n c e )
/ / r2 1 = a d d r e s s o f m m i o _ p t r
/ / r2 2 = a d d r e s s o f w a l l _ t i m e o r m o n o t o n i c _ t i m e
/ / r2 3 = a d d r e s s o f s h i f t / v a l u e
/ / r2 4 = a d d r e s s m u l t f a c t o r / c y c l e _ l a s t v a l u e
/ / r2 5 = i t c _ l a s t c y c l e v a l u e
/ / r2 6 = a d d r e s s c l o c k s o u r c e c y c l e _ l a s t
/ / r2 7 = ( n o t u s e d )
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/ / r2 8 = s e q u e n c e n u m b e r a t t h e b e g i n n i n g o f c r i t c a l s e c t i o n
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/ / r2 9 = a d d r e s s o f i t c _ j i t t e r
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/ / r3 0 = t i m e p r o c e s s i n g f l a g s / m e m o r y a d d r e s s
/ / r3 1 = p o i n t e r t o r e s u l t
/ / Predicates
/ / p6 ,p7 s h o r t t e r m u s e
/ / p8 = t i m e s o u r c e a r . i t c
/ / p9 = t i m e s o u r c e m m i o 6 4
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/ / p1 0 = t i m e s o u r c e m m i o 3 2 - n o t u s e d
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/ / p1 1 = t i m e s o u r c e n o t t o b e h a n d l e d b y a s m c o d e
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/ / p1 2 = m e m o r y t i m e s o u r c e ( = p9 | p10 ) - n o t u s e d
/ / p1 3 = d o c m p x c h g w i t h i t c _ l a s t c y c l e
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/ / p1 4 = D i v i d e b y 1 0 0 0
/ / p1 5 = A d d m o n o t o n i c
/ /
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/ / Note t h a t i n s t r u c t i o n s a r e o p t i m i z e d f o r M c K i n l e y . M c K i n l e y c a n
/ / process t w o b u n d l e s s i m u l t a n e o u s l y a n d t h e r e f o r e w e c o n t i n u o u s l y
/ / try t o f e e d t h e C P U t w o b u n d l e s a n d t h e n a s t o p .
2008-01-29 08:39:33 +03:00
2005-04-17 02:20:36 +04:00
add r2 = T I _ F L A G S + I A 6 4 _ T A S K _ S I Z E ,r16
2008-01-29 08:39:33 +03:00
tnat. n z p6 ,p0 = r31 / / g u a r d a g a i n s t N a t a r g u m e n t
( p6 ) b r . c o n d . s p n t . f e w . f a i l _ e i n v a l
2007-07-20 22:22:30 +04:00
movl r20 = f s y s c a l l _ g t o d _ d a t a / / l o a d f s y s c a l l g e t t i m e o f d a y d a t a a d d r e s s
2005-04-17 02:20:36 +04:00
;;
2008-01-29 08:39:33 +03:00
ld4 r2 = [ r2 ] / / p r o c e s s w o r k p e n d i n g f l a g s
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movl r29 = i t c _ j i t t e r _ d a t a / / i t c _ j i t t e r
add r22 = I A 6 4 _ G T O D _ W A L L _ T I M E _ O F F S E T ,r20 / / w a l l _ t i m e
add r21 = I A 6 4 _ C L K S R C _ M M I O _ O F F S E T ,r20
2008-01-29 08:39:33 +03:00
mov p r = r30 ,0 x c00 0 / / S e t p r e d i c a t e s a c c o r d i n g t o f u n c t i o n
;;
2005-04-17 02:20:36 +04:00
and r2 = T I F _ A L L W O R K _ M A S K ,r2
2008-01-29 08:39:33 +03:00
add r19 = I A 6 4 _ I T C _ L A S T C Y C L E _ O F F S E T ,r29
( p1 5 ) a d d r22 = I A 6 4 _ G T O D _ M O N O _ T I M E _ O F F S E T ,r20 / / m o n o t o n i c _ t i m e
2005-04-17 02:20:36 +04:00
;;
2008-01-29 08:39:33 +03:00
add r26 = I A 6 4 _ C L K S R C _ C Y C L E _ L A S T _ O F F S E T ,r20 / / c l k s r c _ c y c l e _ l a s t
2005-04-17 02:20:36 +04:00
cmp. n e p6 , p0 = 0 , r2 / / F a l l b a c k i f w o r k i s s c h e d u l e d
2008-01-29 08:39:33 +03:00
( p6 ) b r . c o n d . s p n t . m a n y f s y s _ f a l l b a c k _ s y s c a l l
2005-04-17 02:20:36 +04:00
;;
2007-07-20 22:22:30 +04:00
/ / Begin c r i t i c a l s e c t i o n
.time_redo :
ld4 . a c q r28 = [ r20 ] / / g t o d _ l o c k . s e q u e n c e , M u s t t a k e f i r s t
;;
and r28 = ~ 1 ,r28 / / A n d m a k e s e q u e n c e e v e n t o f o r c e r e t r y i f o d d
2005-04-17 02:20:36 +04:00
;;
2007-07-20 22:22:30 +04:00
ld8 r30 = [ r21 ] / / c l o c k s o u r c e - > m m i o _ p t r
add r24 = I A 6 4 _ C L K S R C _ M U L T _ O F F S E T ,r20
ld4 r2 = [ r29 ] / / i t c _ j i t t e r v a l u e
add r23 = I A 6 4 _ C L K S R C _ S H I F T _ O F F S E T ,r20
add r14 = I A 6 4 _ C L K S R C _ M A S K _ O F F S E T ,r20
2005-04-17 02:20:36 +04:00
;;
2007-07-20 22:22:30 +04:00
ld4 r3 = [ r24 ] / / c l o c k s o u r c e m u l t v a l u e
ld8 r14 = [ r14 ] / / c l o c k s o u r c e m a s k v a l u e
cmp. e q p8 ,p9 = 0 ,r30 / / u s e c p u t i m e r i f n o m m i o _ p t r
2007-07-14 03:21:44 +04:00
;;
2007-07-20 22:22:30 +04:00
setf. s i g f7 = r3 / / S e t u p f o r m u l t s c a l i n g o f c o u n t e r
( p8 ) c m p . n e p13 ,p0 = r2 ,r0 / / n e e d i t c _ j i t t e r c o m p e n s a t i o n , s e t p13
ld4 r23 = [ r23 ] / / c l o c k s o u r c e s h i f t v a l u e
ld8 r24 = [ r26 ] / / g e t c l k s r c _ c y c l e _ l a s t v a l u e
( p9 ) c m p . e q p13 ,p0 = 0 ,r30 / / i f m m i o _ p t r , c l e a r p13 j i t t e r c o n t r o l
2007-07-14 03:21:44 +04:00
;;
2007-07-20 22:22:30 +04:00
.pred .rel .mutex p8 ,p9
2005-04-17 02:20:36 +04:00
( p8 ) m o v r2 = a r . i t c / / C P U _ T I M E R . 3 6 c l o c k s l a t e n c y ! ! !
2007-07-20 22:22:30 +04:00
( p9 ) l d8 r2 = [ r30 ] / / M M I O _ T I M E R . C o u l d a l s o h a v e l a t e n c y i s s u e s . .
( p1 3 ) l d8 r25 = [ r19 ] / / g e t i t c _ l a s t c y c l e v a l u e
ld8 r9 = [ r22 ] ,I A 6 4 _ T I M E S P E C _ T V _ N S E C _ O F F S E T / / t v _ s e c
;;
ld8 r8 = [ r22 ] ,- I A 6 4 _ T I M E S P E C _ T V _ N S E C _ O F F S E T / / t v _ n s e c
( p1 3 ) s u b r3 = r25 ,r2 / / D i f f n e e d e d b e f o r e c o m p a r i s o n ( t h a n k s d a v i d m )
;;
( p1 3 ) c m p . g t . u n c p6 ,p7 = r3 ,r0 / / c h e c k i f i t i s l e s s t h a n l a s t . p6 ,p7 c l e a r e d
sub r10 = r2 ,r24 / / c u r r e n t _ c y c l e - l a s t _ c y c l e
;;
( p6 ) s u b r10 = r25 ,r24 / / t i m e w e g o t w a s l e s s t h a n l a s t _ c y c l e
2005-04-17 02:20:36 +04:00
( p7 ) m o v a r . c c v = r25 / / m o r e t h a n l a s t _ c y c l e . P r e p f o r c m p x c h g
;;
2007-07-20 22:22:30 +04:00
( p7 ) c m p x c h g 8 . r e l r3 = [ r19 ] ,r2 ,a r . c c v
;;
( p7 ) c m p . n e p7 ,p0 = r25 ,r3 / / i f c m p x c h g n o t s u c c e s s f u l
;;
( p7 ) s u b r10 = r3 ,r24 / / t h e n u s e n e w l a s t _ c y c l e i n s t e a d
;;
2005-04-17 02:20:36 +04:00
and r10 = r10 ,r14 / / A p p l y m a s k
;;
setf. s i g f8 = r10
nop. i 1 2 3
;;
2007-07-20 22:22:30 +04:00
/ / fault c h e c k t a k e s 5 c y c l e s a n d w e h a v e s p a r e t i m e
EX( . f a i l _ e f a u l t , p r o b e . w . f a u l t r31 , 3 )
2005-04-17 02:20:36 +04:00
xmpy. l f8 = f8 ,f7 / / n s e c _ p e r _ c y c * ( c o u n t e r - l a s t _ c o u n t e r )
;;
getf. s i g r2 = f8
mf
;;
2007-07-20 22:22:30 +04:00
ld4 r10 = [ r20 ] / / g t o d _ l o c k . s e q u e n c e
shr. u r2 = r2 ,r23 / / s h i f t b y f a c t o r
2008-01-29 08:39:33 +03:00
;;
2005-04-17 02:20:36 +04:00
add r8 = r8 ,r2 / / A d d x t i m e . n s e c s
2007-07-20 22:22:30 +04:00
cmp4 . n e p7 ,p0 = r28 ,r10
( p7 ) b r . c o n d . d p n t . f e w . t i m e _ r e d o / / s e q u e n c e n u m b e r c h a n g e d , r e d o
/ / End c r i t i c a l s e c t i o n .
2005-04-17 02:20:36 +04:00
/ / Now r8 =tv - > t v _ n s e c a n d r9 =tv - > t v _ s e c
mov r10 = r0
movl r2 = 1 0 0 0 0 0 0 0 0 0
add r23 = I A 6 4 _ T I M E S P E C _ T V _ N S E C _ O F F S E T , r31
( p1 4 ) m o v l r3 = 2 3 6 1 1 8 3 2 4 1 4 3 4 8 2 2 6 0 7 / / P r e p f o r / 1 0 0 0 h a c k
;;
.time_normalize :
mov r21 = r8
cmp. g e p6 ,p0 = r8 ,r2
2007-07-20 22:22:30 +04:00
( p1 4 ) s h r . u r20 = r8 , 3 / / W e c a n r e p e a t t h i s i f n e c e s s a r y j u s t w a s t i n g t i m e
2005-04-17 02:20:36 +04:00
;;
( p1 4 ) s e t f . s i g f8 = r20
( p6 ) s u b r8 = r8 ,r2
2007-07-20 22:22:30 +04:00
( p6 ) a d d r9 = 1 ,r9 / / t w o n o p s b e f o r e t h e b r a n c h .
( p1 4 ) s e t f . s i g f7 = r3 / / C h a n c e s f o r r e p e a t s a r e 1 i n 1 0 0 0 0 f o r g e t t o d
2005-04-17 02:20:36 +04:00
( p6 ) b r . c o n d . d p n t . f e w . t i m e _ n o r m a l i z e
;;
/ / Divided b y 8 t h o u g h s h i f t . N o w d i v i d e b y 1 2 5
/ / The c o m p i l e r w a s a b l e t o d o t h a t w i t h a m u l t i p l y
/ / and a s h i f t a n d w e d o t h e s a m e
2007-07-20 22:22:30 +04:00
EX( . f a i l _ e f a u l t , p r o b e . w . f a u l t r23 , 3 ) / / T h i s a l s o c o s t s 5 c y c l e s
( p1 4 ) x m p y . h u f8 = f8 , f7 / / x m p y h a s 5 c y c l e s l a t e n c y s o u s e i t
2005-04-17 02:20:36 +04:00
;;
( p1 4 ) g e t f . s i g r2 = f8
;;
2008-01-29 08:39:33 +03:00
mov r8 = r0
2005-04-17 02:20:36 +04:00
( p1 4 ) s h r . u r21 = r2 , 4
;;
EX( . f a i l _ e f a u l t , s t 8 [ r31 ] = r9 )
EX( . f a i l _ e f a u l t , s t 8 [ r23 ] = r21 )
FSYS_ R E T U R N
.fail_einval :
mov r8 = E I N V A L
mov r10 = - 1
FSYS_ R E T U R N
.fail_efault :
mov r8 = E F A U L T
mov r10 = - 1
FSYS_ R E T U R N
END( f s y s _ g e t t i m e o f d a y )
ENTRY( f s y s _ c l o c k _ g e t t i m e )
.prologue
.altrp b6
.body
cmp4 . l t u p6 , p0 = C L O C K _ M O N O T O N I C , r32
/ / Fallback i f t h i s i s n o t C L O C K _ R E A L T I M E o r C L O C K _ M O N O T O N I C
( p6 ) b r . s p n t . f e w f s y s _ f a l l b a c k _ s y s c a l l
mov r31 = r33
shl r30 = r32 ,1 5
br. m a n y . g e t t i m e
END( f s y s _ c l o c k _ g e t t i m e )
/ *
* long f s y s _ r t _ s i g p r o c m a s k ( i n t h o w , s i g s e t _ t * s e t , s i g s e t _ t * o s e t , s i z e _ t s i g s e t s i z e ) .
* /
# if _ N S I G _ W O R D S ! = 1
# error S o r r y , f s y s _ r t _ s i g p r o c m a s k ( ) n e e d s t o b e u p d a t e d f o r _ N S I G _ W O R D S ! = 1 .
# endif
ENTRY( f s y s _ r t _ s i g p r o c m a s k )
.prologue
.altrp b6
.body
add r2 =IA64_TASK_BLOCKED_OFFSET ,r16
add r9 =TI_FLAGS + I A 6 4 _ T A S K _ S I Z E ,r16
cmp4 . l t u p6 ,p0 =SIG_SETMASK ,r32
cmp. n e p15 ,p0 =r0 ,r34 / / o s e t ! = N U L L ?
tnat. n z p8 ,p0 =r34
add r31 =IA64_TASK_SIGHAND_OFFSET ,r16
;;
ld8 r3 = [ r2 ] / / r e a d / p r e f e t c h c u r r e n t - > b l o c k e d
ld4 r9 = [ r9 ]
tnat. n z . o r p6 ,p0 =r35
cmp. n e . o r p6 ,p0 =_NSIG_WORDS * 8 ,r35
tnat. n z . o r p6 ,p0 =r32
( p6 ) b r . s p n t . f e w . f a i l _ e i n v a l / / f a i l w i t h E I N V A L
;;
# ifdef C O N F I G _ S M P
ld8 r31 = [ r31 ] / / r31 < - c u r r e n t - > s i g h a n d
# endif
and r9 =TIF_ALLWORK_MASK ,r9
tnat. n z . o r p8 ,p0 =r33
;;
cmp. n e p7 ,p0 =0 ,r9
cmp. e q p6 ,p0 =r0 ,r33 / / s e t = = N U L L ?
add r31 =IA64_SIGHAND_SIGLOCK_OFFSET ,r31 / / r31 < - c u r r e n t - > s i g h a n d - > s i g l o c k
( p8 ) b r . s p n t . f e w . f a i l _ e f a u l t / / f a i l w i t h E F A U L T
( p7 ) b r . s p n t . m a n y f s y s _ f a l l b a c k _ s y s c a l l / / g o t p e n d i n g k e r n e l w o r k . . .
( p6 ) b r . d p n t . m a n y . s t o r e _ m a s k / / - > s h o r t - c i r c u i t t o j u s t r e a d i n g t h e s i g n a l m a s k
/* Argh, we actually have to do some work and _update_ the signal mask: */
EX( . f a i l _ e f a u l t , p r o b e . r . f a u l t r33 , 3 ) / / v e r i f y u s e r h a s r e a d - a c c e s s t o * s e t
EX( . f a i l _ e f a u l t , l d8 r14 = [ r33 ] ) / / r14 < - * s e t
mov r17 = ( 1 < < ( S I G K I L L - 1 ) ) | ( 1 < < ( S I G S T O P - 1 ) )
;;
rsm p s r . i / / m a s k i n t e r r u p t d e l i v e r y
mov a r . c c v =0
andcm r14 =r14 ,r17 / / f i l t e r o u t S I G K I L L & S I G S T O P
# ifdef C O N F I G _ S M P
mov r17 =1
;;
cmpxchg4 . a c q r18 = [ r31 ] ,r17 ,a r . c c v / / t r y t o a c q u i r e t h e l o c k
mov r8 =EINVAL / / d e f a u l t t o E I N V A L
;;
ld8 r3 = [ r2 ] / / r e - r e a d c u r r e n t - > b l o c k e d n o w t h a t w e h o l d t h e l o c k
cmp4 . n e p6 ,p0 =r18 ,r0
( p6 ) b r . c o n d . s p n t . m a n y . l o c k _ c o n t e n t i o n
;;
# else
ld8 r3 = [ r2 ] / / r e - r e a d c u r r e n t - > b l o c k e d n o w t h a t w e h o l d t h e l o c k
mov r8 =EINVAL / / d e f a u l t t o E I N V A L
# endif
add r18 =IA64_TASK_PENDING_OFFSET + I A 6 4 _ S I G P E N D I N G _ S I G N A L _ O F F S E T ,r16
add r19 =IA64_TASK_SIGNAL_OFFSET ,r16
cmp4 . e q p6 ,p0 =SIG_BLOCK ,r32
;;
ld8 r19 = [ r19 ] / / r19 < - c u r r e n t - > s i g n a l
cmp4 . e q p7 ,p0 =SIG_UNBLOCK ,r32
cmp4 . e q p8 ,p0 =SIG_SETMASK ,r32
;;
ld8 r18 = [ r18 ] / / r18 < - c u r r e n t - > p e n d i n g . s i g n a l
.pred .rel .mutex p6 ,p7 ,p8
( p6 ) o r r14 =r3 ,r14 / / S I G _ B L O C K
( p7 ) a n d c m r14 =r3 ,r14 / / S I G _ U N B L O C K
( p8 ) m o v r14 =r14 / / S I G _ S E T M A S K
( p6 ) m o v r8 =0 / / c l e a r e r r o r c o d e
/ / recalc_ s i g p e n d i n g ( )
add r17 =IA64_SIGNAL_GROUP_STOP_COUNT_OFFSET ,r19
add r19 =IA64_SIGNAL_SHARED_PENDING_OFFSET + I A 6 4 _ S I G P E N D I N G _ S I G N A L _ O F F S E T ,r19
;;
ld4 r17 = [ r17 ] / / r17 < - c u r r e n t - > s i g n a l - > g r o u p _ s t o p _ c o u n t
( p7 ) m o v r8 =0 / / c l e a r e r r o r c o d e
ld8 r19 = [ r19 ] / / r19 < - c u r r e n t - > s i g n a l - > s h a r e d _ p e n d i n g
;;
cmp4 . g t p6 ,p7 =r17 ,r0 / / p6 / p7 < - ( c u r r e n t - > s i g n a l - > g r o u p _ s t o p _ c o u n t > 0 ) ?
( p8 ) m o v r8 =0 / / c l e a r e r r o r c o d e
or r18 =r18 ,r19 / / r18 < - c u r r e n t - > p e n d i n g | c u r r e n t - > s i g n a l - > s h a r e d _ p e n d i n g
;;
/ / r1 8 < - ( c u r r e n t - > p e n d i n g | c u r r e n t - > s i g n a l - > s h a r e d _ p e n d i n g ) & ~ c u r r e n t - > b l o c k e d :
andcm r18 =r18 ,r14
add r9 =TI_FLAGS + I A 6 4 _ T A S K _ S I Z E ,r16
;;
( p7 ) c m p . n e . o r . a n d c m p6 ,p7 =r18 ,r0 / / p6 / p7 < - s i g n a l p e n d i n g
mov r19 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
( p6 ) b r . c o n d . d p n t . m a n y . s i g _ p e n d i n g
;;
1 : ld4 r17 = [ r9 ] / / r17 < - c u r r e n t - > t h r e a d _ i n f o - > f l a g s
;;
mov a r . c c v =r17
and r18 = ~ _ T I F _ S I G P E N D I N G ,r17 / / r18 < - r17 & ~ ( 1 < < T I F _ S I G P E N D I N G )
;;
st8 [ r2 ] =r14 / / u p d a t e c u r r e n t - > b l o c k e d w i t h n e w m a s k
2005-06-09 23:29:00 +04:00
cmpxchg4 . a c q r8 = [ r9 ] ,r18 ,a r . c c v / / c u r r e n t - > t h r e a d _ i n f o - > f l a g s < - r18
2005-04-17 02:20:36 +04:00
;;
2005-06-09 23:29:00 +04:00
cmp. n e p6 ,p0 =r17 ,r8 / / u p d a t e f a i l e d ?
2005-04-17 02:20:36 +04:00
( p6 ) b r . c o n d . s p n t . f e w 1 b / / y e s - > r e t r y
# ifdef C O N F I G _ S M P
st4 . r e l [ r31 ] =r0 / / r e l e a s e t h e l o c k
# endif
ssm p s r . i
;;
srlz. d / / e n s u r e p s r . i i s s e t a g a i n
mov r18 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
.store_mask :
EX( . f a i l _ e f a u l t , ( p15 ) p r o b e . w . f a u l t r34 , 3 ) / / v e r i f y u s e r h a s w r i t e - a c c e s s t o * o s e t
EX( . f a i l _ e f a u l t , ( p15 ) s t 8 [ r34 ] =r3 )
mov r2 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
mov r3 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
mov r8 =0 / / r e t u r n 0
mov r9 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
mov r14 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
mov r17 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
mov r31 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
FSYS_ R E T U R N
.sig_pending :
# ifdef C O N F I G _ S M P
st4 . r e l [ r31 ] =r0 / / r e l e a s e t h e l o c k
# endif
ssm p s r . i
;;
srlz. d
br. s p t k . m a n y f s y s _ f a l l b a c k _ s y s c a l l / / w i t h s i g n a l p e n d i n g , d o t h e h e a v y - w e i g h t s y s c a l l
# ifdef C O N F I G _ S M P
.lock_contention :
/* Rather than spinning here, fall back on doing a heavy-weight syscall. */
ssm p s r . i
;;
srlz. d
br. s p t k . m a n y f s y s _ f a l l b a c k _ s y s c a l l
# endif
END( f s y s _ r t _ s i g p r o c m a s k )
2007-02-13 03:27:10 +03:00
/ *
* fsys_ g e t c p u d o e s n ' t u s e t h e t h i r d p a r a m e t e r i n t h i s i m p l e m e n t a t i o n . I t r e a d s
* current_ t h r e a d _ i n f o ( ) - > c p u a n d c o r r e s p o n d i n g n o d e i n c p u _ t o _ n o d e _ m a p .
* /
ENTRY( f s y s _ g e t c p u )
.prologue
.altrp b6
.body
;;
add r2 =TI_FLAGS + I A 6 4 _ T A S K _ S I Z E ,r16
tnat. n z p6 ,p0 = r32 / / g u a r d a g a i n s t N a T a r g u m e n t
add r3 =TI_CPU + I A 6 4 _ T A S K _ S I Z E ,r16
;;
ld4 r3 = [ r3 ] / / M r3 = t h r e a d _ i n f o - > c p u
ld4 r2 = [ r2 ] / / M r2 = t h r e a d _ i n f o - > f l a g s
( p6 ) b r . c o n d . s p n t . f e w . f a i l _ e i n v a l / / B
;;
tnat. n z p7 ,p0 = r33 / / I g u a r d a g a i n s t N a T a r g u m e n t
( p7 ) b r . c o n d . s p n t . f e w . f a i l _ e i n v a l / / B
# ifdef C O N F I G _ N U M A
movl r17 =cpu_to_node_map
;;
EX( . f a i l _ e f a u l t , p r o b e . w . f a u l t r32 , 3 ) / / M T h i s t a k e s 5 c y c l e s
EX( . f a i l _ e f a u l t , p r o b e . w . f a u l t r33 , 3 ) / / M T h i s t a k e s 5 c y c l e s
shladd r18 =r3 ,1 ,r17
;;
ld2 r20 = [ r18 ] / / r20 = c p u _ t o _ n o d e _ m a p [ c p u ]
and r2 = T I F _ A L L W O R K _ M A S K ,r2
;;
cmp. n e p8 ,p0 =0 ,r2
( p8 ) b r . s p n t . m a n y f s y s _ f a l l b a c k _ s y s c a l l
;;
;;
EX( . f a i l _ e f a u l t , s t 4 [ r32 ] = r3 )
EX( . f a i l _ e f a u l t , s t 2 [ r33 ] = r20 )
mov r8 =0
;;
# else
EX( . f a i l _ e f a u l t , p r o b e . w . f a u l t r32 , 3 ) / / M T h i s t a k e s 5 c y c l e s
EX( . f a i l _ e f a u l t , p r o b e . w . f a u l t r33 , 3 ) / / M T h i s t a k e s 5 c y c l e s
and r2 = T I F _ A L L W O R K _ M A S K ,r2
;;
cmp. n e p8 ,p0 =0 ,r2
( p8 ) b r . s p n t . m a n y f s y s _ f a l l b a c k _ s y s c a l l
;;
EX( . f a i l _ e f a u l t , s t 4 [ r32 ] = r3 )
EX( . f a i l _ e f a u l t , s t 2 [ r33 ] = r0 )
mov r8 =0
;;
# endif
FSYS_ R E T U R N
END( f s y s _ g e t c p u )
2005-04-17 02:20:36 +04:00
ENTRY( f s y s _ f a l l b a c k _ s y s c a l l )
.prologue
.altrp b6
.body
/ *
* We o n l y g e t h e r e f r o m l i g h t - w e i g h t s y s c a l l h a n d l e r s . T h u s , w e a l r e a d y
* know t h a t r15 c o n t a i n s a v a l i d s y s c a l l n u m b e r . N o n e e d t o r e - c h e c k .
* /
adds r17 = - 1 0 2 4 ,r15
movl r14 =sys_call_table
;;
rsm p s r . i
shladd r18 =r17 ,3 ,r14
;;
ld8 r18 = [ r18 ] / / l o a d n o r m a l ( h e a v y - w e i g h t ) s y s c a l l e n t r y - p o i n t
mov r29 =psr / / r e a d p s r ( 1 2 c y c l o a d l a t e n c y )
mov r27 =ar . r s c
mov r21 =ar . f p s r
mov r26 =ar . p f s
END( f s y s _ f a l l b a c k _ s y s c a l l )
/* FALL THROUGH */
GLOBAL_ E N T R Y ( f s y s _ b u b b l e _ d o w n )
.prologue
.altrp b6
.body
/ *
2005-04-28 08:21:26 +04:00
* We g e t h e r e f o r s y s c a l l s t h a t d o n ' t h a v e a l i g h t w e i g h t
* handler. F o r t h o s e , w e n e e d t o b u b b l e d o w n i n t o t h e k e r n e l
* and t h a t r e q u i r e s s e t t i n g u p a m i n i m a l p t _ r e g s s t r u c t u r e ,
* and i n i t i a l i z i n g t h e C P U s t a t e m o r e o r l e s s a s i f a n
* interruption h a d o c c u r r e d . T o m a k e s y s c a l l - r e s t a r t s w o r k ,
* we s e t u p p t _ r e g s s u c h t h a t c r _ i i p p o i n t s t o t h e s e c o n d
* instruction i n s y s c a l l _ v i a _ b r e a k . D e c r e m e n t i n g t h e I P
* hence w i l l r e s t a r t t h e s y s c a l l v i a b r e a k a n d n o t
* decrementing I P w i l l r e t u r n u s t o t h e c a l l e r , a s u s u a l .
* Note t h a t w e p r e s e r v e t h e v a l u e o f p s r . p p r a t h e r t h a n
* initializing i t f r o m d c r . p p . T h i s m a k e s i t p o s s i b l e t o
* distinguish f s y s c a l l e x e c u t i o n f r o m o t h e r p r i v i l e g e d
* execution.
2005-04-17 02:20:36 +04:00
*
* On e n t r y :
2005-04-28 08:21:26 +04:00
* - normal f s y s c a l l h a n d l e r r e g i s t e r u s a g e , e x c e p t
* that w e a l s o h a v e :
2005-04-17 02:20:36 +04:00
* - r18 : address o f s y s c a l l e n t r y p o i n t
* - r21 : ar. f p s r
* - r26 : ar. p f s
* - r27 : ar. r s c
* - r29 : psr
2005-04-28 08:21:26 +04:00
*
* We u s e d t o c l e a r s o m e P S R b i t s h e r e b u t t h a t r e q u i r e s s l o w
* serialization. F o r t u n t e l y , t h a t i s n ' t r e a l l y n e c e s s a r y .
* The r a t i o n a l e i s a s f o l l o w s : w e u s e d t o c l e a r b i t s
* ~ PSR_ P R E S E R V E D _ B I T S i n P S R . L . S i n c e
* PSR_ P R E S E R V E D _ B I T S = =PSR . { U P ,M F L ,M F H ,P K ,D T ,P P ,S P ,R T ,I C } , w e
* ended u p c l e a r i n g P S R . { B E ,A C ,I ,D F L ,D F H ,D I ,D B ,S I ,T B } .
* However,
*
* PSR. B E : a l r e a d y i s t u r n e d o f f i n _ _ k e r n e l _ s y s c a l l _ v i a _ e p c ( )
* PSR. A C : d o n ' t c a r e ( k e r n e l n o r m a l l y t u r n s P S R . A C o n )
* PSR. I : a l r e a d y t u r n e d o f f b y t h e t i m e f s y s _ b u b b l e _ d o w n g e t s
* invoked
* PSR. D F L : a l w a y s 0 ( k e r n e l n e v e r t u r n s i t o n )
* PSR. D F H : d o n ' t c a r e - - - k e r n e l n e v e r t o u c h e s f32 - f12 7 o n i t s o w n
* initiative
* PSR. D I : a l w a y s 0 ( k e r n e l n e v e r t u r n s i t o n )
* PSR. S I : a l w a y s 0 ( k e r n e l n e v e r t u r n s i t o n )
* PSR. D B : d o n ' t c a r e - - - k e r n e l n e v e r e n a b l e s k e r n e l - l e v e l
* breakpoints
* PSR. T B : m u s t b e 0 a l r e a d y ; if it wasn't zero on entry to
* _ _ kernel_ s y s c a l l _ v i a _ e p c , t h e b r a n c h t o f s y s _ b u b b l e _ d o w n
* will t r i g g e r a t a k e n b r a n c h ; the taken-trap-handler then
* converts t h e s y s c a l l i n t o a b r e a k - b a s e d s y s t e m - c a l l .
2005-04-17 02:20:36 +04:00
* /
/ *
2005-04-28 08:21:26 +04:00
* Reading p s r . l g i v e s u s o n l y b i t s 0 - 3 1 , p s r . i t , a n d p s r . m c .
* The r e s t w e h a v e t o s y n t h e s i z e .
2005-04-17 02:20:36 +04:00
* /
2005-04-28 08:21:26 +04:00
# define P S R _ O N E _ B I T S ( ( 3 < < I A 6 4 _ P S R _ C P L 0 _ B I T ) \
| ( 0 x1 < < I A 6 4 _ P S R _ R I _ B I T ) \
2005-04-17 02:20:36 +04:00
| IA6 4 _ P S R _ B N | I A 6 4 _ P S R _ I )
2005-04-28 08:21:26 +04:00
invala / / M 0 | 1
movl r14 =ia64_ret_from_syscall / / X
2005-04-17 02:20:36 +04:00
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-28 08:20:51 +04:00
nop. m 0
2005-04-28 08:21:26 +04:00
movl r28 =__kernel_syscall_via_break / / X c r e a t e c r . i i p
2005-04-17 02:20:36 +04:00
;;
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-28 08:20:51 +04:00
2005-04-28 08:21:26 +04:00
mov r2 =r16 / / A g e t t a s k a d d r t o a d d l - a d d r e s s a b l e r e g i s t e r
adds r16 =IA64_TASK_THREAD_ON_USTACK_OFFSET ,r16 / / A
mov r31 =pr / / I 0 s a v e p r ( 2 c y c )
2005-04-17 02:20:36 +04:00
;;
2005-04-28 08:21:26 +04:00
st1 [ r16 ] =r0 / / M 2 | 3 c l e a r c u r r e n t - > t h r e a d . o n _ u s t a c k f l a g
addl r22 =IA64_RBS_OFFSET ,r2 / / A c o m p u t e b a s e o f R B S
add r3 =TI_FLAGS + I A 6 4 _ T A S K _ S I Z E ,r2 / / A
2005-04-17 02:20:36 +04:00
;;
2005-04-28 08:21:26 +04:00
ld4 r3 = [ r3 ] / / M 0 | 1 r3 = c u r r e n t _ t h r e a d _ i n f o ( ) - > f l a g s
lfetch. f a u l t . e x c l . n t 1 [ r22 ] / / M 0 | 1 p r e f e t c h r e g i s t e r b a c k i n g - s t o r e
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-28 08:20:51 +04:00
nop. i 0
2005-04-17 02:20:36 +04:00
;;
2005-04-28 08:21:26 +04:00
mov a r . r s c =0 / / M 2 s e t e n f o r c e d l a z y m o d e , p l 0 , L E , l o a d r s =0
2008-01-29 08:27:30 +03:00
# ifdef C O N F I G _ V I R T _ C P U _ A C C O U N T I N G
mov. m r30 =ar . i t c / / M g e t c y c l e f o r a c c o u n t i n g
# else
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-28 08:20:51 +04:00
nop. m 0
2008-01-29 08:27:30 +03:00
# endif
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-28 08:20:51 +04:00
nop. i 0
;;
2005-04-28 08:21:26 +04:00
mov r23 =ar . b s p s t o r e / / M 2 ( 1 2 c y c ) s a v e a r . b s p s t o r e
mov. m r24 =ar . r n a t / / M 2 ( 5 c y c ) r e a d a r . r n a t ( d u a l - i s s u e s ! )
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-28 08:20:51 +04:00
nop. i 0
2005-04-17 02:20:36 +04:00
;;
2005-04-28 08:21:26 +04:00
mov a r . b s p s t o r e =r22 / / M 2 ( 6 c y c ) s w i t c h t o k e r n e l R B S
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-28 08:20:51 +04:00
movl r8 =PSR_ONE_BITS / / X
2005-04-17 02:20:36 +04:00
;;
2005-04-28 08:21:26 +04:00
mov r25 =ar . u n a t / / M 2 ( 5 c y c ) s a v e a r . u n a t
mov r19 =b6 / / I 0 s a v e b6 ( 2 c y c )
mov r20 =r1 / / A s a v e c a l l e r ' s g p i n r20
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-28 08:20:51 +04:00
;;
2005-04-28 08:21:26 +04:00
or r29 =r8 ,r29 / / A c o n s t r u c t c r . i p s r v a l u e t o s a v e
mov b6 =r18 / / I 0 c o p y s y s c a l l e n t r y - p o i n t t o b6 ( 7 c y c )
addl r1 =IA64_STK_OFFSET - I A 6 4 _ P T _ R E G S _ S I Z E ,r2 / / A c o m p u t e b a s e o f m e m o r y s t a c k
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-28 08:20:51 +04:00
2005-04-28 08:21:26 +04:00
mov r18 =ar . b s p / / M 2 s a v e ( k e r n e l ) a r . b s p ( 1 2 c y c )
cmp. n e p K S t k ,p U S t k =r0 ,r0 / / A s e t p K S t k < - 0 , p U S t k < - 1
br. c a l l . s p t k . m a n y b7 =ia64_syscall_setup / / B
2005-04-17 02:20:36 +04:00
;;
2008-01-29 08:27:30 +03:00
# ifdef C O N F I G _ V I R T _ C P U _ A C C O U N T I N G
/ / mov. m r30 =ar . i t c i s c a l l e d i n a d v a n c e
add r16 =TI_AC_STAMP + I A 6 4 _ T A S K _ S I Z E ,r2
add r17 =TI_AC_LEAVE + I A 6 4 _ T A S K _ S I Z E ,r2
;;
ld8 r18 = [ r16 ] ,T I _ A C _ S T I M E - T I _ A C _ S T A M P / / t i m e a t l a s t c h e c k i n k e r n e l
ld8 r19 = [ r17 ] ,T I _ A C _ U T I M E - T I _ A C _ L E A V E / / t i m e a t l e a v e k e r n e l
;;
ld8 r20 = [ r16 ] ,T I _ A C _ S T A M P - T I _ A C _ S T I M E / / c u m u l a t e d s t i m e
ld8 r21 = [ r17 ] / / c u m u l a t e d u t i m e
sub r22 =r19 ,r18 / / s t i m e b e f o r e l e a v e k e r n e l
;;
st8 [ r16 ] =r30 ,T I _ A C _ S T I M E - T I _ A C _ S T A M P / / u p d a t e s t a m p
sub r18 =r30 ,r19 / / e l a p s e d t i m e i n u s e r m o d e
;;
add r20 =r20 ,r22 / / s u m s t i m e
add r21 =r21 ,r18 / / s u m u t i m e
;;
st8 [ r16 ] =r20 / / u p d a t e s t i m e
st8 [ r17 ] =r21 / / u p d a t e u t i m e
;;
# endif
2005-04-28 08:21:26 +04:00
mov a r . r s c =0x3 / / M 2 s e t e a g e r m o d e , p l 0 , L E , l o a d r s =0
mov r p =r14 / / I 0 s e t t h e r e a l r e t u r n a d d r
2005-05-05 17:40:00 +04:00
and r3 =_TIF_SYSCALL_TRACEAUDIT ,r3 / / A
2005-04-17 02:20:36 +04:00
;;
2005-04-28 08:21:26 +04:00
ssm p s r . i / / M 2 w e ' r e o n k e r n e l s t a c k s n o w , r e e n a b l e i r q s
2005-05-05 17:40:00 +04:00
cmp. e q p8 ,p0 =r3 ,r0 / / A
2005-04-28 08:21:26 +04:00
( p1 0 ) b r . c o n d . s p n t . m a n y i a64 _ r e t _ f r o m _ s y s c a l l / / B r e t u r n i f b a d c a l l - f r a m e o r r15 i s a N a T
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-28 08:20:51 +04:00
nop. m 0
2005-04-28 08:21:26 +04:00
( p8 ) b r . c a l l . s p t k . m a n y b6 =b6 / / B ( i g n o r e r e t u r n a d d r e s s )
br. c o n d . s p n t i a64 _ t r a c e _ s y s c a l l / / B
2005-04-17 02:20:36 +04:00
END( f s y s _ b u b b l e _ d o w n )
.rodata
.align 8
.globl fsyscall_table
data8 f s y s _ b u b b l e _ d o w n
fsyscall_table :
data8 f s y s _ n i _ s y s c a l l
data8 0 / / e x i t / / 1 0 2 5
data8 0 / / r e a d
data8 0 / / w r i t e
data8 0 / / o p e n
data8 0 / / c l o s e
data8 0 / / c r e a t / / 1 0 3 0
data8 0 / / l i n k
data8 0 / / u n l i n k
data8 0 / / e x e c v e
data8 0 / / c h d i r
data8 0 / / f c h d i r / / 1 0 3 5
data8 0 / / u t i m e s
data8 0 / / m k n o d
data8 0 / / c h m o d
data8 0 / / c h o w n
data8 0 / / l s e e k / / 1 0 4 0
data8 f s y s _ g e t p i d / / g e t p i d
data8 f s y s _ g e t p p i d / / g e t p p i d
data8 0 / / m o u n t
data8 0 / / u m o u n t
data8 0 / / s e t u i d / / 1 0 4 5
data8 0 / / g e t u i d
data8 0 / / g e t e u i d
data8 0 / / p t r a c e
data8 0 / / a c c e s s
data8 0 / / s y n c / / 1 0 5 0
data8 0 / / f s y n c
data8 0 / / f d a t a s y n c
data8 0 / / k i l l
data8 0 / / r e n a m e
data8 0 / / m k d i r / / 1 0 5 5
data8 0 / / r m d i r
data8 0 / / d u p
data8 0 / / p i p e
data8 0 / / t i m e s
data8 0 / / b r k / / 1 0 6 0
data8 0 / / s e t g i d
data8 0 / / g e t g i d
data8 0 / / g e t e g i d
data8 0 / / a c c t
data8 0 / / i o c t l / / 1 0 6 5
data8 0 / / f c n t l
data8 0 / / u m a s k
data8 0 / / c h r o o t
data8 0 / / u s t a t
data8 0 / / d u p2 / / 1 0 7 0
data8 0 / / s e t r e u i d
data8 0 / / s e t r e g i d
data8 0 / / g e t r e s u i d
data8 0 / / s e t r e s u i d
data8 0 / / g e t r e s g i d / / 1 0 7 5
data8 0 / / s e t r e s g i d
data8 0 / / g e t g r o u p s
data8 0 / / s e t g r o u p s
data8 0 / / g e t p g i d
data8 0 / / s e t p g i d / / 1 0 8 0
data8 0 / / s e t s i d
data8 0 / / g e t s i d
data8 0 / / s e t h o s t n a m e
data8 0 / / s e t r l i m i t
data8 0 / / g e t r l i m i t / / 1 0 8 5
data8 0 / / g e t r u s a g e
data8 f s y s _ g e t t i m e o f d a y / / g e t t i m e o f d a y
data8 0 / / s e t t i m e o f d a y
data8 0 / / s e l e c t
data8 0 / / p o l l / / 1 0 9 0
data8 0 / / s y m l i n k
data8 0 / / r e a d l i n k
data8 0 / / u s e l i b
data8 0 / / s w a p o n
data8 0 / / s w a p o f f / / 1 0 9 5
data8 0 / / r e b o o t
data8 0 / / t r u n c a t e
data8 0 / / f t r u n c a t e
data8 0 / / f c h m o d
data8 0 / / f c h o w n / / 1 1 0 0
data8 0 / / g e t p r i o r i t y
data8 0 / / s e t p r i o r i t y
data8 0 / / s t a t f s
data8 0 / / f s t a t f s
data8 0 / / g e t t i d / / 1 1 0 5
data8 0 / / s e m g e t
data8 0 / / s e m o p
data8 0 / / s e m c t l
data8 0 / / m s g g e t
data8 0 / / m s g s n d / / 1 1 1 0
data8 0 / / m s g r c v
data8 0 / / m s g c t l
data8 0 / / s h m g e t
data8 0 / / s h m a t
data8 0 / / s h m d t / / 1 1 1 5
data8 0 / / s h m c t l
data8 0 / / s y s l o g
data8 0 / / s e t i t i m e r
data8 0 / / g e t i t i m e r
data8 0 / / 1 1 2 0
data8 0
data8 0
data8 0 / / v h a n g u p
data8 0 / / l c h o w n
data8 0 / / r e m a p _ f i l e _ p a g e s / / 1 1 2 5
data8 0 / / w a i t 4
data8 0 / / s y s i n f o
data8 0 / / c l o n e
data8 0 / / s e t d o m a i n n a m e
data8 0 / / n e w u n a m e / / 1 1 3 0
data8 0 / / a d j t i m e x
data8 0
data8 0 / / i n i t _ m o d u l e
data8 0 / / d e l e t e _ m o d u l e
data8 0 / / 1 1 3 5
data8 0
data8 0 / / q u o t a c t l
data8 0 / / b d f l u s h
data8 0 / / s y s f s
data8 0 / / p e r s o n a l i t y / / 1 1 4 0
data8 0 / / a f s _ s y s c a l l
data8 0 / / s e t f s u i d
data8 0 / / s e t f s g i d
data8 0 / / g e t d e n t s
data8 0 / / f l o c k / / 1 1 4 5
data8 0 / / r e a d v
data8 0 / / w r i t e v
data8 0 / / p r e a d64
data8 0 / / p w r i t e 6 4
data8 0 / / s y s c t l / / 1 1 5 0
data8 0 / / m m a p
data8 0 / / m u n m a p
data8 0 / / m l o c k
data8 0 / / m l o c k a l l
data8 0 / / m p r o t e c t / / 1 1 5 5
data8 0 / / m r e m a p
data8 0 / / m s y n c
data8 0 / / m u n l o c k
data8 0 / / m u n l o c k a l l
data8 0 / / s c h e d _ g e t p a r a m / / 1 1 6 0
data8 0 / / s c h e d _ s e t p a r a m
data8 0 / / s c h e d _ g e t s c h e d u l e r
data8 0 / / s c h e d _ s e t s c h e d u l e r
data8 0 / / s c h e d _ y i e l d
data8 0 / / s c h e d _ g e t _ p r i o r i t y _ m a x / / 1 1 6 5
data8 0 / / s c h e d _ g e t _ p r i o r i t y _ m i n
data8 0 / / s c h e d _ r r _ g e t _ i n t e r v a l
data8 0 / / n a n o s l e e p
data8 0 / / n f s s e r v c t l
data8 0 / / p r c t l / / 1 1 7 0
data8 0 / / g e t p a g e s i z e
data8 0 / / m m a p2
data8 0 / / p c i c o n f i g _ r e a d
data8 0 / / p c i c o n f i g _ w r i t e
data8 0 / / p e r f m o n c t l / / 1 1 7 5
data8 0 / / s i g a l t s t a c k
data8 0 / / r t _ s i g a c t i o n
data8 0 / / r t _ s i g p e n d i n g
data8 f s y s _ r t _ s i g p r o c m a s k / / r t _ s i g p r o c m a s k
data8 0 / / r t _ s i g q u e u e i n f o / / 1 1 8 0
data8 0 / / r t _ s i g r e t u r n
data8 0 / / r t _ s i g s u s p e n d
data8 0 / / r t _ s i g t i m e d w a i t
data8 0 / / g e t c w d
data8 0 / / c a p g e t / / 1 1 8 5
data8 0 / / c a p s e t
data8 0 / / s e n d f i l e
data8 0
data8 0
data8 0 / / s o c k e t / / 1 1 9 0
data8 0 / / b i n d
data8 0 / / c o n n e c t
data8 0 / / l i s t e n
data8 0 / / a c c e p t
data8 0 / / g e t s o c k n a m e / / 1 1 9 5
data8 0 / / g e t p e e r n a m e
data8 0 / / s o c k e t p a i r
data8 0 / / s e n d
data8 0 / / s e n d t o
data8 0 / / r e c v / / 1 2 0 0
data8 0 / / r e c v f r o m
data8 0 / / s h u t d o w n
data8 0 / / s e t s o c k o p t
data8 0 / / g e t s o c k o p t
data8 0 / / s e n d m s g / / 1 2 0 5
data8 0 / / r e c v m s g
data8 0 / / p i v o t _ r o o t
data8 0 / / m i n c o r e
data8 0 / / m a d v i s e
data8 0 / / n e w s t a t / / 1 2 1 0
data8 0 / / n e w l s t a t
data8 0 / / n e w f s t a t
data8 0 / / c l o n e 2
data8 0 / / g e t d e n t s64
data8 0 / / g e t u n w i n d / / 1 2 1 5
data8 0 / / r e a d a h e a d
data8 0 / / s e t x a t t r
data8 0 / / l s e t x a t t r
data8 0 / / f s e t x a t t r
data8 0 / / g e t x a t t r / / 1 2 2 0
data8 0 / / l g e t x a t t r
data8 0 / / f g e t x a t t r
data8 0 / / l i s t x a t t r
data8 0 / / l l i s t x a t t r
data8 0 / / f l i s t x a t t r / / 1 2 2 5
data8 0 / / r e m o v e x a t t r
data8 0 / / l r e m o v e x a t t r
data8 0 / / f r e m o v e x a t t r
data8 0 / / t k i l l
data8 0 / / f u t e x / / 1 2 3 0
data8 0 / / s c h e d _ s e t a f f i n i t y
data8 0 / / s c h e d _ g e t a f f i n i t y
data8 f s y s _ s e t _ t i d _ a d d r e s s / / s e t _ t i d _ a d d r e s s
data8 0 / / f a d v i s e 6 4 _ 6 4
data8 0 / / t g k i l l / / 1 2 3 5
data8 0 / / e x i t _ g r o u p
data8 0 / / l o o k u p _ d c o o k i e
data8 0 / / i o _ s e t u p
data8 0 / / i o _ d e s t r o y
data8 0 / / i o _ g e t e v e n t s / / 1 2 4 0
data8 0 / / i o _ s u b m i t
data8 0 / / i o _ c a n c e l
data8 0 / / e p o l l _ c r e a t e
data8 0 / / e p o l l _ c t l
data8 0 / / e p o l l _ w a i t / / 1 2 4 5
data8 0 / / r e s t a r t _ s y s c a l l
data8 0 / / s e m t i m e d o p
data8 0 / / t i m e r _ c r e a t e
data8 0 / / t i m e r _ s e t t i m e
data8 0 / / t i m e r _ g e t t i m e / / 1 2 5 0
data8 0 / / t i m e r _ g e t o v e r r u n
data8 0 / / t i m e r _ d e l e t e
data8 0 / / c l o c k _ s e t t i m e
data8 f s y s _ c l o c k _ g e t t i m e / / c l o c k _ g e t t i m e
2007-02-13 03:27:10 +03:00
data8 0 / / c l o c k _ g e t r e s / / 1 2 5 5
data8 0 / / c l o c k _ n a n o s l e e p
data8 0 / / f s t a t f s64
data8 0 / / s t a t f s64
data8 0 / / m b i n d
data8 0 / / g e t _ m e m p o l i c y / / 1 2 6 0
data8 0 / / s e t _ m e m p o l i c y
data8 0 / / m q _ o p e n
data8 0 / / m q _ u n l i n k
data8 0 / / m q _ t i m e d s e n d
data8 0 / / m q _ t i m e d r e c e i v e / / 1 2 6 5
data8 0 / / m q _ n o t i f y
data8 0 / / m q _ g e t s e t a t t r
data8 0 / / k e x e c _ l o a d
data8 0 / / v s e r v e r
data8 0 / / w a i t i d / / 1 2 7 0
data8 0 / / a d d _ k e y
data8 0 / / r e q u e s t _ k e y
data8 0 / / k e y c t l
data8 0 / / i o p r i o _ s e t
data8 0 / / i o p r i o _ g e t / / 1 2 7 5
data8 0 / / m o v e _ p a g e s
data8 0 / / i n o t i f y _ i n i t
data8 0 / / i n o t i f y _ a d d _ w a t c h
data8 0 / / i n o t i f y _ r m _ w a t c h
data8 0 / / m i g r a t e _ p a g e s / / 1 2 8 0
data8 0 / / o p e n a t
data8 0 / / m k d i r a t
data8 0 / / m k n o d a t
data8 0 / / f c h o w n a t
data8 0 / / f u t i m e s a t / / 1 2 8 5
data8 0 / / n e w f s t a t a t
data8 0 / / u n l i n k a t
data8 0 / / r e n a m e a t
data8 0 / / l i n k a t
data8 0 / / s y m l i n k a t / / 1 2 9 0
data8 0 / / r e a d l i n k a t
data8 0 / / f c h m o d a t
data8 0 / / f a c c e s s a t
data8 0
data8 0 / / 1 2 9 5
data8 0 / / u n s h a r e
data8 0 / / s p l i c e
data8 0 / / s e t _ r o b u s t _ l i s t
data8 0 / / g e t _ r o b u s t _ l i s t
data8 0 / / s y n c _ f i l e _ r a n g e / / 1 3 0 0
data8 0 / / t e e
data8 0 / / v m s p l i c e
data8 0
data8 f s y s _ g e t c p u / / g e t c p u / / 1 3 0 4
2006-02-01 01:26:25 +03:00
2006-02-28 19:53:32 +03:00
/ / fill i n z e r o s f o r t h e r e m a i n i n g e n t r i e s
.zero :
.space fsyscall_table + 8 * NR_ s y s c a l l s - . z e r o , 0