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linux/drivers/clocksource/Kconfig

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clocksource: Add a Kconfig menu Move the clocksource Kconfig entries into their own menu, so that they don't pollute the main device driver menu. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/20140616114845.343e9960@endymion.delvare Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-06-16 13:48:45 +04:00
menu "Clock Source drivers"
clocksource: Disallow drivers for ARCH_USES_GETTIMEOFFSET We can now select clocksource drivers like ti-32k and CONFIG_OF on ancient machines that still use gettimeoffset, and the combination results in a link error. arch/arm/kernel/built-in.o: In function `time_init': (.init.text+0xc28): undefined reference to `clocksource_probe' The reason for this is that the Makefile is hidden behind CONFIG_ARCH_USES_GETTIMEOFFSET, but the Kconfig file is not, and it has shown up just now because the ti-32k driver was added and can be selected using COMPILE_TEST on all platforms. This patch hides the Kconfig menu in CONFIG_ARCH_USES_GETTIMEOFFSET as well. Fixes: dfedaf105d60 "clocksource: ti-32k: make it depend on GENERIC_CLOCKSOURCE" Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: linux-arm-kernel@lists.infradead.org Cc: Felipe Balbi <balbi@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/7579471.4N90fYPQOK@wuerfel Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-11-16 19:51:17 +03:00
depends on !ARCH_USES_GETTIMEOFFSET
clocksource: Add a Kconfig menu Move the clocksource Kconfig entries into their own menu, so that they don't pollute the main device driver menu. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/20140616114845.343e9960@endymion.delvare Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-06-16 13:48:45 +04:00
clocksource: add common of_clksrc_init() function It is desirable to move all clocksource drivers to drivers/clocksource, yet each requires its own initialization function. We'd rather not pollute <linux/> with a header for each function. Instead, create a single of_clksrc_init() function which will determine which clocksource driver to initialize based on device tree. Based on a similar patch for drivers/irqchip by Thomas Petazzoni. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-20 03:41:20 +04:00
config CLKSRC_OF
bool
clocksource: Add new CLKSRC_{PROBE,ACPI} config symbols The clocksource probing infrastructure currently depends on CONFIG_CLKSRC_OF, which depends on CONFIG_OF. In order to make this infrastructure selectable even if CONFIG_OF is not selected, introduce a new CONFIG_CLKSRC_PROBE (which allow the infrastructure to be compiled in), and CONFIG_CLKSRC_ACPI (which is the pendent of CONFIG_CLKSRC_OF for ACPI). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-09-28 17:49:16 +03:00
select CLKSRC_PROBE
config CLKSRC_ACPI
bool
select CLKSRC_PROBE
config CLKSRC_PROBE
bool
clocksource: add common of_clksrc_init() function It is desirable to move all clocksource drivers to drivers/clocksource, yet each requires its own initialization function. We'd rather not pollute <linux/> with a header for each function. Instead, create a single of_clksrc_init() function which will determine which clocksource driver to initialize based on device tree. Based on a similar patch for drivers/irqchip by Thomas Petazzoni. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-20 03:41:20 +04:00
clocksource: add common i8253 PIT clocksource This is based upon both arch/arm/mach-footbridge/isa-timer.c and arch/x86/kernel/i8253.c. Acked-by: John Stultz <john.stultz@linaro.org> Acked-by: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-08 21:47:58 +04:00
config CLKSRC_I8253
bool
clocksource: add common mmio clocksource Add a generic mmio clocksource, covering both 32-bit and 16-bit register access sizes, for up or down counters. This can be used to easily create clocksources for simple counter-based implementations. Cc: Alessandro Rubini <rubini@unipv.it> Cc: Colin Cross <ccross@android.com> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Erik Gilling <konkers@android.com> Acked-by: "Hans J. Koch" <hjk@hansjkoch.de> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Krzysztof Halasa <khc@pm.waw.pl> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Lennert Buytenhek <kernel@wantstofly.org> Cc: Linus Walleij <linus.walleij@stericsson.com> Cc: linux-omap@vger.kernel.org Acked-by: Nicolas Pitre <nico@fluxnic.net> Cc: Olof Johansson <olof@lixom.net> Tested-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Cc: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-08 17:06:52 +04:00
i8253: Create common clockevent implementation arm, mips and x86 implement i8253 based clockevents. All the same code copied. Create a common implementation in drivers/clocksource/i8253.c. About time to rename drivers/clocksource/ to something else. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: John Stultz <john.stultz@linaro.org> Link: http://lkml.kernel.org/r/20110609130621.921710458@linutronix.de
2011-06-09 17:08:25 +04:00
config CLKEVT_I8253
bool
i8253: Consolidate all kernel definitions of i8253_lock Move them to drivers/clocksource/i8253.c and remove the implementations in arch/ [ tglx: Avoid the extra file in lib - folded arch patches in. The export will become conditional in a later step ] Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Link: http://lkml.kernel.org/r/20110601180610.221426078@duck.linux-mips.net Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-06-01 22:04:59 +04:00
config I8253_LOCK
bool
config CLKBLD_I8253
i8253: Create common clockevent implementation arm, mips and x86 implement i8253 based clockevents. All the same code copied. Create a common implementation in drivers/clocksource/i8253.c. About time to rename drivers/clocksource/ to something else. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: John Stultz <john.stultz@linaro.org> Link: http://lkml.kernel.org/r/20110609130621.921710458@linutronix.de
2011-06-09 17:08:25 +04:00
def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK
i8253: Consolidate all kernel definitions of i8253_lock Move them to drivers/clocksource/i8253.c and remove the implementations in arch/ [ tglx: Avoid the extra file in lib - folded arch patches in. The export will become conditional in a later step ] Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Link: http://lkml.kernel.org/r/20110601180610.221426078@duck.linux-mips.net Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-06-01 22:04:59 +04:00
clocksource: add common mmio clocksource Add a generic mmio clocksource, covering both 32-bit and 16-bit register access sizes, for up or down counters. This can be used to easily create clocksources for simple counter-based implementations. Cc: Alessandro Rubini <rubini@unipv.it> Cc: Colin Cross <ccross@android.com> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Erik Gilling <konkers@android.com> Acked-by: "Hans J. Koch" <hjk@hansjkoch.de> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Krzysztof Halasa <khc@pm.waw.pl> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Lennert Buytenhek <kernel@wantstofly.org> Cc: Linus Walleij <linus.walleij@stericsson.com> Cc: linux-omap@vger.kernel.org Acked-by: Nicolas Pitre <nico@fluxnic.net> Cc: Olof Johansson <olof@lixom.net> Tested-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Cc: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-08 17:06:52 +04:00
config CLKSRC_MMIO
bool
clocksource: apb: Share APB timer code with other platforms The APB timers are an IP block from Synopsys (DesignWare APB timers) and are also found in other systems including ARM SoC's. This patch adds functions for creating clock_event_devices and clocksources from APB timers but does not do the resource allocation. This is handled in a higher layer to allow the timers to be created from multiple methods such as platform_devices. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: John Stultz <john.stultz@linaro.org>
2011-06-06 15:43:07 +04:00
clocksource: Driver for Conexant Digicolor SoC timer Add clocksource driver to the Conexant CX92755 SoC, part of the Digicolor SoCs series. Hardware provides 8 timers, A to H. Timer A is dedicated to a future watchdog driver so we don't use it here. Use timer B for sched_clock, and timer C for clock_event. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-01-26 21:35:18 +03:00
config DIGICOLOR_TIMER
bool
clocksource: apb: Share APB timer code with other platforms The APB timers are an IP block from Synopsys (DesignWare APB timers) and are also found in other systems including ARM SoC's. This patch adds functions for creating clock_event_devices and clocksources from APB timers but does not do the resource allocation. This is handled in a higher layer to allow the timers to be created from multiple methods such as platform_devices. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: John Stultz <john.stultz@linaro.org>
2011-06-06 15:43:07 +04:00
config DW_APB_TIMER
bool
clocksource: add DBX500 PRCMU Timer support This patch adds the DBX500 PRCMU Timer driver as a clocksource and as sched_clock. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com> Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-05-27 12:30:12 +04:00
clocksource: dw_apb_timer: Add common DTS glue for dw_apb_timer Make a common device tree glue for clocksource/dw_apb_timer. Move mach-picoxcell/time.c to be a generic device tree application of the dw_apb_timer. Configure mach-picoxcell to use the dw_apb_timer_of device tree implementation in drivers/clocksource. Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-07-12 00:13:16 +04:00
config DW_APB_TIMER_OF
bool
clocksource: dw_apb_timer_of: select DW_APB_TIMER dw_apb_timer_of is the driver part facing devicetree platforms and calls into dw_apb_timer with the data gathered from the dt. Currently the two platforms using the dw_apb_timer_of select both the options for the core timer and the dt addon. As dw_apb_timer_of always depends on dw_apb_timer let it select DW_APB_TIMER itself without the need for every platform to do it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Dinh Nguyen <dinguyen@altera.com>
2013-06-04 13:38:11 +04:00
select DW_APB_TIMER
clocksource: dw_apb_timer_of: use clocksource_of_init dw_apb_timer_init used to search the devicetree for matching timer devices, making calls to it from board files necessary. Change the dw_apb_timer_init to work with CLOCKSOURCE_OF_DECLARE. With this change the function gets called once for each timer node and tracks these number of calls to attach clockevent and clocksource devices to the nodes. Also remove the calls to dw_apb_timer_init from all previous users, as clocksource_of_init is the default for init_time now. Tested on the upcoming rk3066 code. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Dinh Nguyen <dinguyen@altera.com>
2013-06-04 13:38:42 +04:00
select CLKSRC_OF
clocksource: dw_apb_timer: Add common DTS glue for dw_apb_timer Make a common device tree glue for clocksource/dw_apb_timer. Move mach-picoxcell/time.c to be a generic device tree application of the dw_apb_timer. Configure mach-picoxcell to use the dw_apb_timer_of device tree implementation in drivers/clocksource. Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-07-12 00:13:16 +04:00
clockevents: rockchip: Add rockchip timer for rk3288 The rk3288 board uses the architected timers and these ones are shutdown when the cpu is powered down. There is a need of a broadcast timer in this case to ensure proper wakeup when the cpus are in sleep mode and a timer expires. This driver provides the basic timer functionnality as a backup for the local timers at sleep time. The timer belongs to the alive subsystem. It includes two programmables 64 bits timer channels but the driver only uses 32bits. It works with two operations mode: free running and user defined count. Programing sequence: 1. Timer initialization: * Disable the timer by writing '0' to the CONTROLREG register * Program the timer mode by writing the mode to the CONTROLREG register * Set the interrupt mask 2. Setting the count value: * Load the count value to the registers COUNT0 and COUNT1 (not used). 3. Enable the timer * Write '1' to the CONTROLREG register with the mode (free running or user) Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
2015-01-26 00:06:02 +03:00
config ROCKCHIP_TIMER
clocksource/drivers/rockchip: Add COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Due to the dsb() usage in the driver, this driver is only compilable on ARM and ARM64. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-30 19:58:47 +03:00
bool "Rockchip timer driver" if COMPILE_TEST
depends on ARM || ARM64
clockevents: rockchip: Add rockchip timer for rk3288 The rk3288 board uses the architected timers and these ones are shutdown when the cpu is powered down. There is a need of a broadcast timer in this case to ensure proper wakeup when the cpus are in sleep mode and a timer expires. This driver provides the basic timer functionnality as a backup for the local timers at sleep time. The timer belongs to the alive subsystem. It includes two programmables 64 bits timer channels but the driver only uses 32bits. It works with two operations mode: free running and user defined count. Programing sequence: 1. Timer initialization: * Disable the timer by writing '0' to the CONTROLREG register * Program the timer mode by writing the mode to the CONTROLREG register * Set the interrupt mask 2. Setting the count value: * Load the count value to the registers COUNT0 and COUNT1 (not used). 3. Enable the timer * Write '1' to the CONTROLREG register with the mode (free running or user) Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
2015-01-26 00:06:02 +03:00
select CLKSRC_OF
clocksource/drivers/rockchip: Add COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Due to the dsb() usage in the driver, this driver is only compilable on ARM and ARM64. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-30 19:58:47 +03:00
help
Enables the support for the rockchip timer driver.
clockevents: rockchip: Add rockchip timer for rk3288 The rk3288 board uses the architected timers and these ones are shutdown when the cpu is powered down. There is a need of a broadcast timer in this case to ensure proper wakeup when the cpus are in sleep mode and a timer expires. This driver provides the basic timer functionnality as a backup for the local timers at sleep time. The timer belongs to the alive subsystem. It includes two programmables 64 bits timer channels but the driver only uses 32bits. It works with two operations mode: free running and user defined count. Programing sequence: 1. Timer initialization: * Disable the timer by writing '0' to the CONTROLREG register * Program the timer mode by writing the mode to the CONTROLREG register * Set the interrupt mask 2. Setting the count value: * Load the count value to the registers COUNT0 and COUNT1 (not used). 3. Enable the timer * Write '1' to the CONTROLREG register with the mode (free running or user) Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
2015-01-26 00:06:02 +03:00
clocksource: time-armada-370-xp: Marvell Armada 370/XP SoC timer driver Timer 0 is used as free-running clocksource, while timer 1 is used as clock_event_device. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Lior Amsalem <alior@marvell.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Yehuda Yitschak <yehuday@marvell.com> Tested-by: Lior Amsalem <alior@marvell.com> Acked-by: Andrew Lunn <andrew@lunn.ch> CC: Thomas Gleixner <tglx@linutronix.de> CC: John Stultz <johnstul@us.ibm.com>
2012-06-13 20:58:09 +04:00
config ARMADA_370_XP_TIMER
clocksource/drivers/armada-370-xp: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Due to the non portable 'delay' code, the compilation is restricted to the ARM architecture only. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-30 22:30:34 +03:00
bool "Armada 370 and XP timer driver" if COMPILE_TEST
depends on ARM
arm: clocksource: mvebu: Use the main timer as clock source from DT This commit: 573145f08c2b92c45498468afbbba909f6ce6135 clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLARE replaced a call to the driver's timer initialization by a call to clocksource_of_init(). However, it failed to select CONFIG_CLKSRC_OF. Fix this by selecting CONFIG_CLKSRC_OF for Armada370/XP machines. Without this change the kernel is stuck at: 'Calibrating delay loop...'. Signed-off-by: Jean Pihet <jean.pihet@linaro.org> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-09-18 22:55:09 +04:00
select CLKSRC_OF
clocksource/drivers/armada-370-xp: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Due to the non portable 'delay' code, the compilation is restricted to the ARM architecture only. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-30 22:30:34 +03:00
help
Enables the support for the Armada 370 and XP timer driver.
clocksource: time-armada-370-xp: Marvell Armada 370/XP SoC timer driver Timer 0 is used as free-running clocksource, while timer 1 is used as clock_event_device. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Lior Amsalem <alior@marvell.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Yehuda Yitschak <yehuday@marvell.com> Tested-by: Lior Amsalem <alior@marvell.com> Acked-by: Andrew Lunn <andrew@lunn.ch> CC: Thomas Gleixner <tglx@linutronix.de> CC: John Stultz <johnstul@us.ibm.com>
2012-06-13 20:58:09 +04:00
ARM: meson6: clocksource: Add Meson6 timer support Meson6 SoCs are equipped with 5 32-bit timers, called TIMER_A, TIMER_B, TIMER_C, TIMER_D and TIMER_E. The driver is providing clocksource support for the 32-bit counter using TIMER_E. Clockevents are also supported using TIMER_A. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Carlo Caione <carlo@caione.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
2014-09-29 03:50:05 +04:00
config MESON6_TIMER
clocksource/drivers/meson6: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-31 00:07:39 +03:00
bool "Meson6 timer driver" if COMPILE_TEST
clocksource: meson6: Select CLKSRC_MMIO Select CLKSRC_MMIO when the meson6_timer driver is enabled since it depends on clocksource MMIO functions. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Carlo Caione <carlo@caione.org>
2014-11-18 18:41:20 +03:00
select CLKSRC_MMIO
clocksource/drivers/meson6: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-31 00:07:39 +03:00
help
Enables the support for the Meson6 timer driver.
ARM: meson6: clocksource: Add Meson6 timer support Meson6 SoCs are equipped with 5 32-bit timers, called TIMER_A, TIMER_B, TIMER_C, TIMER_D and TIMER_E. The driver is providing clocksource support for the 32-bit counter using TIMER_E. Clockevents are also supported using TIMER_A. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Carlo Caione <carlo@caione.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
2014-09-29 03:50:05 +04:00
clocksource: Add Marvell Orion SoC timer This patch add a DT enabled driver for timers found on Marvell Orion SoCs (Kirkwood, Dove, Orion5x, and Discovery Innovation). It installs a free- running clocksource on timer0 and a clockevent source on timer1. Corresponding device tree documentation is also added. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch>
2013-06-11 10:38:50 +04:00
config ORION_TIMER
clocksource/drivers/orion: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. The driver is using the atomic_io API which is not portable, so the compilation is restricted to ARM only. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-31 00:28:31 +03:00
bool "Orion timer driver" if COMPILE_TEST
depends on ARM
clocksource: Add Marvell Orion SoC timer This patch add a DT enabled driver for timers found on Marvell Orion SoCs (Kirkwood, Dove, Orion5x, and Discovery Innovation). It installs a free- running clocksource on timer0 and a clockevent source on timer1. Corresponding device tree documentation is also added. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch>
2013-06-11 10:38:50 +04:00
select CLKSRC_OF
select CLKSRC_MMIO
clocksource/drivers/orion: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. The driver is using the atomic_io API which is not portable, so the compilation is restricted to ARM only. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-31 00:28:31 +03:00
help
Enables the support for the Orion timer driver
clocksource: Add Marvell Orion SoC timer This patch add a DT enabled driver for timers found on Marvell Orion SoCs (Kirkwood, Dove, Orion5x, and Discovery Innovation). It installs a free- running clocksource on timer0 and a clockevent source on timer1. Corresponding device tree documentation is also added. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch>
2013-06-11 10:38:50 +04:00
clocksource: sunxi: Rename sunxi to sun4i During the introduction of the Allwinner SoC platforms, sunxi was initially meant as a generic name for all the variants of the Allwinner SoC. It was ok at the time of the support of only the A10 and A13 that looks pretty much the same, but it's beginning to be troublesome with the future addition of the Allwinner A31 (sun6i) that is quite different, and would introduce some weird logic, where sunxi would actually mean in some case sun4i and sun5i but without sun6i... Moreover, it makes the compatible strings naming scheme not consistent with other architectures, where usually for this kind of compability, we just use the oldest SoC name that has this IP, so let's do just this. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-03-24 14:49:25 +04:00
config SUN4I_TIMER
clocksource: sun4i: Select CLKSRC_MMIO The Allwinner SoCs timer use the clocksource MMIO functions. We thus need to select them in Kconfig. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-10-14 23:07:46 +04:00
select CLKSRC_MMIO
clocksource: sunxi: Add Allwinner A1X Timer Driver Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> CC: Thomas Gleixner <tglx@linutronix.de> CC: John Stultz <johnstul@us.ibm.com>
2012-11-12 18:07:50 +04:00
bool
clocksource: Add Allwinner SoCs HS timers driver Most of the Allwinner SoCs (at this time, all but the A10) also have a High Speed timers that are not using the 24MHz oscillator as a source but rather the AHB clock running much faster. The IP is slightly different between the A10s/A13 and the one used in the A20/A31, since the latter have 4 timers available, while the former have only 2 of them. [dlezcano] : Fixed conflict with b788beda "Order Kconfig options alphabetically" Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-11-07 15:01:48 +04:00
config SUN5I_HSTIMER
select CLKSRC_MMIO
bool
clocksource: Build Tegra timer on 32-bit ARM only Instead of directly using the ARCH_TEGRA Kconfig symbol to enable this driver, add a new, non-user-visible Kconfig symbol (TEGRA_TIMER) which can be selected by the various SoCs. This is useful to disable building the driver on Tegra132 (64-bit ARM) where it doesn't currently compile but also isn't needed (yet). Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-07-07 17:26:30 +04:00
config TEGRA_TIMER
bool
timer: vt8500: Move timer code to drivers/clocksource This patch moves arch-vt8500/timer.c into drivers/clocksource and updates the necessary Kconfig/Makefile options. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
2013-01-14 08:58:21 +04:00
config VT8500_TIMER
bool
arm: zynq: Move timer to generic location Move zynq timer out of mach folder to generic location and enable it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-03-20 13:46:01 +04:00
config CADENCE_TTC_TIMER
bool
clockevents: asm9260: Fix compilation error with sparc/sparc64 allyesconfig The Kconfig options for the asm9260 timer is wrong as it can be selected by another platform with allyes config and thus leading to a compilation failure as some non arch related code is pulled by the compilation. Fix this by having the platform Kconfig to select the timer as it is done for the others drivers. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Oleksij Rempel <linux@rempel-privat.de> Conflicts: drivers/clocksource/Kconfig
2015-02-23 21:54:16 +03:00
config ASM9260_TIMER
bool
select CLKSRC_MMIO
select CLKSRC_OF
ARM: plat-nomadik: move MTU, kill plat-nomadik This moves the MTU timer driver from arch/arm/plat-nomadik to drivers/clocksource and moves the header file to the platform_data directory. As this moves the last file being compiled to an object out of arch/arm/plat-nomadik, we have to "turn off the light" and delete the plat-nomadik directory, because it is not allowed to have an empty Makefile in a plat-* directory. This is probably also a desired side effect of depopulating the arch/arm directory of drivers. Luckily we have just deleted all the <plat/*> include files prior to this so by moving the last one we may delete the directory. After this all the Ux500 and Nomadik device drivers live outside of the arch/arm hierarchy. Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-18 16:01:25 +04:00
config CLKSRC_NOMADIK_MTU
bool
depends on (ARCH_NOMADIK || ARCH_U8500)
select CLKSRC_MMIO
help
Support for Multi Timer Unit. MTU provides access
to multiple interrupt generating programmable
32-bit free running decrementing counters.
config CLKSRC_NOMADIK_MTU_SCHED_CLOCK
bool
depends on CLKSRC_NOMADIK_MTU
help
Use the Multi Timer Unit as the sched_clock.
clocksource: add DBX500 PRCMU Timer support This patch adds the DBX500 PRCMU Timer driver as a clocksource and as sched_clock. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com> Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-05-27 12:30:12 +04:00
config CLKSRC_DBX500_PRCMU
bool "Clocksource PRCMU Timer"
ARM: ux500: delete U5500 support This platform has been obsoleted and was only available inside of ST-Ericsson, no users of this code are left in the world. This deletes the core U5500 support entirely in the same manner as the obsoleted U8500 silicon was previously deleted. The cpu_is_u5500() macros that can read out the CPU ID is left until the next kernel cycle, this makes it possible to merge deletion of dependent drivers without breakage. This also has the upside of removing the mailbox driver which was our only driver that was outside the drivers/* hiearchy, now the machine directory only handles machines and nothing else. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Cc: Jonas Aberg <jonas.aberg@stericsson.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Ulf Hansson <ulf.hansson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-13 15:16:31 +04:00
depends on UX500_SOC_DB8500
clocksource: add DBX500 PRCMU Timer support This patch adds the DBX500 PRCMU Timer driver as a clocksource and as sched_clock. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com> Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-05-27 12:30:12 +04:00
default y
help
Use the always on PRCMU Timer as clocksource
config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
bool "Clocksource PRCMU Timer sched_clock"
ARM: plat-nomadik: move MTU, kill plat-nomadik This moves the MTU timer driver from arch/arm/plat-nomadik to drivers/clocksource and moves the header file to the platform_data directory. As this moves the last file being compiled to an object out of arch/arm/plat-nomadik, we have to "turn off the light" and delete the plat-nomadik directory, because it is not allowed to have an empty Makefile in a plat-* directory. This is probably also a desired side effect of depopulating the arch/arm directory of drivers. Luckily we have just deleted all the <plat/*> include files prior to this so by moving the last one we may delete the directory. After this all the Ux500 and Nomadik device drivers live outside of the arch/arm hierarchy. Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-18 16:01:25 +04:00
depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK)
clocksource: add DBX500 PRCMU Timer support This patch adds the DBX500 PRCMU Timer driver as a clocksource and as sched_clock. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com> Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-05-27 12:30:12 +04:00
default y
help
Use the always on PRCMU Timer as sched_clock
arm64: Generic timers support This patch adds support for the ARM generic timers with A64 instructions for accessing the timer registers. It uses the physical counter as the clock source and the virtual counter as sched_clock. The timer frequency can be specified via DT or read from the CNTFRQ_EL0 register. The physical counter is also accessible from user space allowing fast gettimeofday() implementation. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-03-05 15:49:30 +04:00
clocksource: Provide timekeeping for efm32 SoCs An efm32 features 4 16-bit timers with a 10-bit prescaler. This driver provides clocksource and clock event device using one timer instance each. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-10-03 23:56:29 +04:00
config CLKSRC_EFM32
bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32
depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST)
clocksource: time-efm32: Select CLKSRC_MMIO The time-efm32 driver uses the clocksource MMIO functions. Thus it needs to select CLKSRC_MMIO in Kconfig. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2013-11-20 06:15:11 +04:00
select CLKSRC_MMIO
clocksource: Provide timekeeping for efm32 SoCs An efm32 features 4 16-bit timers with a 10-bit prescaler. This driver provides clocksource and clock event device using one timer instance each. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-10-03 23:56:29 +04:00
default ARCH_EFM32
help
Support to use the timers of EFM32 SoCs as clock source and clock
event device.
clocksource/drivers/lpc32xx: Add the lpc32xx timer driver Add support for using the NXP LPC timer as clocksource and clock event. These timers are present on many NXP devices including LPC32xx, LPC17xx, LPC18xx and LPC43xx. The timer has a 32-bit timer counter register with a programmable 32-bit prescaler. It supports up to 4 compare match values with interrupt generation and reset/stop timer counter action. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Acked-by: Arnd Bergmann <arnd@arndb.de>
2015-05-12 01:00:48 +03:00
config CLKSRC_LPC32XX
bool
select CLKSRC_MMIO
select CLKSRC_OF
CLOCKSOURCE: Add Pistachio clocksource-only driver The Pistachio SoC provides four general purpose timers, and allow to implement a clocksource driver. This driver can be used as a replacement for the MIPS GIC and MIPS R4K clocksources and sched clocks, which are clocked from the CPU clock. Given the general purpose timers are clocked from an independent clock, this new clocksource driver will be useful to introduce CPUFreq support for Pistachio machines. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Signed-off-by: Govindraj Raja <govindraj.raja@imgtec.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: James Hartley <James.Hartley@imgtec.com> Cc: Damien Horsley <Damien.Horsley@imgtec.com> Cc: James Hogan <James.Hogan@imgtec.com> Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/10899/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-08-07 18:39:31 +03:00
config CLKSRC_PISTACHIO
clocksource/drivers/pistachio: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-30 19:28:13 +03:00
bool "Clocksource for Pistachio SoC" if COMPILE_TEST
CLOCKSOURCE: Add Pistachio clocksource-only driver The Pistachio SoC provides four general purpose timers, and allow to implement a clocksource driver. This driver can be used as a replacement for the MIPS GIC and MIPS R4K clocksources and sched clocks, which are clocked from the CPU clock. Given the general purpose timers are clocked from an independent clock, this new clocksource driver will be useful to introduce CPUFreq support for Pistachio machines. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Signed-off-by: Govindraj Raja <govindraj.raja@imgtec.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: James Hartley <James.Hartley@imgtec.com> Cc: Damien Horsley <Damien.Horsley@imgtec.com> Cc: James Hogan <James.Hogan@imgtec.com> Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/10899/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-08-07 18:39:31 +03:00
select CLKSRC_OF
clocksource/drivers/pistachio: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-30 19:28:13 +03:00
help
Enables the clocksource for the Pistachio SoC.
CLOCKSOURCE: Add Pistachio clocksource-only driver The Pistachio SoC provides four general purpose timers, and allow to implement a clocksource driver. This driver can be used as a replacement for the MIPS GIC and MIPS R4K clocksources and sched clocks, which are clocked from the CPU clock. Given the general purpose timers are clocked from an independent clock, this new clocksource driver will be useful to introduce CPUFreq support for Pistachio machines. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Signed-off-by: Govindraj Raja <govindraj.raja@imgtec.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: James Hartley <James.Hartley@imgtec.com> Cc: Damien Horsley <Damien.Horsley@imgtec.com> Cc: James Hogan <James.Hogan@imgtec.com> Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/10899/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-08-07 18:39:31 +03:00
clocksource: add TI 32.768 Hz counter driver Introduce a new clocksource driver for Texas Instruments 32.768 Hz device which is available on most OMAP-like devices. Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-09-29 21:55:33 +03:00
config CLKSRC_TI_32K
bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST
clocksource: ti-32k: make it depend on GENERIC_CLOCKSOURCE the new ti 32k clocksource driver should depend on GENERIC_CLOCKSOURCE because of its reliance on sched_clock_register(). Let's enable that to avoid any possible build errors and/or warnings on randbuilds. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-10-17 00:10:05 +03:00
depends on GENERIC_SCHED_CLOCK
clocksource: add TI 32.768 Hz counter driver Introduce a new clocksource driver for Texas Instruments 32.768 Hz device which is available on most OMAP-like devices. Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-09-29 21:55:33 +03:00
select CLKSRC_OF if OF
help
This option enables support for Texas Instruments 32.768 Hz clocksource
available on many OMAP-like platforms.
clockevents/drivers: Add STM32 Timer driver STM32 MCUs feature 16 and 32 bits general purpose timers with prescalers. The drivers detects whether the time is 16 or 32 bits, and applies a 1024 prescaler value if it is 16 bits. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-05-23 00:03:33 +03:00
config CLKSRC_STM32
clocksource: Increase dependencies of timer-stm32 to limit build wreckage This driver leaks out into arch/parisc builds that don't have CONFIG_GENERIC_CLOCKEVENTS, leading to the following (truncated) wreckage: CC drivers/clocksource/timer-stm32.o drivers/clocksource/timer-stm32.c:38:28: error: field 'evtdev' has incomplete type drivers/clocksource/timer-stm32.c:44:19: warning: 'enum clock_event_mode' declared inside parameter list drivers/clocksource/timer-stm32.c:44:19: warning: its scope is only this definition or declaration, which is probably not what you want drivers/clocksource/timer-stm32.c:43:62: error: parameter 1 ('mode') has incomplete type drivers/clocksource/timer-stm32.c:43:13: error: function declaration isn't a prototype drivers/clocksource/timer-stm32.c: In function 'stm32_clock_event_set_mode': drivers/clocksource/timer-stm32.c:47:3: error: type defaults to 'int' in declaration of '__mptr' drivers/clocksource/timer-stm32.c:47:3: warning: initialization from incompatible pointer type drivers/clocksource/timer-stm32.c:51:7: error: 'CLOCK_EVT_MODE_PERIODIC' undeclared (first use in this function) drivers/clocksource/timer-stm32.c:51:7: note: each undeclared identifier is reported only once for each function it appears in drivers/clocksource/timer-stm32.c:56:7: error: 'CLOCK_EVT_MODE_ONESHOT' undeclared (first use in this function) Tighten up the dependencies to limit where it gets built by copying the style of the Kconfig line for CLKSRC_EFM32 a few lines above. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Chanwoo Choi <cw00.choi@samsung.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/1434841352-24300-1-git-send-email-paul.gortmaker@windriver.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-06-21 02:02:32 +03:00
bool "Clocksource for STM32 SoCs" if !ARCH_STM32
depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
clockevents/drivers: Add STM32 Timer driver STM32 MCUs feature 16 and 32 bits general purpose timers with prescalers. The drivers detects whether the time is 16 or 32 bits, and applies a 1024 prescaler value if it is 16 bits. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-05-23 00:03:33 +03:00
select CLKSRC_MMIO
arm: arch_timer: move core to drivers/clocksource The core functionality of the arch_timer driver is not directly tied to anything under arch/arm, and can be split out. This patch factors out the core of the arch_timer driver, so it can be shared with other architectures. A couple of functions are added so that architecture-specific code can interact with the driver without needing to touch its internals. The ARM_ARCH_TIMER config variable is moved out to drivers/clocksource/Kconfig, existing uses in arch/arm are replaced with HAVE_ARM_ARCH_TIMER, which selects it. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
2012-11-12 18:33:44 +04:00
config ARM_ARCH_TIMER
bool
ARM: convert arm/arm64 arch timer to use CLKSRC_OF init This converts arm and arm64 to use CLKSRC_OF DT based initialization for the arch timer. A new function arch_timer_arch_init is added to allow for arch specific setup. This has a side effect of enabling sched_clock on omap5 and exynos5. There should not be any reason not to use the arch timers for sched_clock. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Simon Horman <horms@verge.net.au> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-samsung-soc@vger.kernel.org Cc: linux-omap@vger.kernel.org Cc: linux-sh@vger.kernel.org Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2013-04-11 03:27:51 +04:00
select CLKSRC_OF if OF
clocksource / arm_arch_timer: Convert to ACPI probing It is now absolutely trivial to convert the arch timer driver to use ACPI probing, just like its DT counterpart. Let's enjoy another crapectomy. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-09-28 17:49:17 +03:00
select CLKSRC_ACPI if ACPI
metag: Time keeping Add time keeping code for metag. Meta hardware threads have 2 timers. The background timer (TXTIMER) is used as a free-running time base, and the interrupt timer (TXTIMERI) is used for the timer interrupt. Both counters traditionally count at approximately 1MHz. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: John Stultz <johnstul@us.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de>
2012-10-09 13:54:39 +04:00
drivers: clocksource: add support for ARM architected timer event stream The ARM architected timer can generate events (used for waking up CPUs executing the wfe instruction) at a frequency represented as a power-of-2 divisor of the clock rate. An event stream might be used: - To implement wfe-based timeouts for userspace locking implementations. - To impose a timeout on a wfe for safeguarding against any programming error in case an expected event is not generated. This patch computes the event stream frequency aiming for a period of 100us between events. It uses ARM/ARM64 specific backends to configure and enable the event stream. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Will Deacon <will.deacon@arm.com> [sudeep: moving ARM/ARM64 changes into separate patches and adding Kconfig option] Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
2013-08-23 18:32:29 +04:00
config ARM_ARCH_TIMER_EVTSTREAM
bool "Support for ARM architected timer event stream generation"
default y if ARM_ARCH_TIMER
clocksource: arm_arch_timer: Hide eventstream Kconfig on non-ARM Pavel Machek reports that this config is exposed on x86 where the ARM architected timers aren't even present. Make it depend on the ARM architected timers being selected so that non-ARM builds aren't asked about it. Reported-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-11-21 00:02:03 +04:00
depends on ARM_ARCH_TIMER
drivers: clocksource: add support for ARM architected timer event stream The ARM architected timer can generate events (used for waking up CPUs executing the wfe instruction) at a frequency represented as a power-of-2 divisor of the clock rate. An event stream might be used: - To implement wfe-based timeouts for userspace locking implementations. - To impose a timeout on a wfe for safeguarding against any programming error in case an expected event is not generated. This patch computes the event stream frequency aiming for a period of 100us between events. It uses ARM/ARM64 specific backends to configure and enable the event stream. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Will Deacon <will.deacon@arm.com> [sudeep: moving ARM/ARM64 changes into separate patches and adding Kconfig option] Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
2013-08-23 18:32:29 +04:00
help
This option enables support for event stream generation based on
the ARM architected timer. It is used for waking up CPUs executing
the wfe instruction at a frequency represented as a power-of-2
divisor of the clock rate.
The main use of the event stream is wfe-based timeouts of userspace
locking implementations. It might also be useful for imposing timeout
on wfe to safeguard against any programming errors in case an expected
event is not generated.
This must be disabled for hardware validation purposes to detect any
hardware anomalies of missing events.
clocksource: arm_global_timer: Add ARM global timer support This is a simple driver for the global timer module found in the Cortex A9-MP cores from revision r1p0 onwards. This should be able to perform the functions of the system timer and the local timer in an SMP system. The global timer has the following features: The global timer is a 64-bit incrementing counter with an auto-incrementing feature. It continues incrementing after sending interrupts. The global timer is memory mapped in the private memory region. The global timer is accessible to all Cortex-A9 processors in the cluster. Each Cortex-A9 processor has a private 64-bit comparator that is used to assert a private interrupt when the global timer has reached the comparator value. All the Cortex-A9 processors in a design use the banked ID, ID27, for this interrupt. ID27 is sent to the Interrupt Controller as a Private Peripheral Interrupt. The global timer is clocked by PERIPHCLK. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Rob Herring <robherring2@gmail.com> CC: Linus Walleij <linus.walleij@linaro.org> CC: Will Deacon <will.deacon@arm.com> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-06-26 15:48:38 +04:00
config ARM_GLOBAL_TIMER
bool
select CLKSRC_OF if OF
help
This options enables support for the ARM global timer unit
ARM: 8366/1: move Dual-Timer SP804 driver to drivers/clocksource The ARM Dual-Timer SP804 module is peripheral found not only on ARM32 platforms but also on ARM64 platforms. This patch moves the driver out of arch/arm to driver/clocksource so that it can be used on ARM64 platforms also. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Olof Johansson <olof@lixom.net> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-05-18 18:29:40 +03:00
config ARM_TIMER_SP804
bool "Support for Dual Timer SP804 module"
ARM: Fix build if CLKDEV_LOOKUP is not configured mips:allmodconfig fails to build with drivers/clocksource/timer-sp804.c: In function '__sp804_clocksource_and_sched_clock_init': drivers/clocksource/timer-sp804.c:88:3: error: implicit declaration of function 'clk_get_sys' because CLKDEV_LOOKUP is not configured and the driver depends on it. Fixes: 0b7402dce445 ("ARM: 8366/1: move Dual-Timer SP804 driver to drivers/clocksource") Acked-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-06-24 06:49:05 +03:00
depends on GENERIC_SCHED_CLOCK && CLKDEV_LOOKUP
ARM: 8366/1: move Dual-Timer SP804 driver to drivers/clocksource The ARM Dual-Timer SP804 module is peripheral found not only on ARM32 platforms but also on ARM64 platforms. This patch moves the driver out of arch/arm to driver/clocksource so that it can be used on ARM64 platforms also. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Olof Johansson <olof@lixom.net> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-05-18 18:29:40 +03:00
select CLKSRC_MMIO
select CLKSRC_OF if OF
clocksource: arm_global_timer: Add ARM global timer support This is a simple driver for the global timer module found in the Cortex A9-MP cores from revision r1p0 onwards. This should be able to perform the functions of the system timer and the local timer in an SMP system. The global timer has the following features: The global timer is a 64-bit incrementing counter with an auto-incrementing feature. It continues incrementing after sending interrupts. The global timer is memory mapped in the private memory region. The global timer is accessible to all Cortex-A9 processors in the cluster. Each Cortex-A9 processor has a private 64-bit comparator that is used to assert a private interrupt when the global timer has reached the comparator value. All the Cortex-A9 processors in a design use the banked ID, ID27, for this interrupt. ID27 is sent to the Interrupt Controller as a Private Peripheral Interrupt. The global timer is clocked by PERIPHCLK. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Rob Herring <robherring2@gmail.com> CC: Linus Walleij <linus.walleij@linaro.org> CC: Will Deacon <will.deacon@arm.com> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-06-26 15:48:38 +04:00
config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
bool
depends on ARM_GLOBAL_TIMER
default y
help
Use ARM global timer clock source as sched_clock
clocksource/drivers/armv7m_systick: Add ARM System timer driver This patch adds clocksource support for ARMv7-M's System timer, also known as SysTick. Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-05-09 10:53:46 +03:00
config ARMV7M_SYSTICK
bool
select CLKSRC_OF if OF
select CLKSRC_MMIO
help
This options enables support for the ARMv7M system timer unit
ARM: at91: PIT: Move the driver to drivers/clocksource Now that we don't depend on anyting in the mach-at91 directory, we can just move the driver to where it belongs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Conflicts: arch/arm/mach-at91/Kconfig arch/arm/mach-at91/Makefile
2014-09-02 20:12:35 +04:00
config ATMEL_PIT
select CLKSRC_OF if OF
def_bool SOC_AT91SAM9 || SOC_SAMA5
ARM: at91: time: move the system timer driver to drivers/clocksource Import at91rm9200_time.c from mach-at91 as timer-atmel-st.c. Further cleanup is required to get rid of the mach-at91 headers. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-03-12 15:07:31 +03:00
config ATMEL_ST
bool
select CLKSRC_OF
clocksource: atmel-st: select MFD_SYSCON Enforce MFD_SYSCON selection as the driver needs it. Else, it will still compile with some warning about X1, x2 or sr being used uninitialized. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-03-19 16:17:48 +03:00
select MFD_SYSCON
ARM: at91: time: move the system timer driver to drivers/clocksource Import at91rm9200_time.c from mach-at91 as timer-atmel-st.c. Further cleanup is required to get rid of the mach-at91 headers. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-03-12 15:07:31 +03:00
metag: Time keeping Add time keeping code for metag. Meta hardware threads have 2 timers. The background timer (TXTIMER) is used as a free-running time base, and the interrupt timer (TXTIMERI) is used for the timer interrupt. Both counters traditionally count at approximately 1MHz. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: John Stultz <johnstul@us.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de>
2012-10-09 13:54:39 +04:00
config CLKSRC_METAG_GENERIC
def_bool y if METAG
help
This option enables support for the Meta per-thread timers.
ARM: EXYNOS: move mct driver to drivers/clocksource Move the multi core timer (mct) driver to from mach-exynos to drivers/clocksource and update the Kconfig and makefiles. Cc: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-03-09 11:16:13 +04:00
config CLKSRC_EXYNOS_MCT
def_bool y if ARCH_EXYNOS
clocksource: exynos_mct: Only use 32-bits where possible The MCT has a nice 64-bit counter. That means that we _can_ register as a 64-bit clocksource and sched_clock. ...but that doesn't mean we should. The 64-bit counter is read by reading two 32-bit registers. That means reading needs to be something like: - Read upper half - Read lower half - Read upper half and confirm that it hasn't changed. That wouldn't be terrible, but: - THe MCT isn't very fast to access (hundreds of nanoseconds). - The clocksource is queried _all the time_. In total system profiles of real workloads on ChromeOS, we've seen exynos_frc_read() taking 2% or more of CPU time even after optimizing the 3 reads above to 2 (see below). The MCT is clocked at ~24MHz on all known systems. That means that the 32-bit half of the counter rolls over every ~178 seconds. This inspired an optimization in ChromeOS to cache the upper half between calls, moving 3 reads to 2. ...but we can do better! Having a 32-bit timer that flips every 178 seconds is more than sufficient for Linux. Let's just use the lower half of the MCT. Times on 5420 to do 1000000 gettimeofday() calls from userspace: * Original code: 1323852 us * ChromeOS cache upper half: 1173084 us * ChromeOS + ldmia to optimize: 1045674 us * Use lower 32-bit only (this code): 1014429 us As you can see, the time used doesn't increase linearly with the number of reads and we can make 64-bit work almost as fast as 32-bit with a bit of assembly code. But since there's no real gain for 64-bit, let's go with the simplest and fastest implementation. Note: with this change roughly half the time for gettimeofday() is spent in exynos_frc_read(). The rest is timer / system call overhead. Also note: this patch disables the use of the MCT on ARM64 systems until we've sorted out how to make "cycles_t" always 32-bit. Really ARM64 systems should be using arch timers anyway. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-05 01:43:26 +04:00
depends on !ARM64
ARM: EXYNOS: move mct driver to drivers/clocksource Move the multi core timer (mct) driver to from mach-exynos to drivers/clocksource and update the Kconfig and makefiles. Cc: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-03-09 11:16:13 +04:00
help
Support for Multi Core Timer controller on Exynos SoCs.
Merge branch 'exynos/pwm-clocksource' into late/multiplatform This series from Tomasz Figa restores support for the pwm clocksource in Exynos, which was broken during the conversion of the platform to the common clk framework. The clocksource is only used in one board in the mainline kernel (universal_c210), and this makes it work for DT based probing as well as restoring the non-DT based case. * exynos/pwm-clocksource: ARM: dts: exynops4210: really add universal_c210 dts ARM: dts: exynos4210: Add basic dts file for universal_c210 board ARM: dts: exynos4: Add node for PWM device ARM: SAMSUNG: Do not register legacy timer interrupts on Exynos clocksource: samsung_pwm_timer: Work around rounding errors in clockevents core clocksource: samsung_pwm_timer: Correct programming of clock events clocksource: samsung_pwm_timer: Use proper clockevents max_delta clocksource: samsung_pwm_timer: Add support for non-DT platforms clocksource: samsung_pwm_timer: Drop unused samsung_pwm struct clocksource: samsung_pwm_timer: Keep all driver data in a structure clocksource: samsung_pwm_timer: Make PWM spinlock global clocksource: samsung_pwm_timer: Let platforms select the driver Documentation: Add device tree bindings for Samsung PWM timers clocksource: add samsung pwm timer driver Conflicts: arch/arm/boot/dts/Makefile arch/arm/mach-exynos/common.c drivers/clocksource/Kconfig drivers/clocksource/Makefile Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-05-07 01:49:09 +04:00
clocksource: add samsung pwm timer driver This adds a new clocksource driver for the PWM timer that is present in most Samsung SoCs, based on the existing driver in arch/arm/plat-samsung/samsung-time.c and many changes implemented by Tomasz Figa. Originally, the conversion of all Samsung machines to the new driver was planned for 3.10, but that work ended up being too late and too invasive just before the merge window. Unfortunately, other changes in the Exynos platform resulted in some Exynos4 setups, particularly the Universal C210 board to be broken. In order to fix that with minimum risk, so we now leave the existing pwm clocksource driver in place for all older platforms and use the new driver only for device tree enabled boards. This way, we can get the broken machines running again using DT descriptions. All clocksource changes were implemented by Tomasz, while the DT registration was rewritten by Arnd. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Tomasz Figa <t.figa@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de>
2013-04-21 01:22:13 +04:00
config CLKSRC_SAMSUNG_PWM
clocksource: samsung_pwm_timer: Let platforms select the driver This patch modifies the way of enabling the driver to let the platforms select it in their Kconfig instead of specifying particular platforms in Kconfig entry of the driver. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-23 19:46:23 +04:00
bool
clocksource: add samsung pwm timer driver This adds a new clocksource driver for the PWM timer that is present in most Samsung SoCs, based on the existing driver in arch/arm/plat-samsung/samsung-time.c and many changes implemented by Tomasz Figa. Originally, the conversion of all Samsung machines to the new driver was planned for 3.10, but that work ended up being too late and too invasive just before the merge window. Unfortunately, other changes in the Exynos platform resulted in some Exynos4 setups, particularly the Universal C210 board to be broken. In order to fix that with minimum risk, so we now leave the existing pwm clocksource driver in place for all older platforms and use the new driver only for device tree enabled boards. This way, we can get the broken machines running again using DT descriptions. All clocksource changes were implemented by Tomasz, while the DT registration was rewritten by Arnd. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Tomasz Figa <t.figa@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de>
2013-04-21 01:22:13 +04:00
help
This is a new clocksource driver for the PWM timer found in
Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver
for all devicetree enabled platforms. This driver will be
needed only on systems that do not have the Exynos MCT available.
clocksource: Add Freescale Vybrid pit timer support Add Freescale Vybrid Family period interrupt timer support. Signed-off-by: Jingchang Lu <b35083@freescale.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-05-29 12:12:17 +04:00
clocksource: Add Freescale FlexTimer Module (FTM) timer support The Freescale FlexTimer Module time reference is a 16-bit counter that can be used as an unsigned or signed increase counter. CNTIN defines the starting value of the count and MOD defines the final value of the count. The value of CNTIN is loaded into the FTM counter, and the counter increments until the value of MOD is reached, at which point the counter is reloaded with the value of CNTIN. That's also when an overflow interrupt will be generated. Here using the 'evt' prefix or postfix as clock event device and the 'src' as clock source device. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Jingchang Lu <b35083@freescale.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-05-23 12:12:04 +04:00
config FSL_FTM_TIMER
bool
help
Support for Freescale FlexTimer Module (FTM) timer.
clocksource: Add Freescale Vybrid pit timer support Add Freescale Vybrid Family period interrupt timer support. Signed-off-by: Jingchang Lu <b35083@freescale.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-05-29 12:12:17 +04:00
config VF_PIT_TIMER
bool
help
Support for Period Interrupt Timer on Freescale Vybrid Family SoCs.
clocksource: Add Kconfig entries for CMT, MTU2, TMU and STI Add Kconfig entries for CMT, MTU2, TMU and STI to drivers/clocksource/Kconfig. This will allow us to get rid of duplicated entires in architecture code such as arch/sh and arch/arm/mach-shmobile. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-02-20 15:54:45 +04:00
config SYS_SUPPORTS_SH_CMT
bool
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 13:36:43 +04:00
config MTK_TIMER
clocksource/drivers/mediatek: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-30 19:53:27 +03:00
bool "Mediatek timer driver" if COMPILE_TEST
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 13:36:43 +04:00
select CLKSRC_OF
select CLKSRC_MMIO
clocksource/drivers/mediatek: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-30 19:53:27 +03:00
help
Support for Mediatek timer driver.
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 13:36:43 +04:00
clocksource: Add Kconfig entries for CMT, MTU2, TMU and STI Add Kconfig entries for CMT, MTU2, TMU and STI to drivers/clocksource/Kconfig. This will allow us to get rid of duplicated entires in architecture code such as arch/sh and arch/arm/mach-shmobile. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-02-20 15:54:45 +04:00
config SYS_SUPPORTS_SH_MTU2
bool
config SYS_SUPPORTS_SH_TMU
bool
config SYS_SUPPORTS_EM_STI
bool
config SH_TIMER_CMT
bool "Renesas CMT timer driver" if COMPILE_TEST
clocksource: CMT, MTU2, TMU and STI should depend on GENERIC_CLOCKEVENTS If GENERIC_CLOCKEVENTS=n: drivers/clocksource/sh_cmt.c:54:28: error: field 'ced' has incomplete type drivers/clocksource/sh_cmt.c: In function 'sh_cmt_interrupt': drivers/clocksource/sh_cmt.c:407:23: error: 'CLOCK_EVT_MODE_ONESHOT' undeclared (first use in this function) drivers/clocksource/sh_mtu2.c:44:28: error: field 'ced' has incomplete type drivers/clocksource/sh_mtu2.c: In function 'ced_to_sh_mtu2': drivers/clocksource/sh_mtu2.c:184:70: warning: initialization from incompatible pointer type [enabled by default] drivers/clocksource/sh_mtu2.c: At top level: drivers/clocksource/sh_mtu2.c:188:16: warning: 'enum clock_event_mode' declared inside parameter list [enabled by default] drivers/clocksource/sh_tmu.c:45:28: error: field 'ced' has incomplete type drivers/clocksource/sh_tmu.c: In function 'sh_tmu_interrupt': drivers/clocksource/sh_tmu.c:207:21: error: 'CLOCK_EVT_MODE_ONESHOT' undeclared (first use in this function) drivers/clocksource/em_sti.c:44:28: error: field 'ced' has incomplete type drivers/clocksource/em_sti.c: In function 'ced_to_em_sti': drivers/clocksource/em_sti.c:251:69: warning: initialization from incompatible pointer type [enabled by default] drivers/clocksource/em_sti.c: At top level: drivers/clocksource/em_sti.c:255:16: warning: 'enum clock_event_mode' declared inside parameter list [enabled by default] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Magnus Damm <damm@opensource.se> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/1395324352-9146-1-git-send-email-geert@linux-m68k.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-20 18:05:50 +04:00
depends on GENERIC_CLOCKEVENTS
clocksource/drivers: Fix various !CONFIG_HAS_IOMEM build errors Fix !CONFIG_HAS_IOMEM related build failures in three clocksource drivers. The build failures have the pattern of: drivers/clocksource/sh_cmt.c: In function ‘sh_cmt_map_memory’: drivers/clocksource/sh_cmt.c:920:2: error: implicit declaration of function ‘ioremap_nocache’ [-Werror=implicit-function-declaration] cmt->mapbase = ioremap_nocache(mem->start, resource_size(mem)); Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: maxime.ripard@free-electrons.com Link: http://lkml.kernel.org/r/1427362029-6511-1-git-send-email-daniel.lezcano@linaro.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-03-26 12:27:06 +03:00
depends on HAS_IOMEM
clocksource: Add Kconfig entries for CMT, MTU2, TMU and STI Add Kconfig entries for CMT, MTU2, TMU and STI to drivers/clocksource/Kconfig. This will allow us to get rid of duplicated entires in architecture code such as arch/sh and arch/arm/mach-shmobile. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-02-20 15:54:45 +04:00
default SYS_SUPPORTS_SH_CMT
help
This enables build of a clocksource and clockevent driver for
the Compare Match Timer (CMT) hardware available in 16/32/48-bit
variants on a wide range of Mobile and Automotive SoCs from Renesas.
config SH_TIMER_MTU2
bool "Renesas MTU2 timer driver" if COMPILE_TEST
clocksource: CMT, MTU2, TMU and STI should depend on GENERIC_CLOCKEVENTS If GENERIC_CLOCKEVENTS=n: drivers/clocksource/sh_cmt.c:54:28: error: field 'ced' has incomplete type drivers/clocksource/sh_cmt.c: In function 'sh_cmt_interrupt': drivers/clocksource/sh_cmt.c:407:23: error: 'CLOCK_EVT_MODE_ONESHOT' undeclared (first use in this function) drivers/clocksource/sh_mtu2.c:44:28: error: field 'ced' has incomplete type drivers/clocksource/sh_mtu2.c: In function 'ced_to_sh_mtu2': drivers/clocksource/sh_mtu2.c:184:70: warning: initialization from incompatible pointer type [enabled by default] drivers/clocksource/sh_mtu2.c: At top level: drivers/clocksource/sh_mtu2.c:188:16: warning: 'enum clock_event_mode' declared inside parameter list [enabled by default] drivers/clocksource/sh_tmu.c:45:28: error: field 'ced' has incomplete type drivers/clocksource/sh_tmu.c: In function 'sh_tmu_interrupt': drivers/clocksource/sh_tmu.c:207:21: error: 'CLOCK_EVT_MODE_ONESHOT' undeclared (first use in this function) drivers/clocksource/em_sti.c:44:28: error: field 'ced' has incomplete type drivers/clocksource/em_sti.c: In function 'ced_to_em_sti': drivers/clocksource/em_sti.c:251:69: warning: initialization from incompatible pointer type [enabled by default] drivers/clocksource/em_sti.c: At top level: drivers/clocksource/em_sti.c:255:16: warning: 'enum clock_event_mode' declared inside parameter list [enabled by default] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Magnus Damm <damm@opensource.se> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/1395324352-9146-1-git-send-email-geert@linux-m68k.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-20 18:05:50 +04:00
depends on GENERIC_CLOCKEVENTS
clocksource/drivers: Fix various !CONFIG_HAS_IOMEM build errors Fix !CONFIG_HAS_IOMEM related build failures in three clocksource drivers. The build failures have the pattern of: drivers/clocksource/sh_cmt.c: In function ‘sh_cmt_map_memory’: drivers/clocksource/sh_cmt.c:920:2: error: implicit declaration of function ‘ioremap_nocache’ [-Werror=implicit-function-declaration] cmt->mapbase = ioremap_nocache(mem->start, resource_size(mem)); Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: maxime.ripard@free-electrons.com Link: http://lkml.kernel.org/r/1427362029-6511-1-git-send-email-daniel.lezcano@linaro.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-03-26 12:27:06 +03:00
depends on HAS_IOMEM
clocksource: Add Kconfig entries for CMT, MTU2, TMU and STI Add Kconfig entries for CMT, MTU2, TMU and STI to drivers/clocksource/Kconfig. This will allow us to get rid of duplicated entires in architecture code such as arch/sh and arch/arm/mach-shmobile. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-02-20 15:54:45 +04:00
default SYS_SUPPORTS_SH_MTU2
help
This enables build of a clockevent driver for the Multi-Function
clocksource: sh_mtu2: Tidy up Kconfig typo for MTU2 It should be "MTU2" instead of "TMU2" Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Wolfram Sang <wsa@sang-engineering.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 13:36:36 +04:00
Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas.
clocksource: Add Kconfig entries for CMT, MTU2, TMU and STI Add Kconfig entries for CMT, MTU2, TMU and STI to drivers/clocksource/Kconfig. This will allow us to get rid of duplicated entires in architecture code such as arch/sh and arch/arm/mach-shmobile. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-02-20 15:54:45 +04:00
This hardware comes with 16 bit-timer registers.
config SH_TIMER_TMU
bool "Renesas TMU timer driver" if COMPILE_TEST
clocksource: CMT, MTU2, TMU and STI should depend on GENERIC_CLOCKEVENTS If GENERIC_CLOCKEVENTS=n: drivers/clocksource/sh_cmt.c:54:28: error: field 'ced' has incomplete type drivers/clocksource/sh_cmt.c: In function 'sh_cmt_interrupt': drivers/clocksource/sh_cmt.c:407:23: error: 'CLOCK_EVT_MODE_ONESHOT' undeclared (first use in this function) drivers/clocksource/sh_mtu2.c:44:28: error: field 'ced' has incomplete type drivers/clocksource/sh_mtu2.c: In function 'ced_to_sh_mtu2': drivers/clocksource/sh_mtu2.c:184:70: warning: initialization from incompatible pointer type [enabled by default] drivers/clocksource/sh_mtu2.c: At top level: drivers/clocksource/sh_mtu2.c:188:16: warning: 'enum clock_event_mode' declared inside parameter list [enabled by default] drivers/clocksource/sh_tmu.c:45:28: error: field 'ced' has incomplete type drivers/clocksource/sh_tmu.c: In function 'sh_tmu_interrupt': drivers/clocksource/sh_tmu.c:207:21: error: 'CLOCK_EVT_MODE_ONESHOT' undeclared (first use in this function) drivers/clocksource/em_sti.c:44:28: error: field 'ced' has incomplete type drivers/clocksource/em_sti.c: In function 'ced_to_em_sti': drivers/clocksource/em_sti.c:251:69: warning: initialization from incompatible pointer type [enabled by default] drivers/clocksource/em_sti.c: At top level: drivers/clocksource/em_sti.c:255:16: warning: 'enum clock_event_mode' declared inside parameter list [enabled by default] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Magnus Damm <damm@opensource.se> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/1395324352-9146-1-git-send-email-geert@linux-m68k.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-20 18:05:50 +04:00
depends on GENERIC_CLOCKEVENTS
clocksource/drivers: Fix various !CONFIG_HAS_IOMEM build errors Fix !CONFIG_HAS_IOMEM related build failures in three clocksource drivers. The build failures have the pattern of: drivers/clocksource/sh_cmt.c: In function ‘sh_cmt_map_memory’: drivers/clocksource/sh_cmt.c:920:2: error: implicit declaration of function ‘ioremap_nocache’ [-Werror=implicit-function-declaration] cmt->mapbase = ioremap_nocache(mem->start, resource_size(mem)); Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: maxime.ripard@free-electrons.com Link: http://lkml.kernel.org/r/1427362029-6511-1-git-send-email-daniel.lezcano@linaro.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-03-26 12:27:06 +03:00
depends on HAS_IOMEM
clocksource: Add Kconfig entries for CMT, MTU2, TMU and STI Add Kconfig entries for CMT, MTU2, TMU and STI to drivers/clocksource/Kconfig. This will allow us to get rid of duplicated entires in architecture code such as arch/sh and arch/arm/mach-shmobile. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-02-20 15:54:45 +04:00
default SYS_SUPPORTS_SH_TMU
help
This enables build of a clocksource and clockevent driver for
the 32-bit Timer Unit (TMU) hardware available on a wide range
SoCs from Renesas.
config EM_TIMER_STI
bool "Renesas STI timer driver" if COMPILE_TEST
clocksource: Kconfig: Let EM_TIMER_STI depend on HAS_IOMEM In 'em_sti.c', it will call devm_ioremap_resource() which need HAS_IOMEM. So need let EM_TIMER_STI depend on HAS_IOMEM, too. The related error (with allmodconfig under score): LD init/built-in.o em_sti.c:(.text.em_sti_probe+0x84): undefined reference to `devm_ioremap_resource' make: *** [vmlinux] Error 1 Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-08 16:39:40 +04:00
depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
clocksource: Add Kconfig entries for CMT, MTU2, TMU and STI Add Kconfig entries for CMT, MTU2, TMU and STI to drivers/clocksource/Kconfig. This will allow us to get rid of duplicated entires in architecture code such as arch/sh and arch/arm/mach-shmobile. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-02-20 15:54:45 +04:00
default SYS_SUPPORTS_EM_STI
help
This enables build of a clocksource and clockevent driver for
the 48-bit System Timer (STI) hardware available on a SoCs
such as EMEV2 from former NEC Electronics.
ARM: SoC: cleanups for 3.15 These cleanup patches are mainly move stuff around and should all be harmless. They are mainly split out so that other branches can be based on top to avoid conflicts. Notable changes are: * We finally remove all mach/timex.h, after CLOCK_TICK_RATE is no longer used. (Uwe Kleine-König) * The Qualcomm MSM platform is split out into legacy mach-msm and new-style mach-qcom, to allow easier maintainance of the new hardware support without regressions. (Kumar Gala) * A rework of some of the Kconfig logic to simplify multiplatform support (Rob Herring) * Samsung Exynos gets closer to supporting multiplatform (Sachin Kamat and others) * mach-bcm3528 gets merged into mach-bcm (Stephen Warren) * at91 gains some common clock framework support (Alexandre Belloni, Jean-Jacques Hiblot and other French people). -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAUz/yOWCrR//JCVInAQLOPBAAwTMkMrD8S8ggz6vfiQHZNdRPAC7NUJ46 +eYKmBVi5d6EdnjNuRElWENsh0ZosSAUFHrXsIC2NdH9sAJ9HOqWNNLymuA59Jo9 HZ/Ze6xQXDPNV7TROPoXuIli/2OCOXyyQHJsfI7h9V3PCx31qo0B5OdCxU0mtXK6 r1giREhnJFwfQMF/FTdnzhalFJoSjWwv/nkpNmQDJKRLKj9GzwQqItqw68gV6RzU Gnt6YK+9xC1B0cfWTFhAm6kbr9i7mvHoMG5tE3no2uuJMn4K7TgeMqOyvPWhmUeB EZi656szT1m5VfRWOqG+7coZO2VM4GO4NI0Xfin3GHllugOYls1il/FAfCPMLiwh RvuOmQGCkLIpdkuHop5QaI/h1EzlHA59nzTjmGf1+wWPsm0CIg08XOD9izQbRnN9 EmRqn1/8POIi17xcWyeMp8LB0APsTI+IflZFaYprEY9VlLLA/Pd+7udULhs8Bq8y 1l6fB6aPZKnDKCBy/PEIR+y+EHFEbwfrx6zm/pxVDX6P5DlQMFWL78pdBoJUa2h8 3pm/bSzNU5OSz1nJMLJv2jBTtnM5BvFgQBUi2qJ9Lr+nUhJXKCJ80kE/nOlXoCIU J952p3OhkYTQQcjuUVQeTXvRUOGB7mKok0pDFZNE6c7faqxTCudMABQq/KbMFstU eE3cH5FyYj4= =GcBb -----END PGP SIGNATURE----- Merge tag 'cleanup-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Arnd Bergmann: "These cleanup patches are mainly move stuff around and should all be harmless. They are mainly split out so that other branches can be based on top to avoid conflicts. Notable changes are: - We finally remove all mach/timex.h, after CLOCK_TICK_RATE is no longer used (Uwe Kleine-König) - The Qualcomm MSM platform is split out into legacy mach-msm and new-style mach-qcom, to allow easier maintainance of the new hardware support without regressions (Kumar Gala) - A rework of some of the Kconfig logic to simplify multiplatform support (Rob Herring) - Samsung Exynos gets closer to supporting multiplatform (Sachin Kamat and others) - mach-bcm3528 gets merged into mach-bcm (Stephen Warren) - at91 gains some common clock framework support (Alexandre Belloni, Jean-Jacques Hiblot and other French people)" * tag 'cleanup-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (89 commits) ARM: hisi: select HAVE_ARM_SCU only for SMP ARM: efm32: allow uncompress debug output ARM: prima2: build reset code standalone ARM: at91: add PWM clock ARM: at91: move sam9261 SoC to common clk ARM: at91: prepare common clk transition for sam9261 SoC ARM: at91: updated the at91_dt_defconfig with support for the ADS7846 ARM: at91: dt: sam9261: Device Tree support for the at91sam9261ek ARM: at91: dt: defconfig: Added the sam9261 to the list of DT-enabled SOCs ARM: at91: dt: Add at91sam9261 dt SoC support ARM: at91: switch sam9rl to common clock framework ARM: at91/dt: define main clk frequency of at91sam9rlek ARM: at91/dt: define at91sam9rl clocks ARM: at91: prepare common clk transition for sam9rl SoCs ARM: at91: prepare sam9 dt boards transition to common clk ARM: at91: dt: sam9rl: Device Tree for the at91sam9rlek ARM: at91/defconfig: Add the sam9rl to the list of DT-enabled SOCs ARM: at91: Add at91sam9rl DT SoC support ARM: at91: prepare at91sam9rl DT transition ARM: at91/defconfig: refresh at91sam9260_9g20_defconfig ...
2014-04-06 00:51:19 +04:00
clocksource: qcom: Move clocksource code out of mach-msm We intend to share the clocksource code for MSM platforms between legacy and multiplatform supported qcom SoCs. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-01-30 02:17:30 +04:00
config CLKSRC_QCOM
clocksource/drivers/qcom: Make COMPILE_TEST enabled for ARM architecture In order to be consistent with the rest of the drivers compilation, let's introduce the COMPILE_TEST option. Unfortunately, the delay.h code is not portable, so the compilation test coverage will be restricted to the ARM architecture. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-09 12:10:43 +03:00
bool "Qualcomm MSM timer" if COMPILE_TEST
depends on ARM
select CLKSRC_OF
help
This enables the clocksource and the per CPU clockevent driver for the
Qualcomm SoCs.
clocksource: Sched clock source for Versatile Express This patch adds a trival sched clock source using free running, 24MHz clocked counter present in the ARM Ltd. reference platforms (Versatile, RealView, Versatile Express) System Registers block. This code replaces the call in the VE machine code. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-16 21:22:59 +04:00
config CLKSRC_VERSATILE
bool "ARM Versatile (Express) reference platforms clock source"
CLOCKSOURCE: versatile: Add PLAT_VERSATILE dependency GENERIC_SCHED_CLOCK can be selected by architectures other than ARM. The current dependencies of CLKSRC_VERSATILE make it possible that other architectures will have CLKSRC_VERSATILE available in configuration once they select GENERIC_SCHED_CLOCK, whereas this clock source should be solely available to ARM in reality. This patch adds one more dependency to CLKSRC_VERSATILE to fix the issue. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Reported-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: LKML <linux-kernel@vger.kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9476/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-03-07 21:30:22 +03:00
depends on PLAT_VERSATILE && GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET
clocksource: Sched clock source for Versatile Express This patch adds a trival sched clock source using free running, 24MHz clocked counter present in the ARM Ltd. reference platforms (Versatile, RealView, Versatile Express) System Registers block. This code replaces the call in the VE machine code. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-16 21:22:59 +04:00
select CLKSRC_OF
default y if MFD_VEXPRESS_SYSREG
help
This option enables clock source based on free running
counter available in the "System Registers" block of
ARM Versatile, RealView and Versatile Express reference
platforms.
clocksource: Add a Kconfig menu Move the clocksource Kconfig entries into their own menu, so that they don't pollute the main device driver menu. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/20140616114845.343e9960@endymion.delvare Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-06-16 13:48:45 +04:00
MIPS: Move GIC clocksource driver to drivers/clocksource/ Move the GIC clocksource driver to drivers/clocksource/mips-gic-timer.c. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8133/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-10-20 23:03:58 +04:00
config CLKSRC_MIPS_GIC
bool
depends on MIPS_GIC
clocksource: mips-gic: Add device-tree support Parse the GIC timer frequency and interrupt from the device-tree. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: John Crispin <blogic@openwrt.org> Cc: David Daney <ddaney.cavm@gmail.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8421/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-12 22:43:39 +03:00
select CLKSRC_OF
MIPS: Move GIC clocksource driver to drivers/clocksource/ Move the GIC clocksource driver to drivers/clocksource/mips-gic-timer.c. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8133/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-10-20 23:03:58 +04:00
clocksource/drivers/tango_xtal: Add new timer for Tango SoCs Sigma Designs Tango platforms provide a 27 MHz crystal oscillator. Use it for clocksource, sched_clock, and delay_timer. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-09 17:59:18 +03:00
config CLKSRC_TANGO_XTAL
clocksource/drivers/tango: Add COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-29 22:54:19 +03:00
bool "Clocksource for Tango SoC" if COMPILE_TEST
depends on ARM
clocksource/drivers/tango_xtal: Add new timer for Tango SoCs Sigma Designs Tango platforms provide a 27 MHz crystal oscillator. Use it for clocksource, sched_clock, and delay_timer. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-09 17:59:18 +03:00
select CLKSRC_OF
clocksource/drivers/tango: Add COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-29 22:54:19 +03:00
help
This enables the clocksource for Tango SoC
clocksource/drivers/tango_xtal: Add new timer for Tango SoCs Sigma Designs Tango platforms provide a 27 MHz crystal oscillator. Use it for clocksource, sched_clock, and delay_timer. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-09 17:59:18 +03:00
ARM: 8251/1: clocksource: enable pxa_timer for SA-1100 platform SA-11x0 platform used the same IP block as was used on PXA. Consequently it makes sense to have only one driver. Enable pxa_timer clocksource for StrongARM platform. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-12-21 18:07:09 +03:00
config CLKSRC_PXA
clocksource/drivers/pxa_timer: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-09 18:47:32 +03:00
bool "Clocksource for PXA or SA-11x0 platform" if COMPILE_TEST
depends on GENERIC_CLOCKEVENTS
select CLKSRC_MMIO
ARM: 8251/1: clocksource: enable pxa_timer for SA-1100 platform SA-11x0 platform used the same IP block as was used on PXA. Consequently it makes sense to have only one driver. Enable pxa_timer clocksource for StrongARM platform. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-12-21 18:07:09 +03:00
help
This enables OST0 support available on PXA and SA-11x0
platforms.
h8300: clocksource h8300_timer8: 8bit clockevent device h8300_timer16 / h8300_tpu: 16bit clocksource Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
2015-01-27 20:52:42 +03:00
config H8300_TMR16
bool
config H8300_TPU
bool
ARM: imx: move timer driver into drivers/clocksource After the cleanup on imx timer driver, now it's ready to be moved into drivers/clocksource/. Let's do it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-05-15 10:41:00 +03:00
config CLKSRC_IMX_GPT
bool "Clocksource using i.MX GPT" if COMPILE_TEST
depends on ARM && CLKDEV_LOOKUP
select CLKSRC_MMIO
clocksource: sti: Provide support for the ST LPC Clocksource IP This IP is shared with Watchdog and RTC functionality. All 3 of these devices are mutually exclusive from one another i.e. Only 1 IP can be used at any given time. We use the device-driver model combined with a DT 'mode' property to enforce this. The ST LPC Clocksource IP can be used as the system (tick) timer. Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-05-26 15:39:43 +03:00
config CLKSRC_ST_LPC
clocksource/drivers/st_lpc: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-09 16:36:28 +03:00
bool "Low power clocksource found in the LPC" if COMPILE_TEST
clocksource: sti: Provide support for the ST LPC Clocksource IP This IP is shared with Watchdog and RTC functionality. All 3 of these devices are mutually exclusive from one another i.e. Only 1 IP can be used at any given time. We use the device-driver model combined with a DT 'mode' property to enforce this. The ST LPC Clocksource IP can be used as the system (tick) timer. Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-05-26 15:39:43 +03:00
select CLKSRC_OF if OF
help
Enable this option to use the Low Power controller timer
as clocksource.
clocksource: Add a Kconfig menu Move the clocksource Kconfig entries into their own menu, so that they don't pollute the main device driver menu. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/20140616114845.343e9960@endymion.delvare Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-06-16 13:48:45 +04:00
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