2015-09-22 21:12:11 +03:00
/ *
* Copyright ( C ) 2 0 1 5 I m a g i n a t i o n T e c h n o l o g i e s
2017-10-26 03:04:33 +03:00
* Author : Paul B u r t o n < p a u l . b u r t o n @mips.com>
2015-09-22 21:12:11 +03:00
*
* This p r o g r a m i s f r e e s o f t w a r e ; you can redistribute it and/or modify it
* under t h e t e r m s o f t h e G N U G e n e r a l P u b l i c L i c e n s e a s p u b l i s h e d b y t h e
* Free S o f t w a r e F o u n d a t i o n ; either version 2 of the License, or (at your
* option) a n y l a t e r v e r s i o n .
* /
# include < a s m / a d d r s p a c e . h >
# include < a s m / a s m . h >
# include < a s m / a s m - o f f s e t s . h >
# include < a s m / m i p s r e g s . h >
# include < a s m / r e g d e f . h >
# include < l i n u x / s e r i a l _ r e g . h >
# define U A R T _ T X _ O F S ( U A R T _ T X < < C O N F I G _ M I P S _ C P S _ N S 1 6 5 5 0 _ S H I F T )
# define U A R T _ L S R _ O F S ( U A R T _ L S R < < C O N F I G _ M I P S _ C P S _ N S 1 6 5 5 0 _ S H I F T )
/ * *
* _ mips_ c p s _ p u t c ( ) - w r i t e a c h a r a c t e r t o t h e U A R T
* @a0: ASCII character to write
* @t9: UART base address
* /
LEAF( _ m i p s _ c p s _ p u t c )
1 : lw t 0 , U A R T _ L S R _ O F S ( t 9 )
andi t 0 , t 0 , U A R T _ L S R _ T E M T
beqz t 0 , 1 b
sb a0 , U A R T _ T X _ O F S ( t 9 )
jr r a
END( _ m i p s _ c p s _ p u t c )
/ * *
* _ mips_ c p s _ p u t s ( ) - w r i t e a s t r i n g t o t h e U A R T
* @a0: pointer to NULL-terminated ASCII string
* @t9: UART base address
*
* Write a n u l l - t e r m i n a t e d A S C I I s t r i n g t o t h e U A R T .
* /
NESTED( _ m i p s _ c p s _ p u t s , 0 , r a )
move s7 , r a
move s6 , a0
1 : lb a0 , 0 ( s6 )
beqz a0 , 2 f
jal _ m i p s _ c p s _ p u t c
PTR_ A D D I U s6 , s6 , 1
b 1 b
2 : jr s7
END( _ m i p s _ c p s _ p u t s )
/ * *
* _ mips_ c p s _ p u t x4 - w r i t e a 4 b h e x v a l u e t o t h e U A R T
* @a0: the 4b value to write to the UART
* @t9: UART base address
*
* Write a s i n g l e h e x a d e c i m a l c h a r a c t e r t o t h e U A R T .
* /
NESTED( _ m i p s _ c p s _ p u t x4 , 0 , r a )
andi a0 , a0 , 0 x f
li t 0 , ' 0 '
blt a0 , 1 0 , 1 f
li t 0 , ' a '
addiu a0 , a0 , - 1 0
1 : addu a0 , a0 , t 0
b _ m i p s _ c p s _ p u t c
END( _ m i p s _ c p s _ p u t x4 )
/ * *
* _ mips_ c p s _ p u t x8 - w r i t e a n 8 b h e x v a l u e t o t h e U A R T
* @a0: the 8b value to write to the UART
* @t9: UART base address
*
* Write a n 8 b i t v a l u e ( i e . 2 h e x a d e c i m a l c h a r a c t e r s ) t o t h e U A R T .
* /
NESTED( _ m i p s _ c p s _ p u t x8 , 0 , r a )
move s3 , r a
move s2 , a0
srl a0 , a0 , 4
jal _ m i p s _ c p s _ p u t x4
move a0 , s2
move r a , s3
b _ m i p s _ c p s _ p u t x4
END( _ m i p s _ c p s _ p u t x8 )
/ * *
* _ mips_ c p s _ p u t x16 - w r i t e a 1 6 b h e x v a l u e t o t h e U A R T
* @a0: the 16b value to write to the UART
* @t9: UART base address
*
* Write a 1 6 b i t v a l u e ( i e . 4 h e x a d e c i m a l c h a r a c t e r s ) t o t h e U A R T .
* /
NESTED( _ m i p s _ c p s _ p u t x16 , 0 , r a )
move s5 , r a
move s4 , a0
srl a0 , a0 , 8
jal _ m i p s _ c p s _ p u t x8
move a0 , s4
move r a , s5
b _ m i p s _ c p s _ p u t x8
END( _ m i p s _ c p s _ p u t x16 )
/ * *
* _ mips_ c p s _ p u t x32 - w r i t e a 3 2 b h e x v a l u e t o t h e U A R T
* @a0: the 32b value to write to the UART
* @t9: UART base address
*
* Write a 3 2 b i t v a l u e ( i e . 8 h e x a d e c i m a l c h a r a c t e r s ) t o t h e U A R T .
* /
NESTED( _ m i p s _ c p s _ p u t x32 , 0 , r a )
move s7 , r a
move s6 , a0
srl a0 , a0 , 1 6
jal _ m i p s _ c p s _ p u t x16
move a0 , s6
move r a , s7
b _ m i p s _ c p s _ p u t x16
END( _ m i p s _ c p s _ p u t x32 )
# ifdef C O N F I G _ 6 4 B I T
/ * *
* _ mips_ c p s _ p u t x64 - w r i t e a 6 4 b h e x v a l u e t o t h e U A R T
* @a0: the 64b value to write to the UART
* @t9: UART base address
*
* Write a 6 4 b i t v a l u e ( i e . 1 6 h e x a d e c i m a l c h a r a c t e r s ) t o t h e U A R T .
* /
NESTED( _ m i p s _ c p s _ p u t x64 , 0 , r a )
move s p , r a
move s8 , a0
dsrl3 2 a0 , a0 , 0
jal _ m i p s _ c p s _ p u t x32
move a0 , s8
move r a , s p
b _ m i p s _ c p s _ p u t x32
END( _ m i p s _ c p s _ p u t x64 )
# define _ m i p s _ c p s _ p u t x l o n g _ m i p s _ c p s _ p u t x64
# else / * ! C O N F I G _ 6 4 B I T * /
# define _ m i p s _ c p s _ p u t x l o n g _ m i p s _ c p s _ p u t x32
# endif / * ! C O N F I G _ 6 4 B I T * /
/ * *
* mips_ c p s _ b e v _ d u m p ( ) - d u m p r e l e v a n t e x c e p t i o n s t a t e t o U A R T
* @a0: pointer to NULL-terminated ASCII string naming the exception
*
* Write i n f o r m a t i o n t h a t m a y b e u s e f u l i n d e b u g g i n g a n e x c e p t i o n t o t h e
* UART c o n f i g u r e d b y C O N F I G _ M I P S _ C P S _ N S 1 6 5 5 0 _ * . A s t h i s B E V e x c e p t i o n
* will o n l y b e r u n i f s o m e t h i n g g o e s h o r r i b l y w r o n g v e r y e a r l y d u r i n g
* the b r i n g u p o f a c o r e a n d i t i s v e r y l i k e l y t o b e u n s a f e t o p e r f o r m
* memory a c c e s s e s a t t h a t p o i n t ( c a c h e s t a t e i n d e t e r m i n a t e , E V A m a y n o t
* be c o n f i g u r e d , c o h e r e n c e m a y b e d i s a b l e d ) l e t a l o n e h a v e a s t a c k ,
* this i s a l l w r i t t e n i n a s s e m b l y u s i n g o n l y r e g i s t e r s & u n m a p p e d
* uncached a c c e s s t o t h e U A R T r e g i s t e r s .
* /
LEAF( m i p s _ c p s _ b e v _ d u m p )
move s0 , r a
move s1 , a0
li t 9 , C K S E G 1 A D D R ( C O N F I G _ M I P S _ C P S _ N S 1 6 5 5 0 _ B A S E )
PTR_ L A a0 , s t r _ n e w l i n e
jal _ m i p s _ c p s _ p u t s
PTR_ L A a0 , s t r _ b e v
jal _ m i p s _ c p s _ p u t s
move a0 , s1
jal _ m i p s _ c p s _ p u t s
PTR_ L A a0 , s t r _ n e w l i n e
jal _ m i p s _ c p s _ p u t s
PTR_ L A a0 , s t r _ n e w l i n e
jal _ m i p s _ c p s _ p u t s
# define D U M P _ C O P 0 _ R E G ( r e g , n a m e , s z , _ m f c0 ) \
PTR_ L A a0 , 8 f ; \
jal _ m i p s _ c p s _ p u t s ; \
_ mfc0 a0 , r e g ; \
jal _ m i p s _ c p s _ p u t x ## s z ; \
PTR_ L A a0 , s t r _ n e w l i n e ; \
jal _ m i p s _ c p s _ p u t s ; \
TEXT( n a m e )
DUMP_ C O P 0 _ R E G ( C P 0 _ C A U S E , " C a u s e : 0 x " , 3 2 , m f c0 )
DUMP_ C O P 0 _ R E G ( C P 0 _ S T A T U S , " S t a t u s : 0 x " , 3 2 , m f c0 )
DUMP_ C O P 0 _ R E G ( C P 0 _ E B A S E , " E B a s e : 0 x " , l o n g , M F C 0 )
DUMP_ C O P 0 _ R E G ( C P 0 _ B A D V A D D R , " B a d V A d d r : 0 x " , l o n g , M F C 0 )
DUMP_ C O P 0 _ R E G ( C P 0 _ B A D I N S T R , " B a d I n s t r : 0 x " , 3 2 , m f c0 )
PTR_ L A a0 , s t r _ n e w l i n e
jal _ m i p s _ c p s _ p u t s
jr s0
END( m i p s _ c p s _ b e v _ d u m p )
.pushsection .data
str_bev : .asciiz " BEV Exception: "
str_newline : .asciiz " \r\n "
.popsection