2005-04-16 15:20:36 -07:00
/ * head- m m u - f r45 1 . S : F R 4 5 1 m m u - l i n u x s p e c i f i c b i t s o f i n i t i a l i s a t i o n
*
* Copyright ( C ) 2 0 0 4 R e d H a t , I n c . A l l R i g h t s R e s e r v e d .
* Written b y D a v i d H o w e l l s ( d h o w e l l s @redhat.com)
*
* This p r o g r a m i s f r e e s o f t w a r e ; you can redistribute it and/or
* modify i t u n d e r t h e t e r m s o f t h e G N U G e n e r a l P u b l i c L i c e n s e
* as p u b l i s h e d b y t h e F r e e S o f t w a r e F o u n d a t i o n ; either version
* 2 of t h e L i c e n s e , o r ( a t y o u r o p t i o n ) a n y l a t e r v e r s i o n .
* /
2009-04-28 00:37:58 +01:00
# include < l i n u x / i n i t . h >
2005-04-16 15:20:36 -07:00
# include < l i n u x / t h r e a d s . h >
# include < l i n u x / l i n k a g e . h >
# include < a s m / p t r a c e . h >
# include < a s m / p a g e . h >
# include < a s m / m e m - l a y o u t . h >
# include < a s m / s p r - r e g s . h >
# include < a s m / m b86 9 4 3 a . h >
# include " h e a d . i n c "
# define _ _ 4 0 0 _ D B R 0 0 x f e 0 0 0 e 0 0
# define _ _ 4 0 0 _ D B R 1 0 x f e 0 0 0 e 0 8
# define _ _ 4 0 0 _ D B R 2 0 x f e 0 0 0 e 1 0
# define _ _ 4 0 0 _ D B R 3 0 x f e 0 0 0 e 1 8
# define _ _ 4 0 0 _ D A M 0 0 x f e 0 0 0 f00
# define _ _ 4 0 0 _ D A M 1 0 x f e 0 0 0 f08
# define _ _ 4 0 0 _ D A M 2 0 x f e 0 0 0 f10
# define _ _ 4 0 0 _ D A M 3 0 x f e 0 0 0 f18
# define _ _ 4 0 0 _ L G C R 0 x f e 0 0 0 0 1 0
# define _ _ 4 0 0 _ L C R 0 x f e 0 0 0 1 0 0
# define _ _ 4 0 0 _ L S B R 0 x f e 0 0 0 c00
2009-04-28 00:37:58 +01:00
_ _ INIT
2005-04-16 15:20:36 -07:00
.balign 4
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# describe t h e p o s i t i o n a n d l a y o u t o f t h e S D R A M c o n t r o l l e r r e g i s t e r s
#
# ENTRY : EXIT :
# GR5 - c a c h e l i n e s i z e
# GR1 1 - d i s p l a c e m e n t o f 2 n d S D R A M a d d r r e g f r o m G R 1 4
# GR1 2 - d i s p l a c e m e n t o f 3 r d S D R A M a d d r r e g f r o m G R 1 4
# GR1 3 - d i s p l a c e m e n t o f 4 t h S D R A M a d d r r e g f r o m G R 1 4
# GR1 4 - a d d r e s s o f 1 s t S D R A M a d d r r e g
# GR1 5 - a m o u n t t o s h i f t a d d r e s s b y t o m a t c h S D R A M a d d r r e g
# GR2 6 & _ _ h e a d _ r e f e r e n c e [ s a v e d ]
# GR3 0 L E D a d d r e s s [ s a v e d ]
# CC0 - T i f D B R 0 i s p r e s e n t
# CC1 - T i f D B R 1 i s p r e s e n t
# CC2 - T i f D B R 2 i s p r e s e n t
# CC3 - T i f D B R 3 i s p r e s e n t
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
.globl __head_fr451_describe_sdram
__head_fr451_describe_sdram :
sethi. p % h i ( _ _ 4 0 0 _ D B R 0 ) ,g r14
setlo % l o ( _ _ 4 0 0 _ D B R 0 ) ,g r14
setlos. p #_ _ 400 _ D B R 1 - _ _ 4 0 0 _ D B R 0 ,g r11
setlos #_ _ 400 _ D B R 2 - _ _ 4 0 0 _ D B R 0 ,g r12
setlos. p #_ _ 400 _ D B R 3 - _ _ 4 0 0 _ D B R 0 ,g r13
setlos #32 ,g r5 ; cacheline size
setlos. p #0 ,g r15 ; amount to shift addr reg by
setlos #0x00ff ,g r4
movgs g r4 ,c c c r ; extant DARS/DAMK regs
bralr
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# rearrange t h e b u s c o n t r o l l e r r e g i s t e r s
#
# ENTRY : EXIT :
# GR2 6 & _ _ h e a d _ r e f e r e n c e [ s a v e d ]
# GR3 0 L E D a d d r e s s r e v i s e d L E D a d d r e s s
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
.globl __head_fr451_set_busctl
__head_fr451_set_busctl :
sethi. p % h i ( _ _ 4 0 0 _ L G C R ) ,g r4
setlo % l o ( _ _ 4 0 0 _ L G C R ) ,g r4
sethi. p % h i ( _ _ 4 0 0 _ L S B R ) ,g r10
setlo % l o ( _ _ 4 0 0 _ L S B R ) ,g r10
sethi. p % h i ( _ _ 4 0 0 _ L C R ) ,g r11
setlo % l o ( _ _ 4 0 0 _ L C R ) ,g r11
# set t h e b u s c o n t r o l l e r
ldi @(gr4,#0),gr5
ori g r5 ,#0xff ,g r5 ; make sure all chip-selects are enabled
sti g r5 ,@(gr4,#0)
sethi. p % h i ( _ _ r e g i o n _ C S 1 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 1 ) ,g r4
sethi. p % h i ( _ _ r e g i o n _ C S 1 _ M ) ,g r5
setlo % l o ( _ _ r e g i o n _ C S 1 _ M ) ,g r5
sethi. p % h i ( _ _ r e g i o n _ C S 1 _ C ) ,g r6
setlo % l o ( _ _ r e g i o n _ C S 1 _ C ) ,g r6
sti g r4 ,@(gr10,#1*0x08)
sti g r5 ,@(gr10,#1*0x08+0x100)
sti g r6 ,@(gr11,#1*0x08)
sethi. p % h i ( _ _ r e g i o n _ C S 2 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 2 ) ,g r4
sethi. p % h i ( _ _ r e g i o n _ C S 2 _ M ) ,g r5
setlo % l o ( _ _ r e g i o n _ C S 2 _ M ) ,g r5
sethi. p % h i ( _ _ r e g i o n _ C S 2 _ C ) ,g r6
setlo % l o ( _ _ r e g i o n _ C S 2 _ C ) ,g r6
sti g r4 ,@(gr10,#2*0x08)
sti g r5 ,@(gr10,#2*0x08+0x100)
sti g r6 ,@(gr11,#2*0x08)
sethi. p % h i ( _ _ r e g i o n _ C S 3 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 3 ) ,g r4
sethi. p % h i ( _ _ r e g i o n _ C S 3 _ M ) ,g r5
setlo % l o ( _ _ r e g i o n _ C S 3 _ M ) ,g r5
sethi. p % h i ( _ _ r e g i o n _ C S 3 _ C ) ,g r6
setlo % l o ( _ _ r e g i o n _ C S 3 _ C ) ,g r6
sti g r4 ,@(gr10,#3*0x08)
sti g r5 ,@(gr10,#3*0x08+0x100)
sti g r6 ,@(gr11,#3*0x08)
sethi. p % h i ( _ _ r e g i o n _ C S 4 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 4 ) ,g r4
sethi. p % h i ( _ _ r e g i o n _ C S 4 _ M ) ,g r5
setlo % l o ( _ _ r e g i o n _ C S 4 _ M ) ,g r5
sethi. p % h i ( _ _ r e g i o n _ C S 4 _ C ) ,g r6
setlo % l o ( _ _ r e g i o n _ C S 4 _ C ) ,g r6
sti g r4 ,@(gr10,#4*0x08)
sti g r5 ,@(gr10,#4*0x08+0x100)
sti g r6 ,@(gr11,#4*0x08)
sethi. p % h i ( _ _ r e g i o n _ C S 5 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 5 ) ,g r4
sethi. p % h i ( _ _ r e g i o n _ C S 5 _ M ) ,g r5
setlo % l o ( _ _ r e g i o n _ C S 5 _ M ) ,g r5
sethi. p % h i ( _ _ r e g i o n _ C S 5 _ C ) ,g r6
setlo % l o ( _ _ r e g i o n _ C S 5 _ C ) ,g r6
sti g r4 ,@(gr10,#5*0x08)
sti g r5 ,@(gr10,#5*0x08+0x100)
sti g r6 ,@(gr11,#5*0x08)
sethi. p % h i ( _ _ r e g i o n _ C S 6 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 6 ) ,g r4
sethi. p % h i ( _ _ r e g i o n _ C S 6 _ M ) ,g r5
setlo % l o ( _ _ r e g i o n _ C S 6 _ M ) ,g r5
sethi. p % h i ( _ _ r e g i o n _ C S 6 _ C ) ,g r6
setlo % l o ( _ _ r e g i o n _ C S 6 _ C ) ,g r6
sti g r4 ,@(gr10,#6*0x08)
sti g r5 ,@(gr10,#6*0x08+0x100)
sti g r6 ,@(gr11,#6*0x08)
sethi. p % h i ( _ _ r e g i o n _ C S 7 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 7 ) ,g r4
sethi. p % h i ( _ _ r e g i o n _ C S 7 _ M ) ,g r5
setlo % l o ( _ _ r e g i o n _ C S 7 _ M ) ,g r5
sethi. p % h i ( _ _ r e g i o n _ C S 7 _ C ) ,g r6
setlo % l o ( _ _ r e g i o n _ C S 7 _ C ) ,g r6
sti g r4 ,@(gr10,#7*0x08)
sti g r5 ,@(gr10,#7*0x08+0x100)
sti g r6 ,@(gr11,#7*0x08)
membar
bar
# adjust L E D b a n k a d d r e s s
# ifdef C O N F I G _ M B 9 3 0 9 1 _ V D K
sethi. p % h i ( _ _ r e g i o n _ C S 2 + 0 x01 2 0 0 0 0 4 ) ,g r30
setlo % l o ( _ _ r e g i o n _ C S 2 + 0 x01 2 0 0 0 0 4 ) ,g r30
# endif
bralr
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# determine t h e t o t a l S D R A M s i z e
#
# ENTRY : EXIT :
# GR2 5 - S D R A M s i z e
# GR2 6 & _ _ h e a d _ r e f e r e n c e [ s a v e d ]
# GR3 0 L E D a d d r e s s [ s a v e d ]
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
.globl __head_fr451_survey_sdram
__head_fr451_survey_sdram :
sethi. p % h i ( _ _ 4 0 0 _ D A M 0 ) ,g r11
setlo % l o ( _ _ 4 0 0 _ D A M 0 ) ,g r11
sethi. p % h i ( _ _ 4 0 0 _ D B R 0 ) ,g r12
setlo % l o ( _ _ 4 0 0 _ D B R 0 ) ,g r12
sethi. p % h i ( 0 x f e 0 0 0 0 0 0 ) ,g r17 ; unused SDRAM DBR value
setlo % l o ( 0 x f e 0 0 0 0 0 0 ) ,g r17
setlos #0 ,g r25
ldi @(gr12,#0x00),gr4 ; DAR0
subcc g r4 ,g r17 ,g r0 ,i c c0
beq i c c0 ,#0 ,_ _ h e a d _ n o _ D C S 0
ldi @(gr11,#0x00),gr6 ; DAM0: bits 31:20 match addr 31:20
add g r25 ,g r6 ,g r25
addi g r25 ,#1 ,g r25
__head_no_DCS0 :
ldi @(gr12,#0x08),gr4 ; DAR1
subcc g r4 ,g r17 ,g r0 ,i c c0
beq i c c0 ,#0 ,_ _ h e a d _ n o _ D C S 1
ldi @(gr11,#0x08),gr6 ; DAM1: bits 31:20 match addr 31:20
add g r25 ,g r6 ,g r25
addi g r25 ,#1 ,g r25
__head_no_DCS1 :
ldi @(gr12,#0x10),gr4 ; DAR2
subcc g r4 ,g r17 ,g r0 ,i c c0
beq i c c0 ,#0 ,_ _ h e a d _ n o _ D C S 2
ldi @(gr11,#0x10),gr6 ; DAM2: bits 31:20 match addr 31:20
add g r25 ,g r6 ,g r25
addi g r25 ,#1 ,g r25
__head_no_DCS2 :
ldi @(gr12,#0x18),gr4 ; DAR3
subcc g r4 ,g r17 ,g r0 ,i c c0
beq i c c0 ,#0 ,_ _ h e a d _ n o _ D C S 3
ldi @(gr11,#0x18),gr6 ; DAM3: bits 31:20 match addr 31:20
add g r25 ,g r6 ,g r25
addi g r25 ,#1 ,g r25
__head_no_DCS3 :
bralr
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# set t h e p r o t e c t i o n m a p w i t h t h e I / D A M P R r e g i s t e r s
#
# ENTRY : EXIT :
# GR2 5 S D R A M s i z e [ s a v e d ]
# GR2 6 & _ _ h e a d _ r e f e r e n c e [ s a v e d ]
# GR3 0 L E D a d d r e s s [ s a v e d ]
#
#
# Using t h i s m a p :
# REGISTERS A D D R E S S R A N G E V I E W
# = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
# IAMPR0 / D A M P R 0 0 x C 0 0 0 0 0 0 0 - 0 x C F F F F F F F C a c h e d k e r n e l R A M W i n d o w
# DAMPR1 1 0 x E 0 0 0 0 0 0 0 - 0 x F F F F F F F F U n c a c h e d I / O
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
.globl __head_fr451_set_protection
__head_fr451_set_protection :
movsg l r ,g r27
# set t h e I / O r e g i o n p r o t e c t i o n r e g i s t e r s f o r F R 4 5 1 i n M M U m o d e
# define P G P R O T _ I O x A M P R x _ L | x A M P R x _ M | x A M P R x _ S _ K E R N E L | x A M P R x _ C | x A M P R x _ V
sethi. p % h i ( _ _ r e g i o n _ I O ) ,g r5
setlo % l o ( _ _ r e g i o n _ I O ) ,g r5
setlos #P G P R O T _ I O | x A M P R x _ S S _ 512 M b ,g r4
or g r4 ,g r5 ,g r4
movgs g r5 ,d a m l r11 ; General I/O tile
movgs g r4 ,d a m p r11
# need t o o p e n a w i n d o w o n t o a t l e a s t p a r t o f t h e R A M f o r t h e k e r n e l ' s u s e
sethi. p % h i ( _ _ s d r a m _ b a s e ) ,g r8
setlo % l o ( _ _ s d r a m _ b a s e ) ,g r8 ; physical address
sethi. p % h i ( _ _ p a g e _ o f f s e t ) ,g r9
setlo % l o ( _ _ p a g e _ o f f s e t ) ,g r9 ; virtual address
setlos #x A M P R x _ L | x A M P R x _ M | x A M P R x _ S S _ 256 M b | x A M P R x _ S _ K E R N E L | x A M P R x _ V ,g r11
or g r8 ,g r11 ,g r8
movgs g r9 ,i a m l r0 ; mapped from real address 0
movgs g r8 ,i a m p r0 ; cached kernel memory at 0xC0000000
movgs g r9 ,d a m l r0
movgs g r8 ,d a m p r0
# set a t e m p o r a r y m a p p i n g f o r t h e k e r n e l r u n n i n g a t a d d r e s s 0 u n t i l w e ' v e t u r n e d o n t h e M M U
sethi. p % h i ( _ _ s d r a m _ b a s e ) ,g r9
setlo % l o ( _ _ s d r a m _ b a s e ) ,g r9 ; virtual address
and. p g r4 ,g r11 ,g r4
and g r5 ,g r11 ,g r5
or. p g r4 ,g r11 ,g r4
or g r5 ,g r11 ,g r5
movgs g r9 ,i a m l r1 ; mapped from real address 0
movgs g r8 ,i a m p r1 ; cached kernel memory at 0x00000000
movgs g r9 ,d a m l r1
movgs g r8 ,d a m p r1
# we u s e D A M R 2 - 1 0 f o r k m a p _ a t o m i c ( ) , c a c h e f l u s h a n d T L B m a n a g e m e n t
# since t h e D A M L R r e g s a r e n o t g o i n g t o c h a n g e , w e c a n s e t t h e m n o w
# also s e t u p I A M L R 2 t o t h e s a m e a s D A M L R 5
sethi. p % h i ( K M A P _ A T O M I C _ P R I M A R Y _ F R A M E ) ,g r4
setlo % l o ( K M A P _ A T O M I C _ P R I M A R Y _ F R A M E ) ,g r4
sethi. p % h i ( P A G E _ S I Z E ) ,g r5
setlo % l o ( P A G E _ S I Z E ) ,g r5
movgs g r4 ,d a m l r2
movgs g r4 ,i a m l r2
add g r4 ,g r5 ,g r4
movgs g r4 ,d a m l r3
add g r4 ,g r5 ,g r4
movgs g r4 ,d a m l r4
add g r4 ,g r5 ,g r4
movgs g r4 ,d a m l r5
add g r4 ,g r5 ,g r4
movgs g r4 ,d a m l r6
add g r4 ,g r5 ,g r4
movgs g r4 ,d a m l r7
add g r4 ,g r5 ,g r4
movgs g r4 ,d a m l r8
add g r4 ,g r5 ,g r4
movgs g r4 ,d a m l r9
add g r4 ,g r5 ,g r4
movgs g r4 ,d a m l r10
movgs g r0 ,d a m p r2
movgs g r0 ,d a m p r4
movgs g r0 ,d a m p r5
movgs g r0 ,d a m p r6
movgs g r0 ,d a m p r7
movgs g r0 ,d a m p r8
movgs g r0 ,d a m p r9
movgs g r0 ,d a m p r10
movgs g r0 ,i a m l r3
movgs g r0 ,i a m l r4
movgs g r0 ,i a m l r5
movgs g r0 ,i a m l r6
movgs g r0 ,i a m l r7
movgs g r0 ,i a m p r2
movgs g r0 ,i a m p r3
movgs g r0 ,i a m p r4
movgs g r0 ,i a m p r5
movgs g r0 ,i a m p r6
movgs g r0 ,i a m p r7
# start i n T L B c o n t e x t 0 w i t h t h e s w a p p e r ' s p a g e t a b l e s
movgs g r0 ,c x n r
sethi. p % h i ( s w a p p e r _ p g _ d i r ) ,g r4
setlo % l o ( s w a p p e r _ p g _ d i r ) ,g r4
sethi. p % h i ( _ _ p a g e _ o f f s e t ) ,g r5
setlo % l o ( _ _ p a g e _ o f f s e t ) ,g r5
sub g r4 ,g r5 ,g r4
movgs g r4 ,t t b r
setlos #x A M P R x _ L | x A M P R x _ M | x A M P R x _ S S _ 16 K b | x A M P R x _ S | x A M P R x _ C | x A M P R x _ V ,g r5
or g r4 ,g r5 ,g r4
movgs g r4 ,d a m p r3
# the F R 4 5 1 a l s o h a s a n e x t r a t r a p b a s e r e g i s t e r
movsg t b r ,g r4
movgs g r4 ,b t b r
LEDS 0 x33 0 0
jmpl @(gr27,gr0)
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# finish s e t t i n g u p t h e p r o t e c t i o n r e g i s t e r s
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
.globl __head_fr451_finalise_protection
__head_fr451_finalise_protection :
# turn o n t h e t i m e r s a s a p p r o p r i a t e
movgs g r0 ,t i m e r h
movgs g r0 ,t i m e r l
movgs g r0 ,t i m e r d
movsg h s r0 ,g r4
sethi. p % h i ( H S R 0 _ E T M I ) ,g r5
setlo % l o ( H S R 0 _ E T M I ) ,g r5
or g r4 ,g r5 ,g r4
movgs g r4 ,h s r0
# clear t h e T L B e n t r y c a c h e
movgs g r0 ,i a m l r1
movgs g r0 ,i a m p r1
movgs g r0 ,d a m l r1
movgs g r0 ,d a m p r1
# clear t h e P G E c a c h e
sethi. p % h i ( _ _ f l u s h _ t l b _ a l l ) ,g r4
setlo % l o ( _ _ f l u s h _ t l b _ a l l ) ,g r4
jmpl @(gr4,gr0)
