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linux/drivers/soc/renesas/renesas-soc.c

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soc: renesas: convert to SPDX identifiers This patch updates license to use SPDX-License-Identifier instead of verbose license text. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-07 02:04:19 +00:00
// SPDX-License-Identifier: GPL-2.0
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
/*
* Renesas SoC Identification
*
* Copyright (C) 2014-2016 Glider bvba
*/
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/sys_soc.h>
struct renesas_family {
const char name[16];
u32 reg; /* CCCR or PRR, if not in DT */
};
static const struct renesas_family fam_rcar_gen1 __initconst __maybe_unused = {
.name = "R-Car Gen1",
.reg = 0xff000044, /* PRR (Product Register) */
};
static const struct renesas_family fam_rcar_gen2 __initconst __maybe_unused = {
.name = "R-Car Gen2",
.reg = 0xff000044, /* PRR (Product Register) */
};
static const struct renesas_family fam_rcar_gen3 __initconst __maybe_unused = {
.name = "R-Car Gen3",
.reg = 0xfff00044, /* PRR (Product Register) */
};
soc: renesas: Identify R-Car S4-8 Add support for identifying the R-Car S4-8 (R8A779F0) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-8-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-01 16:33:01 +09:00
static const struct renesas_family fam_rcar_gen4 __initconst __maybe_unused = {
.name = "R-Car Gen4",
};
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
static const struct renesas_family fam_rmobile __initconst __maybe_unused = {
.name = "R-Mobile",
.reg = 0xe600101c, /* CCCR (Common Chip Code Register) */
};
soc: renesas: identify RZ/A2 Add support for identifying the RZ/A2M (R7S9210) SoC. Also add support for reading the BSID register which is a different format than the PRR. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-27 11:53:32 -05:00
static const struct renesas_family fam_rza1 __initconst __maybe_unused = {
.name = "RZ/A1",
};
static const struct renesas_family fam_rza2 __initconst __maybe_unused = {
.name = "RZ/A2",
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
};
soc: renesas: Identify RZ/G2M This patch adds support for identifying the RZ/G2M (r8a774a1) SoC. It corrects the original RZ/G SoC family name to RZ/G1 and also adds support for the new RZ/G2 SoC family. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-24 16:47:18 +01:00
static const struct renesas_family fam_rzg1 __initconst __maybe_unused = {
.name = "RZ/G1",
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
.reg = 0xff000044, /* PRR (Product Register) */
};
soc: renesas: Identify RZ/G2M This patch adds support for identifying the RZ/G2M (r8a774a1) SoC. It corrects the original RZ/G SoC family name to RZ/G1 and also adds support for the new RZ/G2 SoC family. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-24 16:47:18 +01:00
static const struct renesas_family fam_rzg2 __initconst __maybe_unused = {
.name = "RZ/G2",
.reg = 0xfff00044, /* PRR (Product Register) */
};
soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's Add support for reading the LSI DEVID register which is present in SYSC block of RZ/G2{L,LC} SoC's. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20210609163717.3083-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-06-09 17:37:16 +01:00
static const struct renesas_family fam_rzg2l __initconst __maybe_unused = {
.name = "RZ/G2L",
};
soc: renesas: Identify RZ/G2UL SoC Add support for identifying the RZ/G2UL SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220315142644.17660-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-03-15 14:26:39 +00:00
static const struct renesas_family fam_rzg2ul __initconst __maybe_unused = {
.name = "RZ/G2UL",
};
soc: renesas: Identify RZ/V2L SoC Add support for identifying the RZ/V2L (R9A07G054) SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220110134659.30424-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-10 13:46:49 +00:00
static const struct renesas_family fam_rzv2l __initconst __maybe_unused = {
.name = "RZ/V2L",
};
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
static const struct renesas_family fam_shmobile __initconst __maybe_unused = {
.name = "SH-Mobile",
.reg = 0xe600101c, /* CCCR (Common Chip Code Register) */
};
struct renesas_soc {
const struct renesas_family *family;
soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's Add support for reading the LSI DEVID register which is present in SYSC block of RZ/G2{L,LC} SoC's. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20210609163717.3083-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-06-09 17:37:16 +01:00
u32 id;
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
};
static const struct renesas_soc soc_rz_a1h __initconst __maybe_unused = {
soc: renesas: identify RZ/A2 Add support for identifying the RZ/A2M (R7S9210) SoC. Also add support for reading the BSID register which is a different format than the PRR. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-27 11:53:32 -05:00
.family = &fam_rza1,
};
static const struct renesas_soc soc_rz_a2m __initconst __maybe_unused = {
.family = &fam_rza2,
.id = 0x3b,
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
};
static const struct renesas_soc soc_rmobile_ape6 __initconst __maybe_unused = {
.family = &fam_rmobile,
.id = 0x3f,
};
static const struct renesas_soc soc_rmobile_a1 __initconst __maybe_unused = {
.family = &fam_rmobile,
.id = 0x40,
};
soc: renesas: Identify RZ/G1H Add support for identifying the RZ/G1H (r8a7742) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 14:48:29 +01:00
static const struct renesas_soc soc_rz_g1h __initconst __maybe_unused = {
soc: renesas: Identify RZ/G2M This patch adds support for identifying the RZ/G2M (r8a774a1) SoC. It corrects the original RZ/G SoC family name to RZ/G1 and also adds support for the new RZ/G2 SoC family. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-24 16:47:18 +01:00
.family = &fam_rzg1,
soc: renesas: Identify RZ/G1H Add support for identifying the RZ/G1H (r8a7742) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 14:48:29 +01:00
.id = 0x45,
};
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
static const struct renesas_soc soc_rz_g1m __initconst __maybe_unused = {
soc: renesas: Identify RZ/G2M This patch adds support for identifying the RZ/G2M (r8a774a1) SoC. It corrects the original RZ/G SoC family name to RZ/G1 and also adds support for the new RZ/G2 SoC family. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-24 16:47:18 +01:00
.family = &fam_rzg1,
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
.id = 0x47,
};
soc: renesas: Identify RZ/G1N Add support for identifying the RZ/G1N (r8a7744) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 14:48:30 +01:00
static const struct renesas_soc soc_rz_g1n __initconst __maybe_unused = {
soc: renesas: Identify RZ/G2M This patch adds support for identifying the RZ/G2M (r8a774a1) SoC. It corrects the original RZ/G SoC family name to RZ/G1 and also adds support for the new RZ/G2 SoC family. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-24 16:47:18 +01:00
.family = &fam_rzg1,
soc: renesas: Identify RZ/G1N Add support for identifying the RZ/G1N (r8a7744) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 14:48:30 +01:00
.id = 0x4b,
};
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
static const struct renesas_soc soc_rz_g1e __initconst __maybe_unused = {
soc: renesas: Identify RZ/G2M This patch adds support for identifying the RZ/G2M (r8a774a1) SoC. It corrects the original RZ/G SoC family name to RZ/G1 and also adds support for the new RZ/G2 SoC family. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-24 16:47:18 +01:00
.family = &fam_rzg1,
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
.id = 0x4c,
};
soc: renesas: Identify RZ/G1C Add support for identifying the RZ/G1C (r8a77470) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-27 15:37:13 +01:00
static const struct renesas_soc soc_rz_g1c __initconst __maybe_unused = {
soc: renesas: Identify RZ/G2M This patch adds support for identifying the RZ/G2M (r8a774a1) SoC. It corrects the original RZ/G SoC family name to RZ/G1 and also adds support for the new RZ/G2 SoC family. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-24 16:47:18 +01:00
.family = &fam_rzg1,
soc: renesas: Identify RZ/G1C Add support for identifying the RZ/G1C (r8a77470) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-27 15:37:13 +01:00
.id = 0x53,
};
soc: renesas: Identify RZ/G2M This patch adds support for identifying the RZ/G2M (r8a774a1) SoC. It corrects the original RZ/G SoC family name to RZ/G1 and also adds support for the new RZ/G2 SoC family. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-24 16:47:18 +01:00
static const struct renesas_soc soc_rz_g2m __initconst __maybe_unused = {
.family = &fam_rzg2,
.id = 0x52,
};
soc: renesas: Identify RZ/G2N This patch adds support for identifying the RZ/G2N (r8a774b1) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1567675844-19247-3-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-09-05 10:30:42 +01:00
static const struct renesas_soc soc_rz_g2n __initconst __maybe_unused = {
.family = &fam_rzg2,
.id = 0x55,
};
soc: renesas: Identify RZ/G2E Add support for identifying the RZ/G2E (r8a774c0) SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-10 12:53:50 +01:00
static const struct renesas_soc soc_rz_g2e __initconst __maybe_unused = {
.family = &fam_rzg2,
.id = 0x57,
};
soc: renesas: Identify RZ/G2H This patch adds support for identifying the RZ/G2H (r8a774e1) SoC. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594138692-16816-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-07 17:18:01 +01:00
static const struct renesas_soc soc_rz_g2h __initconst __maybe_unused = {
.family = &fam_rzg2,
.id = 0x4f,
};
soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's Add support for reading the LSI DEVID register which is present in SYSC block of RZ/G2{L,LC} SoC's. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20210609163717.3083-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-06-09 17:37:16 +01:00
static const struct renesas_soc soc_rz_g2l __initconst __maybe_unused = {
.family = &fam_rzg2l,
.id = 0x841c447,
};
soc: renesas: Identify RZ/G2UL SoC Add support for identifying the RZ/G2UL SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220315142644.17660-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-03-15 14:26:39 +00:00
static const struct renesas_soc soc_rz_g2ul __initconst __maybe_unused = {
.family = &fam_rzg2ul,
.id = 0x8450447,
};
soc: renesas: Identify RZ/V2L SoC Add support for identifying the RZ/V2L (R9A07G054) SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220110134659.30424-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-10 13:46:49 +00:00
static const struct renesas_soc soc_rz_v2l __initconst __maybe_unused = {
.family = &fam_rzv2l,
.id = 0x8447447,
};
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
static const struct renesas_soc soc_rcar_m1a __initconst __maybe_unused = {
.family = &fam_rcar_gen1,
};
static const struct renesas_soc soc_rcar_h1 __initconst __maybe_unused = {
.family = &fam_rcar_gen1,
.id = 0x3b,
};
static const struct renesas_soc soc_rcar_h2 __initconst __maybe_unused = {
.family = &fam_rcar_gen2,
.id = 0x45,
};
static const struct renesas_soc soc_rcar_m2_w __initconst __maybe_unused = {
.family = &fam_rcar_gen2,
.id = 0x47,
};
static const struct renesas_soc soc_rcar_v2h __initconst __maybe_unused = {
.family = &fam_rcar_gen2,
.id = 0x4a,
};
static const struct renesas_soc soc_rcar_m2_n __initconst __maybe_unused = {
.family = &fam_rcar_gen2,
.id = 0x4b,
};
static const struct renesas_soc soc_rcar_e2 __initconst __maybe_unused = {
.family = &fam_rcar_gen2,
.id = 0x4c,
};
static const struct renesas_soc soc_rcar_h3 __initconst __maybe_unused = {
.family = &fam_rcar_gen3,
.id = 0x4f,
};
static const struct renesas_soc soc_rcar_m3_w __initconst __maybe_unused = {
.family = &fam_rcar_gen3,
.id = 0x52,
};
soc: renesas: Identify R-Car M3-N Add support for indentifying R-Car M3-N (R8A77965) SoC. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-20 16:12:05 +01:00
static const struct renesas_soc soc_rcar_m3_n __initconst __maybe_unused = {
.family = &fam_rcar_gen3,
.id = 0x55,
};
soc: renesas: identify R-Car V3M Add support for identifying the R-Car V3M (R8A77970) SoC. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-12 23:37:17 +03:00
static const struct renesas_soc soc_rcar_v3m __initconst __maybe_unused = {
.family = &fam_rcar_gen3,
.id = 0x54,
};
soc: renesas: identify R-Car V3H Add support for identifying the R-Car V3H (R8A77980) SoC. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-02 21:22:14 +03:00
static const struct renesas_soc soc_rcar_v3h __initconst __maybe_unused = {
.family = &fam_rcar_gen3,
.id = 0x56,
};
soc: renesas: identify R-Car E3 This patch adds support for identifying the R-Car E3 (R8A77990) SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-11 18:36:23 +09:00
static const struct renesas_soc soc_rcar_e3 __initconst __maybe_unused = {
.family = &fam_rcar_gen3,
.id = 0x57,
};
soc: renesas: Identify R-Car D3 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-20 14:34:51 +02:00
static const struct renesas_soc soc_rcar_d3 __initconst __maybe_unused = {
.family = &fam_rcar_gen3,
.id = 0x58,
};
soc: renesas: Identify R-Car V3U Add support for identifying the R-Car V3U (R8A779A0) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/1599470390-29719-10-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-07 18:19:45 +09:00
static const struct renesas_soc soc_rcar_v3u __initconst __maybe_unused = {
.family = &fam_rcar_gen3,
.id = 0x59,
};
soc: renesas: Identify R-Car S4-8 Add support for identifying the R-Car S4-8 (R8A779F0) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-8-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-01 16:33:01 +09:00
static const struct renesas_soc soc_rcar_s4 __initconst __maybe_unused = {
.family = &fam_rcar_gen4,
.id = 0x5a,
};
soc: renesas: Identify R-Car V4H Add support for identifying the R-Car V4H (R8A779G0) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220420084255.375700-11-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-20 17:42:50 +09:00
static const struct renesas_soc soc_rcar_v4h __initconst __maybe_unused = {
.family = &fam_rcar_gen4,
.id = 0x5c,
};
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
static const struct renesas_soc soc_shmobile_ag5 __initconst __maybe_unused = {
.family = &fam_shmobile,
.id = 0x37,
};
static const struct of_device_id renesas_socs[] __initconst = {
#ifdef CONFIG_ARCH_R7S72100
{ .compatible = "renesas,r7s72100", .data = &soc_rz_a1h },
#endif
soc: renesas: identify RZ/A2 Add support for identifying the RZ/A2M (R7S9210) SoC. Also add support for reading the BSID register which is a different format than the PRR. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-27 11:53:32 -05:00
#ifdef CONFIG_ARCH_R7S9210
{ .compatible = "renesas,r7s9210", .data = &soc_rz_a2m },
#endif
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
#ifdef CONFIG_ARCH_R8A73A4
{ .compatible = "renesas,r8a73a4", .data = &soc_rmobile_ape6 },
#endif
#ifdef CONFIG_ARCH_R8A7740
{ .compatible = "renesas,r8a7740", .data = &soc_rmobile_a1 },
#endif
soc: renesas: Identify RZ/G1H Add support for identifying the RZ/G1H (r8a7742) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 14:48:29 +01:00
#ifdef CONFIG_ARCH_R8A7742
{ .compatible = "renesas,r8a7742", .data = &soc_rz_g1h },
#endif
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
#ifdef CONFIG_ARCH_R8A7743
{ .compatible = "renesas,r8a7743", .data = &soc_rz_g1m },
#endif
soc: renesas: Identify RZ/G1N Add support for identifying the RZ/G1N (r8a7744) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 14:48:30 +01:00
#ifdef CONFIG_ARCH_R8A7744
{ .compatible = "renesas,r8a7744", .data = &soc_rz_g1n },
#endif
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
#ifdef CONFIG_ARCH_R8A7745
{ .compatible = "renesas,r8a7745", .data = &soc_rz_g1e },
#endif
soc: renesas: Identify RZ/G1C Add support for identifying the RZ/G1C (r8a77470) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-27 15:37:13 +01:00
#ifdef CONFIG_ARCH_R8A77470
{ .compatible = "renesas,r8a77470", .data = &soc_rz_g1c },
#endif
soc: renesas: Identify RZ/G2M This patch adds support for identifying the RZ/G2M (r8a774a1) SoC. It corrects the original RZ/G SoC family name to RZ/G1 and also adds support for the new RZ/G2 SoC family. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-24 16:47:18 +01:00
#ifdef CONFIG_ARCH_R8A774A1
{ .compatible = "renesas,r8a774a1", .data = &soc_rz_g2m },
soc: renesas: Identify RZ/G2N This patch adds support for identifying the RZ/G2N (r8a774b1) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1567675844-19247-3-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-09-05 10:30:42 +01:00
#endif
#ifdef CONFIG_ARCH_R8A774B1
{ .compatible = "renesas,r8a774b1", .data = &soc_rz_g2n },
soc: renesas: Identify RZ/G2M This patch adds support for identifying the RZ/G2M (r8a774a1) SoC. It corrects the original RZ/G SoC family name to RZ/G1 and also adds support for the new RZ/G2 SoC family. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-24 16:47:18 +01:00
#endif
soc: renesas: Identify RZ/G2E Add support for identifying the RZ/G2E (r8a774c0) SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-10 12:53:50 +01:00
#ifdef CONFIG_ARCH_R8A774C0
{ .compatible = "renesas,r8a774c0", .data = &soc_rz_g2e },
#endif
soc: renesas: Identify RZ/G2H This patch adds support for identifying the RZ/G2H (r8a774e1) SoC. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594138692-16816-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-07 17:18:01 +01:00
#ifdef CONFIG_ARCH_R8A774E1
{ .compatible = "renesas,r8a774e1", .data = &soc_rz_g2h },
#endif
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
#ifdef CONFIG_ARCH_R8A7778
{ .compatible = "renesas,r8a7778", .data = &soc_rcar_m1a },
#endif
#ifdef CONFIG_ARCH_R8A7779
{ .compatible = "renesas,r8a7779", .data = &soc_rcar_h1 },
#endif
#ifdef CONFIG_ARCH_R8A7790
{ .compatible = "renesas,r8a7790", .data = &soc_rcar_h2 },
#endif
#ifdef CONFIG_ARCH_R8A7791
{ .compatible = "renesas,r8a7791", .data = &soc_rcar_m2_w },
#endif
#ifdef CONFIG_ARCH_R8A7792
{ .compatible = "renesas,r8a7792", .data = &soc_rcar_v2h },
#endif
#ifdef CONFIG_ARCH_R8A7793
{ .compatible = "renesas,r8a7793", .data = &soc_rcar_m2_n },
#endif
#ifdef CONFIG_ARCH_R8A7794
{ .compatible = "renesas,r8a7794", .data = &soc_rcar_e2 },
#endif
soc: renesas: Remove ARCH_R8A7795 Replace the final user of CONFIG_ARCH_R8A7795 by CONFIG_ARCH_R8A77950 || CONFIG_ARCH_R8A77951, and remove the now unused CONFIG_ARCH_R8A7795 symbol definition. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200218112449.5723-1-geert+renesas@glider.be
2020-02-18 12:24:49 +01:00
#if defined(CONFIG_ARCH_R8A77950) || defined(CONFIG_ARCH_R8A77951)
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
{ .compatible = "renesas,r8a7795", .data = &soc_rcar_h3 },
#endif
soc: renesas: Identify R-Car H3e-2G and M3e-2G Add support for identifying the R-Car H3e-2G (R8A779M1) and R-Car M3e-2G (R8A779M3) SoCs. As these are different gradings of the already supported R-Car H3 ES3.0 (R8A77951) and M3-W+ (R8A77961) SoCs, support for them is enabled through the existing ARCH_R8A77951 and ARCH_R8A77961 configuration symbols. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/42b4578ab4739cb48ec3aed0a447fc40c34de1e5.1626708063.git.geert+renesas@glider.be
2021-07-19 17:38:33 +02:00
#ifdef CONFIG_ARCH_R8A77951
soc: renesas: Identify more R-Car Gen3e SoCs Add support for identifying the remaining R-Car Gen3e SoCs: R-Car H3e (R8A779M0), M3e (R8A779M2), M3Ne (R8A779M4), M3Ne-2G (R8A779M5), E3e (R8A779M6), D3e (R8A779M7), and H3Ne (R8A779M8). As these are different gradings of the already supported R-Car Gen3 SoCs, support for them is enabled through the existing ARCH_R8A779* configuration symbols. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/ccf2206b24147b3d977e4119bbdefaedceb28644.1628766192.git.geert+renesas@glider.be
2021-08-12 13:23:52 +02:00
{ .compatible = "renesas,r8a779m0", .data = &soc_rcar_h3 },
soc: renesas: Identify R-Car H3e-2G and M3e-2G Add support for identifying the R-Car H3e-2G (R8A779M1) and R-Car M3e-2G (R8A779M3) SoCs. As these are different gradings of the already supported R-Car H3 ES3.0 (R8A77951) and M3-W+ (R8A77961) SoCs, support for them is enabled through the existing ARCH_R8A77951 and ARCH_R8A77961 configuration symbols. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/42b4578ab4739cb48ec3aed0a447fc40c34de1e5.1626708063.git.geert+renesas@glider.be
2021-07-19 17:38:33 +02:00
{ .compatible = "renesas,r8a779m1", .data = &soc_rcar_h3 },
soc: renesas: Identify more R-Car Gen3e SoCs Add support for identifying the remaining R-Car Gen3e SoCs: R-Car H3e (R8A779M0), M3e (R8A779M2), M3Ne (R8A779M4), M3Ne-2G (R8A779M5), E3e (R8A779M6), D3e (R8A779M7), and H3Ne (R8A779M8). As these are different gradings of the already supported R-Car Gen3 SoCs, support for them is enabled through the existing ARCH_R8A779* configuration symbols. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/ccf2206b24147b3d977e4119bbdefaedceb28644.1628766192.git.geert+renesas@glider.be
2021-08-12 13:23:52 +02:00
{ .compatible = "renesas,r8a779m8", .data = &soc_rcar_h3 },
soc: renesas: Identify R-Car H3e-2G and M3e-2G Add support for identifying the R-Car H3e-2G (R8A779M1) and R-Car M3e-2G (R8A779M3) SoCs. As these are different gradings of the already supported R-Car H3 ES3.0 (R8A77951) and M3-W+ (R8A77961) SoCs, support for them is enabled through the existing ARCH_R8A77951 and ARCH_R8A77961 configuration symbols. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/42b4578ab4739cb48ec3aed0a447fc40c34de1e5.1626708063.git.geert+renesas@glider.be
2021-07-19 17:38:33 +02:00
#endif
soc: renesas: Add ARCH_R8A77960 for existing R-Car M3-W Add CONFIG_ARCH_R8A77960 as a new config symbol for R-Car M3-W (R8A77960), to replace CONFIG_ARCH_R8A7796, and avoid confusion with R-Car M3-W+ (R8A77961), which will use CONFIG_ARCH_R8A77961. Note that for now, CONFIG_ARCH_R8A7796 is retained, and just selects CONFIG_ARCH_R8A77960. This relaxes dependencies of other subsystems on the SoC configuration symbol, and provides a smooth transition path for config files through "make oldconfig". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023123342.13100-3-geert+renesas@glider.be
2019-10-23 14:33:33 +02:00
#ifdef CONFIG_ARCH_R8A77960
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
{ .compatible = "renesas,r8a7796", .data = &soc_rcar_m3_w },
#endif
soc: renesas: Identify R-Car M3-W+ Add support for identifying the R-Car M3-W+ (R8A77961) SoC, which shares the Product ID Number with R-Car M3-W (R8A77960), but differs in CUT Number (Ver. 3.0), and uses a different compatible value. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023123342.13100-5-geert+renesas@glider.be
2019-10-23 14:33:35 +02:00
#ifdef CONFIG_ARCH_R8A77961
{ .compatible = "renesas,r8a77961", .data = &soc_rcar_m3_w },
soc: renesas: Identify more R-Car Gen3e SoCs Add support for identifying the remaining R-Car Gen3e SoCs: R-Car H3e (R8A779M0), M3e (R8A779M2), M3Ne (R8A779M4), M3Ne-2G (R8A779M5), E3e (R8A779M6), D3e (R8A779M7), and H3Ne (R8A779M8). As these are different gradings of the already supported R-Car Gen3 SoCs, support for them is enabled through the existing ARCH_R8A779* configuration symbols. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/ccf2206b24147b3d977e4119bbdefaedceb28644.1628766192.git.geert+renesas@glider.be
2021-08-12 13:23:52 +02:00
{ .compatible = "renesas,r8a779m2", .data = &soc_rcar_m3_w },
soc: renesas: Identify R-Car H3e-2G and M3e-2G Add support for identifying the R-Car H3e-2G (R8A779M1) and R-Car M3e-2G (R8A779M3) SoCs. As these are different gradings of the already supported R-Car H3 ES3.0 (R8A77951) and M3-W+ (R8A77961) SoCs, support for them is enabled through the existing ARCH_R8A77951 and ARCH_R8A77961 configuration symbols. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/42b4578ab4739cb48ec3aed0a447fc40c34de1e5.1626708063.git.geert+renesas@glider.be
2021-07-19 17:38:33 +02:00
{ .compatible = "renesas,r8a779m3", .data = &soc_rcar_m3_w },
soc: renesas: Identify R-Car M3-W+ Add support for identifying the R-Car M3-W+ (R8A77961) SoC, which shares the Product ID Number with R-Car M3-W (R8A77960), but differs in CUT Number (Ver. 3.0), and uses a different compatible value. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023123342.13100-5-geert+renesas@glider.be
2019-10-23 14:33:35 +02:00
#endif
soc: renesas: Identify R-Car M3-N Add support for indentifying R-Car M3-N (R8A77965) SoC. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-20 16:12:05 +01:00
#ifdef CONFIG_ARCH_R8A77965
{ .compatible = "renesas,r8a77965", .data = &soc_rcar_m3_n },
soc: renesas: Identify more R-Car Gen3e SoCs Add support for identifying the remaining R-Car Gen3e SoCs: R-Car H3e (R8A779M0), M3e (R8A779M2), M3Ne (R8A779M4), M3Ne-2G (R8A779M5), E3e (R8A779M6), D3e (R8A779M7), and H3Ne (R8A779M8). As these are different gradings of the already supported R-Car Gen3 SoCs, support for them is enabled through the existing ARCH_R8A779* configuration symbols. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/ccf2206b24147b3d977e4119bbdefaedceb28644.1628766192.git.geert+renesas@glider.be
2021-08-12 13:23:52 +02:00
{ .compatible = "renesas,r8a779m4", .data = &soc_rcar_m3_n },
{ .compatible = "renesas,r8a779m5", .data = &soc_rcar_m3_n },
soc: renesas: Identify R-Car M3-N Add support for indentifying R-Car M3-N (R8A77965) SoC. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-20 16:12:05 +01:00
#endif
soc: renesas: identify R-Car V3M Add support for identifying the R-Car V3M (R8A77970) SoC. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-12 23:37:17 +03:00
#ifdef CONFIG_ARCH_R8A77970
{ .compatible = "renesas,r8a77970", .data = &soc_rcar_v3m },
#endif
soc: renesas: identify R-Car V3H Add support for identifying the R-Car V3H (R8A77980) SoC. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-02 21:22:14 +03:00
#ifdef CONFIG_ARCH_R8A77980
{ .compatible = "renesas,r8a77980", .data = &soc_rcar_v3h },
#endif
soc: renesas: identify R-Car E3 This patch adds support for identifying the R-Car E3 (R8A77990) SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-11 18:36:23 +09:00
#ifdef CONFIG_ARCH_R8A77990
{ .compatible = "renesas,r8a77990", .data = &soc_rcar_e3 },
soc: renesas: Identify more R-Car Gen3e SoCs Add support for identifying the remaining R-Car Gen3e SoCs: R-Car H3e (R8A779M0), M3e (R8A779M2), M3Ne (R8A779M4), M3Ne-2G (R8A779M5), E3e (R8A779M6), D3e (R8A779M7), and H3Ne (R8A779M8). As these are different gradings of the already supported R-Car Gen3 SoCs, support for them is enabled through the existing ARCH_R8A779* configuration symbols. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/ccf2206b24147b3d977e4119bbdefaedceb28644.1628766192.git.geert+renesas@glider.be
2021-08-12 13:23:52 +02:00
{ .compatible = "renesas,r8a779m6", .data = &soc_rcar_e3 },
soc: renesas: identify R-Car E3 This patch adds support for identifying the R-Car E3 (R8A77990) SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-11 18:36:23 +09:00
#endif
soc: renesas: Identify R-Car D3 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-20 14:34:51 +02:00
#ifdef CONFIG_ARCH_R8A77995
{ .compatible = "renesas,r8a77995", .data = &soc_rcar_d3 },
soc: renesas: Identify more R-Car Gen3e SoCs Add support for identifying the remaining R-Car Gen3e SoCs: R-Car H3e (R8A779M0), M3e (R8A779M2), M3Ne (R8A779M4), M3Ne-2G (R8A779M5), E3e (R8A779M6), D3e (R8A779M7), and H3Ne (R8A779M8). As these are different gradings of the already supported R-Car Gen3 SoCs, support for them is enabled through the existing ARCH_R8A779* configuration symbols. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/ccf2206b24147b3d977e4119bbdefaedceb28644.1628766192.git.geert+renesas@glider.be
2021-08-12 13:23:52 +02:00
{ .compatible = "renesas,r8a779m7", .data = &soc_rcar_d3 },
soc: renesas: Identify R-Car D3 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-20 14:34:51 +02:00
#endif
soc: renesas: Identify R-Car V3U Add support for identifying the R-Car V3U (R8A779A0) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/1599470390-29719-10-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-07 18:19:45 +09:00
#ifdef CONFIG_ARCH_R8A779A0
{ .compatible = "renesas,r8a779a0", .data = &soc_rcar_v3u },
#endif
soc: renesas: Identify R-Car S4-8 Add support for identifying the R-Car S4-8 (R8A779F0) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-8-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-01 16:33:01 +09:00
#ifdef CONFIG_ARCH_R8A779F0
{ .compatible = "renesas,r8a779f0", .data = &soc_rcar_s4 },
#endif
soc: renesas: Identify R-Car V4H Add support for identifying the R-Car V4H (R8A779G0) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220420084255.375700-11-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-20 17:42:50 +09:00
#ifdef CONFIG_ARCH_R8A779G0
{ .compatible = "renesas,r8a779g0", .data = &soc_rcar_v4h },
#endif
soc: renesas: Identify RZ/G2UL SoC Add support for identifying the RZ/G2UL SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220315142644.17660-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-03-15 14:26:39 +00:00
#if defined(CONFIG_ARCH_R9A07G043)
{ .compatible = "renesas,r9a07g043", .data = &soc_rz_g2ul },
#endif
soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's Add support for reading the LSI DEVID register which is present in SYSC block of RZ/G2{L,LC} SoC's. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20210609163717.3083-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-06-09 17:37:16 +01:00
#if defined(CONFIG_ARCH_R9A07G044)
{ .compatible = "renesas,r9a07g044", .data = &soc_rz_g2l },
#endif
soc: renesas: Identify RZ/V2L SoC Add support for identifying the RZ/V2L (R9A07G054) SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220110134659.30424-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-10 13:46:49 +00:00
#if defined(CONFIG_ARCH_R9A07G054)
{ .compatible = "renesas,r9a07g054", .data = &soc_rz_v2l },
#endif
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
#ifdef CONFIG_ARCH_SH73A0
{ .compatible = "renesas,sh73a0", .data = &soc_shmobile_ag5 },
#endif
{ /* sentinel */ }
};
soc: renesas: Consolidate product register handling Currently renesas_soc_init() scans the whole device tree up to three times, to find a device node describing a product register. Furthermore, the product register handling for the different variants is very similar, with the major difference being the location of the product bitfield inside the product register. Reduce scanning to a single pass using of_find_matching_node_and_match() instead. Switch to a common handling of product registers, by storing the intrinsics of each product register type in the data field of the corresponding match entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-10 20:00:52 +01:00
struct renesas_id {
unsigned int offset;
u32 mask;
};
static const struct renesas_id id_bsid __initconst = {
.offset = 0,
.mask = 0xff0000,
/*
* TODO: Upper 4 bits of BSID are for chip version, but the format is
* not known at this time so we don't know how to specify eshi and eslo
*/
};
static const struct renesas_id id_rzg2l __initconst = {
.offset = 0xa04,
.mask = 0xfffffff,
};
static const struct renesas_id id_prr __initconst = {
.offset = 0,
.mask = 0xff00,
};
static const struct of_device_id renesas_ids[] __initconst = {
{ .compatible = "renesas,bsid", .data = &id_bsid },
soc: renesas: Identify RZ/G2UL SoC Add support for identifying the RZ/G2UL SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220315142644.17660-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-03-15 14:26:39 +00:00
{ .compatible = "renesas,r9a07g043-sysc", .data = &id_rzg2l },
soc: renesas: Consolidate product register handling Currently renesas_soc_init() scans the whole device tree up to three times, to find a device node describing a product register. Furthermore, the product register handling for the different variants is very similar, with the major difference being the location of the product bitfield inside the product register. Reduce scanning to a single pass using of_find_matching_node_and_match() instead. Switch to a common handling of product registers, by storing the intrinsics of each product register type in the data field of the corresponding match entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-10 20:00:52 +01:00
{ .compatible = "renesas,r9a07g044-sysc", .data = &id_rzg2l },
soc: renesas: Identify RZ/V2L SoC Add support for identifying the RZ/V2L (R9A07G054) SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220110134659.30424-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-10 13:46:49 +00:00
{ .compatible = "renesas,r9a07g054-sysc", .data = &id_rzg2l },
soc: renesas: Consolidate product register handling Currently renesas_soc_init() scans the whole device tree up to three times, to find a device node describing a product register. Furthermore, the product register handling for the different variants is very similar, with the major difference being the location of the product bitfield inside the product register. Reduce scanning to a single pass using of_find_matching_node_and_match() instead. Switch to a common handling of product registers, by storing the intrinsics of each product register type in the data field of the corresponding match entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-10 20:00:52 +01:00
{ .compatible = "renesas,prr", .data = &id_prr },
{ /* sentinel */ }
};
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
static int __init renesas_soc_init(void)
{
struct soc_device_attribute *soc_dev_attr;
soc: renesas: Consolidate product register handling Currently renesas_soc_init() scans the whole device tree up to three times, to find a device node describing a product register. Furthermore, the product register handling for the different variants is very similar, with the major difference being the location of the product bitfield inside the product register. Reduce scanning to a single pass using of_find_matching_node_and_match() instead. Switch to a common handling of product registers, by storing the intrinsics of each product register type in the data field of the corresponding match entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-10 20:00:52 +01:00
unsigned int product, eshi = 0, eslo;
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
const struct renesas_family *family;
const struct of_device_id *match;
const struct renesas_soc *soc;
soc: renesas: Consolidate product register handling Currently renesas_soc_init() scans the whole device tree up to three times, to find a device node describing a product register. Furthermore, the product register handling for the different variants is very similar, with the major difference being the location of the product bitfield inside the product register. Reduce scanning to a single pass using of_find_matching_node_and_match() instead. Switch to a common handling of product registers, by storing the intrinsics of each product register type in the data field of the corresponding match entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-10 20:00:52 +01:00
const struct renesas_id *id;
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
void __iomem *chipid = NULL;
soc: renesas: Add support for reading product revision for RZ/G2L family As per RZ/G2L HW manual (Rev.1.00 Sep, 2021) DEV_ID [31:28] indicates product revision. Use this information to populate the revision info for RZ/G2L family. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220121014117.21248-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-21 01:41:17 +00:00
const char *rev_prefix = "";
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
struct soc_device *soc_dev;
struct device_node *np;
soc: renesas: Consolidate product register handling Currently renesas_soc_init() scans the whole device tree up to three times, to find a device node describing a product register. Furthermore, the product register handling for the different variants is very similar, with the major difference being the location of the product bitfield inside the product register. Reduce scanning to a single pass using of_find_matching_node_and_match() instead. Switch to a common handling of product registers, by storing the intrinsics of each product register type in the data field of the corresponding match entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-10 20:00:52 +01:00
const char *soc_id;
soc: renesas: Add support for reading product revision for RZ/G2L family As per RZ/G2L HW manual (Rev.1.00 Sep, 2021) DEV_ID [31:28] indicates product revision. Use this information to populate the revision info for RZ/G2L family. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220121014117.21248-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-21 01:41:17 +00:00
int ret;
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
match = of_match_node(renesas_socs, of_root);
if (!match)
return -ENODEV;
soc: renesas: Consolidate product register handling Currently renesas_soc_init() scans the whole device tree up to three times, to find a device node describing a product register. Furthermore, the product register handling for the different variants is very similar, with the major difference being the location of the product bitfield inside the product register. Reduce scanning to a single pass using of_find_matching_node_and_match() instead. Switch to a common handling of product registers, by storing the intrinsics of each product register type in the data field of the corresponding match entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-10 20:00:52 +01:00
soc_id = strchr(match->compatible, ',') + 1;
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
soc = match->data;
family = soc->family;
soc: renesas: Consolidate product register handling Currently renesas_soc_init() scans the whole device tree up to three times, to find a device node describing a product register. Furthermore, the product register handling for the different variants is very similar, with the major difference being the location of the product bitfield inside the product register. Reduce scanning to a single pass using of_find_matching_node_and_match() instead. Switch to a common handling of product registers, by storing the intrinsics of each product register type in the data field of the corresponding match entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-10 20:00:52 +01:00
np = of_find_matching_node_and_match(NULL, renesas_ids, &match);
soc: renesas: identify RZ/A2 Add support for identifying the RZ/A2M (R7S9210) SoC. Also add support for reading the BSID register which is a different format than the PRR. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-27 11:53:32 -05:00
if (np) {
soc: renesas: Consolidate product register handling Currently renesas_soc_init() scans the whole device tree up to three times, to find a device node describing a product register. Furthermore, the product register handling for the different variants is very similar, with the major difference being the location of the product bitfield inside the product register. Reduce scanning to a single pass using of_find_matching_node_and_match() instead. Switch to a common handling of product registers, by storing the intrinsics of each product register type in the data field of the corresponding match entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-10 20:00:52 +01:00
id = match->data;
soc: renesas: identify RZ/A2 Add support for identifying the RZ/A2M (R7S9210) SoC. Also add support for reading the BSID register which is a different format than the PRR. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-27 11:53:32 -05:00
chipid = of_iomap(np, 0);
of_node_put(np);
soc: renesas: Consolidate product register handling Currently renesas_soc_init() scans the whole device tree up to three times, to find a device node describing a product register. Furthermore, the product register handling for the different variants is very similar, with the major difference being the location of the product bitfield inside the product register. Reduce scanning to a single pass using of_find_matching_node_and_match() instead. Switch to a common handling of product registers, by storing the intrinsics of each product register type in the data field of the corresponding match entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-10 20:00:52 +01:00
} else if (soc->id && family->reg) {
/* Try hardcoded CCCR/PRR fallback */
id = &id_prr;
chipid = ioremap(family->reg, 4);
soc: renesas: identify RZ/A2 Add support for identifying the RZ/A2M (R7S9210) SoC. Also add support for reading the BSID register which is a different format than the PRR. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-27 11:53:32 -05:00
}
soc: renesas: Add support for reading product revision for RZ/G2L family As per RZ/G2L HW manual (Rev.1.00 Sep, 2021) DEV_ID [31:28] indicates product revision. Use this information to populate the revision info for RZ/G2L family. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220121014117.21248-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-21 01:41:17 +00:00
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
if (!soc_dev_attr)
return -ENOMEM;
np = of_find_node_by_path("/");
of_property_read_string(np, "model", &soc_dev_attr->machine);
of_node_put(np);
soc_dev_attr->family = kstrdup_const(family->name, GFP_KERNEL);
soc_dev_attr->soc_id = kstrdup_const(soc_id, GFP_KERNEL);
soc: renesas: Consolidate product register handling Currently renesas_soc_init() scans the whole device tree up to three times, to find a device node describing a product register. Furthermore, the product register handling for the different variants is very similar, with the major difference being the location of the product bitfield inside the product register. Reduce scanning to a single pass using of_find_matching_node_and_match() instead. Switch to a common handling of product registers, by storing the intrinsics of each product register type in the data field of the corresponding match entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-10 20:00:52 +01:00
if (chipid) {
product = readl(chipid + id->offset);
iounmap(chipid);
soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's Add support for reading the LSI DEVID register which is present in SYSC block of RZ/G2{L,LC} SoC's. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20210609163717.3083-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-06-09 17:37:16 +01:00
soc: renesas: Consolidate product register handling Currently renesas_soc_init() scans the whole device tree up to three times, to find a device node describing a product register. Furthermore, the product register handling for the different variants is very similar, with the major difference being the location of the product bitfield inside the product register. Reduce scanning to a single pass using of_find_matching_node_and_match() instead. Switch to a common handling of product registers, by storing the intrinsics of each product register type in the data field of the corresponding match entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-10 20:00:52 +01:00
if (id == &id_prr) {
/* R-Car M3-W ES1.1 incorrectly identifies as ES2.0 */
if ((product & 0x7fff) == 0x5210)
product ^= 0x11;
/* R-Car M3-W ES1.3 incorrectly identifies as ES2.1 */
if ((product & 0x7fff) == 0x5211)
product ^= 0x12;
soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's Add support for reading the LSI DEVID register which is present in SYSC block of RZ/G2{L,LC} SoC's. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20210609163717.3083-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-06-09 17:37:16 +01:00
soc: renesas: Consolidate product register handling Currently renesas_soc_init() scans the whole device tree up to three times, to find a device node describing a product register. Furthermore, the product register handling for the different variants is very similar, with the major difference being the location of the product bitfield inside the product register. Reduce scanning to a single pass using of_find_matching_node_and_match() instead. Switch to a common handling of product registers, by storing the intrinsics of each product register type in the data field of the corresponding match entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-10 20:00:52 +01:00
eshi = ((product >> 4) & 0x0f) + 1;
eslo = product & 0xf;
soc: renesas: Add support for reading product revision for RZ/G2L family As per RZ/G2L HW manual (Rev.1.00 Sep, 2021) DEV_ID [31:28] indicates product revision. Use this information to populate the revision info for RZ/G2L family. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220121014117.21248-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-21 01:41:17 +00:00
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "ES%u.%u",
eshi, eslo);
} else if (id == &id_rzg2l) {
eshi = ((product >> 28) & 0x0f);
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%u",
eshi);
rev_prefix = "Rev ";
soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's Add support for reading the LSI DEVID register which is present in SYSC block of RZ/G2{L,LC} SoC's. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20210609163717.3083-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-06-09 17:37:16 +01:00
}
soc: renesas: Consolidate product register handling Currently renesas_soc_init() scans the whole device tree up to three times, to find a device node describing a product register. Furthermore, the product register handling for the different variants is very similar, with the major difference being the location of the product bitfield inside the product register. Reduce scanning to a single pass using of_find_matching_node_and_match() instead. Switch to a common handling of product registers, by storing the intrinsics of each product register type in the data field of the corresponding match entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-10 20:00:52 +01:00
if (soc->id &&
((product & id->mask) >> __ffs(id->mask)) != soc->id) {
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
pr_warn("SoC mismatch (product = 0x%x)\n", product);
soc: renesas: Add support for reading product revision for RZ/G2L family As per RZ/G2L HW manual (Rev.1.00 Sep, 2021) DEV_ID [31:28] indicates product revision. Use this information to populate the revision info for RZ/G2L family. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220121014117.21248-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-21 01:41:17 +00:00
ret = -ENODEV;
goto free_soc_dev_attr;
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
}
}
soc: renesas: Add support for reading product revision for RZ/G2L family As per RZ/G2L HW manual (Rev.1.00 Sep, 2021) DEV_ID [31:28] indicates product revision. Use this information to populate the revision info for RZ/G2L family. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220121014117.21248-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-21 01:41:17 +00:00
pr_info("Detected Renesas %s %s %s%s\n", soc_dev_attr->family,
soc_dev_attr->soc_id, rev_prefix, soc_dev_attr->revision ?: "");
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
soc_dev = soc_device_register(soc_dev_attr);
if (IS_ERR(soc_dev)) {
soc: renesas: Add support for reading product revision for RZ/G2L family As per RZ/G2L HW manual (Rev.1.00 Sep, 2021) DEV_ID [31:28] indicates product revision. Use this information to populate the revision info for RZ/G2L family. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220121014117.21248-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-21 01:41:17 +00:00
ret = PTR_ERR(soc_dev);
goto free_soc_dev_attr;
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
}
return 0;
soc: renesas: Add support for reading product revision for RZ/G2L family As per RZ/G2L HW manual (Rev.1.00 Sep, 2021) DEV_ID [31:28] indicates product revision. Use this information to populate the revision info for RZ/G2L family. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220121014117.21248-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-21 01:41:17 +00:00
free_soc_dev_attr:
kfree(soc_dev_attr->revision);
kfree_const(soc_dev_attr->soc_id);
kfree_const(soc_dev_attr->family);
kfree(soc_dev_attr);
return ret;
soc: renesas: Identify SoC and register with the SoC bus Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-14 19:37:08 +01:00
}
soc: renesas: Register SoC device early The r8a7795 SYSC driver manages PM Domains, and thus is initialized from an early_initcall(). However, this means the driver cannot check the SoC revision, as the SoC device hasn't been registered yet. Change renesas_soc_init() from a core_initcall() to an early_initcall() to fix this (renesas-soc.o is listed before rcar-sysc.o in the Makefile). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-31 11:01:54 +02:00
early_initcall(renesas_soc_init);
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