93 lines
3.9 KiB
C
93 lines
3.9 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2017, The Linux Foundation. All rights reserved.
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*/
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#ifndef QCOM_PHY_QMP_QSERDES_TXRX_V4_H_
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#define QCOM_PHY_QMP_QSERDES_TXRX_V4_H_
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/* Only for QMP V4 PHY - TX registers */
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#define QSERDES_V4_TX_CLKBUF_ENABLE 0x008
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#define QSERDES_V4_TX_TX_EMP_POST1_LVL 0x00c
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#define QSERDES_V4_TX_TX_DRV_LVL 0x014
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#define QSERDES_V4_TX_RESET_TSYNC_EN 0x01c
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#define QSERDES_V4_TX_PRE_STALL_LDO_BOOST_EN 0x020
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#define QSERDES_V4_TX_TX_BAND 0x024
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#define QSERDES_V4_TX_INTERFACE_SELECT 0x02c
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#define QSERDES_V4_TX_RES_CODE_LANE_TX 0x034
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#define QSERDES_V4_TX_RES_CODE_LANE_RX 0x038
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#define QSERDES_V4_TX_RES_CODE_LANE_OFFSET_TX 0x03c
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#define QSERDES_V4_TX_RES_CODE_LANE_OFFSET_RX 0x040
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#define QSERDES_V4_TX_TRANSCEIVER_BIAS_EN 0x054
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#define QSERDES_V4_TX_HIGHZ_DRVR_EN 0x058
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#define QSERDES_V4_TX_TX_POL_INV 0x05c
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#define QSERDES_V4_TX_PARRATE_REC_DETECT_IDLE_EN 0x060
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#define QSERDES_V4_TX_LANE_MODE_1 0x084
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#define QSERDES_V4_TX_LANE_MODE_2 0x088
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#define QSERDES_V4_TX_RCV_DETECT_LVL_2 0x09c
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#define QSERDES_V4_TX_TRAN_DRVR_EMP_EN 0x0b8
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#define QSERDES_V4_TX_TX_INTERFACE_MODE 0x0bc
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#define QSERDES_V4_TX_PWM_GEAR_1_DIVIDER_BAND0_1 0x0d8
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#define QSERDES_V4_TX_PWM_GEAR_2_DIVIDER_BAND0_1 0x0dc
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#define QSERDES_V4_TX_PWM_GEAR_3_DIVIDER_BAND0_1 0x0e0
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#define QSERDES_V4_TX_PWM_GEAR_4_DIVIDER_BAND0_1 0x0e4
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#define QSERDES_V4_TX_VMODE_CTRL1 0x0e8
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#define QSERDES_V4_TX_PI_QEC_CTRL 0x104
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/* Only for QMP V4 PHY - RX registers */
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#define QSERDES_V4_RX_UCDR_FO_GAIN 0x008
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#define QSERDES_V4_RX_UCDR_SO_GAIN 0x014
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#define QSERDES_V4_RX_UCDR_FASTLOCK_FO_GAIN 0x030
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#define QSERDES_V4_RX_UCDR_SO_SATURATION_AND_ENABLE 0x034
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#define QSERDES_V4_RX_UCDR_FASTLOCK_COUNT_LOW 0x03c
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#define QSERDES_V4_RX_UCDR_FASTLOCK_COUNT_HIGH 0x040
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#define QSERDES_V4_RX_UCDR_PI_CONTROLS 0x044
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#define QSERDES_V4_RX_UCDR_PI_CTRL2 0x048
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#define QSERDES_V4_RX_UCDR_SB2_THRESH1 0x04c
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#define QSERDES_V4_RX_UCDR_SB2_THRESH2 0x050
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#define QSERDES_V4_RX_UCDR_SB2_GAIN1 0x054
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#define QSERDES_V4_RX_UCDR_SB2_GAIN2 0x058
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#define QSERDES_V4_RX_AUX_DATA_TCOARSE_TFINE 0x060
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#define QSERDES_V4_RX_RCLK_AUXDATA_SEL 0x064
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#define QSERDES_V4_RX_AC_JTAG_ENABLE 0x068
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#define QSERDES_V4_RX_AC_JTAG_MODE 0x078
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#define QSERDES_V4_RX_RX_TERM_BW 0x080
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#define QSERDES_V4_RX_VGA_CAL_CNTRL1 0x0d4
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#define QSERDES_V4_RX_VGA_CAL_CNTRL2 0x0d8
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#define QSERDES_V4_RX_GM_CAL 0x0dc
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#define QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL1 0x0e8
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#define QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL2 0x0ec
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#define QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL3 0x0f0
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#define QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL4 0x0f4
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#define QSERDES_V4_RX_RX_IDAC_TSETTLE_LOW 0x0f8
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#define QSERDES_V4_RX_RX_IDAC_TSETTLE_HIGH 0x0fc
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#define QSERDES_V4_RX_RX_IDAC_MEASURE_TIME 0x100
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#define QSERDES_V4_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x110
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#define QSERDES_V4_RX_RX_OFFSET_ADAPTOR_CNTRL2 0x114
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#define QSERDES_V4_RX_SIGDET_ENABLES 0x118
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#define QSERDES_V4_RX_SIGDET_CNTRL 0x11c
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#define QSERDES_V4_RX_SIGDET_LVL 0x120
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#define QSERDES_V4_RX_SIGDET_DEGLITCH_CNTRL 0x124
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#define QSERDES_V4_RX_RX_BAND 0x128
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#define QSERDES_V4_RX_RX_MODE_00_LOW 0x170
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#define QSERDES_V4_RX_RX_MODE_00_HIGH 0x174
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#define QSERDES_V4_RX_RX_MODE_00_HIGH2 0x178
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#define QSERDES_V4_RX_RX_MODE_00_HIGH3 0x17c
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#define QSERDES_V4_RX_RX_MODE_00_HIGH4 0x180
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#define QSERDES_V4_RX_RX_MODE_01_LOW 0x184
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#define QSERDES_V4_RX_RX_MODE_01_HIGH 0x188
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#define QSERDES_V4_RX_RX_MODE_01_HIGH2 0x18c
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#define QSERDES_V4_RX_RX_MODE_01_HIGH3 0x190
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#define QSERDES_V4_RX_RX_MODE_01_HIGH4 0x194
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#define QSERDES_V4_RX_RX_MODE_10_LOW 0x198
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#define QSERDES_V4_RX_RX_MODE_10_HIGH 0x19c
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#define QSERDES_V4_RX_RX_MODE_10_HIGH2 0x1a0
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#define QSERDES_V4_RX_RX_MODE_10_HIGH3 0x1a4
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#define QSERDES_V4_RX_RX_MODE_10_HIGH4 0x1a8
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#define QSERDES_V4_RX_DFE_EN_TIMER 0x1b4
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#define QSERDES_V4_RX_DFE_CTLE_POST_CAL_OFFSET 0x1b8
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#define QSERDES_V4_RX_DCC_CTRL1 0x1bc
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#define QSERDES_V4_RX_VTH_CODE 0x1c4
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#endif
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