2020-02-10 13:41:28 +05:30
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id : "http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml#"
$schema : "http://devicetree.org/meta-schemas/core.yaml#"
title : Device tree binding for NVIDIA Tegra XUSB device mode controller (XUDC)
description :
The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and
USB 3.0 SuperSpeed protocols.
maintainers :
- Nagarjuna Kristam <nkristam@nvidia.com>
- JC Kuo <jckuo@nvidia.com>
- Thierry Reding <treding@nvidia.com>
properties :
compatible :
items :
- enum :
- nvidia,tegra210-xudc # For Tegra210
- nvidia,tegra186-xudc # For Tegra186
2020-05-04 12:04:39 +05:30
- nvidia,tegra194-xudc # For Tegra194
2020-02-10 13:41:28 +05:30
reg :
minItems : 2
maxItems : 3
items :
- description : XUSB device controller registers
- description : XUSB device PCI Config registers
- description : XUSB device registers.
reg-names :
minItems : 2
maxItems : 3
items :
- const : base
- const : fpci
- const : ipfs
interrupts :
maxItems : 1
description : Must contain the XUSB device interrupt.
clocks :
minItems : 4
maxItems : 5
items :
- description : Clock to enable core XUSB dev clock.
- description : Clock to enable XUSB super speed clock.
- description : Clock to enable XUSB super speed dev clock.
- description : Clock to enable XUSB high speed dev clock.
- description : Clock to enable XUSB full speed dev clock.
clock-names :
minItems : 4
maxItems : 5
items :
2020-04-20 21:24:47 -05:00
- const : dev
- const : ss
- const : ss_src
- const : fs_src
- const : hs_src
2020-02-10 13:41:28 +05:30
power-domains :
items :
- description : XUSBB(device) power-domain
- description : XUSBA(superspeed) power-domain
power-domain-names :
items :
- const : dev
- const : ss
nvidia,xusb-padctl :
$ref : /schemas/types.yaml#/definitions/phandle-array
description :
phandle to the XUSB pad controller that is used to configure the USB pads
used by the XUDC controller.
phys :
minItems : 1
description :
Must contain an entry for each entry in phy-names.
See ../phy/phy-bindings.txt for details.
phy-names :
minItems : 1
items :
- const : usb2-0
- const : usb2-1
- const : usb2-2
- const : usb2-3
- const : usb3-0
- const : usb3-1
- const : usb3-2
- const : usb3-3
avddio-usb-supply :
description : PCIe/USB3 analog logic power supply. Must supply 1.05 V.
hvdd-usb-supply :
description : USB controller power supply. Must supply 3.3 V.
required :
- compatible
- reg
- reg-names
- interrupts
- clocks
- clock-names
- power-domains
- power-domain-names
- nvidia,xusb-padctl
- phys
- phy-names
allOf :
- if :
properties :
compatible :
contains :
enum :
- nvidia,tegra210-xudc
then :
properties :
reg :
minItems : 3
reg-names :
minItems : 3
clocks :
minItems : 5
clock-names :
minItems : 5
required :
- avddio-usb-supply
- hvdd-usb-supply
- if :
properties :
compatible :
contains :
enum :
- nvidia,tegra186-xudc
2020-05-04 12:04:39 +05:30
- nvidia,tegra194-xudc
2020-02-10 13:41:28 +05:30
then :
properties :
reg :
maxItems : 2
reg-names :
maxItems : 2
clocks :
maxItems : 4
clock-names :
maxItems : 4
2020-10-02 18:41:43 -05:00
additionalProperties : false
2020-02-10 13:41:28 +05:30
examples :
- |
#include <dt-bindings/clock/tegra210-car.h>
#include <dt-bindings/gpio/tegra-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
usb@700d0000 {
compatible = "nvidia,tegra210-xudc";
2020-05-12 15:45:43 -05:00
reg = <0x700d0000 0x8000>,
<0x700d8000 0x1000>,
<0x700d9000 0x1000>;
2020-02-10 13:41:28 +05:30
reg-names = "base", "fpci", "ipfs";
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>,
<&tegra_car TEGRA210_CLK_XUSB_SS>,
<&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_HS_SRC>;
clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src";
power-domains = <&pd_xusbdev>, <&pd_xusbss>;
power-domain-names = "dev", "ss";
nvidia,xusb-padctl = <&padctl>;
phys = <µ_b>;
phy-names = "usb2-0";
avddio-usb-supply = <&vdd_pex_1v05>;
hvdd-usb-supply = <&vdd_3v3_sys>;
};