89 lines
1.6 KiB
ArmAsm
89 lines
1.6 KiB
ArmAsm
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* TOC (Transfer of Control) handler. */
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.level 1.1
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#include <asm/assembly.h>
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#include <asm/psw.h>
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#include <linux/threads.h>
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#include <linux/linkage.h>
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.text
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.import toc_intr,code
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.import toc_lock,data
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.align 16
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ENTRY_CFI(toc_handler)
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/*
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* synchronize CPUs and obtain offset
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* for stack setup.
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*/
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load32 PA(toc_lock),%r1
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0: ldcw,co 0(%r1),%r2
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cmpib,= 0,%r2,0b
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nop
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addi 1,%r2,%r4
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stw %r4,0(%r1)
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addi -1,%r2,%r4
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load32 PA(toc_stack),%sp
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/*
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* deposit CPU number into stack address,
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* so every CPU will have its own stack.
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*/
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SHLREG %r4,14,%r4
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add %r4,%sp,%sp
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/*
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* setup pt_regs on stack and save the
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* floating point registers. PIM_TOC doesn't
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* save fp registers, so we're doing it here.
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*/
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copy %sp,%arg0
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ldo PT_SZ_ALGN(%sp), %sp
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/* clear pt_regs */
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copy %arg0,%r1
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0: cmpb,<<,n %r1,%sp,0b
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stw,ma %r0,4(%r1)
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ldo PT_FR0(%arg0),%r25
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save_fp %r25
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/* go virtual */
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load32 PA(swapper_pg_dir),%r4
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mtctl %r4,%cr24
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mtctl %r4,%cr25
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/* Clear sr4-sr7 */
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mtsp %r0, %sr4
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mtsp %r0, %sr5
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mtsp %r0, %sr6
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mtsp %r0, %sr7
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tovirt_r1 %sp
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tovirt_r1 %arg0
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virt_map
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loadgp
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#ifdef CONFIG_64BIT
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ldo -16(%sp),%r29
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#endif
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load32 toc_intr,%r1
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be 0(%sr7,%r1)
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nop
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ENDPROC_CFI(toc_handler)
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/*
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* keep this checksum here, as it is part of the toc_handler
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* spanned by toc_handler_size (all words in toc_handler are
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* added in PDC and the sum must equal to zero.
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*/
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SYM_DATA(toc_handler_csum, .long 0)
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SYM_DATA(toc_handler_size, .long . - toc_handler)
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__PAGE_ALIGNED_BSS
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.align 64
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SYM_DATA(toc_stack, .block 16384*NR_CPUS)
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