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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
* CXL Flash Device Driver
*
* Written by : Matthew R . Ochs < mrochs @ linux . vnet . ibm . com > , IBM Corporation
* Uma Krishnan < ukrishn @ linux . vnet . ibm . com > , IBM Corporation
*
* Copyright ( C ) 2018 IBM Corporation
*/
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# define OCXL_MAX_IRQS 4 /* Max interrupts per process */
struct ocxlflash_irqs {
int hwirq ;
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u32 virq ;
void __iomem * vtrig ;
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} ;
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/* OCXL hardware AFU associated with the host */
struct ocxl_hw_afu {
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struct ocxlflash_context * ocxl_ctx ; /* Host context */
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struct pci_dev * pdev ; /* PCI device */
struct device * dev ; /* Generic device */
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bool perst_same_image ; /* Same image loaded on perst */
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struct ocxl_fn_config fcfg ; /* DVSEC config of the function */
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struct ocxl_afu_config acfg ; /* AFU configuration data */
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int fn_actag_base ; /* Function acTag base */
int fn_actag_enabled ; /* Function acTag number enabled */
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int afu_actag_base ; /* AFU acTag base */
int afu_actag_enabled ; /* AFU acTag number enabled */
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phys_addr_t ppmmio_phys ; /* Per process MMIO space */
phys_addr_t gmmio_phys ; /* Global AFU MMIO space */
void __iomem * gmmio_virt ; /* Global MMIO map */
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void * link_token ; /* Link token for the SPA */
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struct idr idr ; /* IDR to manage contexts */
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int max_pasid ; /* Maximum number of contexts */
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bool is_present ; /* Function has AFUs defined */
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} ;
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enum ocxlflash_ctx_state {
CLOSED ,
OPENED ,
STARTED
} ;
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struct ocxlflash_context {
struct ocxl_hw_afu * hw_afu ; /* HW AFU back pointer */
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struct address_space * mapping ; /* Mapping for pseudo filesystem */
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bool master ; /* Whether this is a master context */
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int pe ; /* Process element */
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phys_addr_t psn_phys ; /* Process mapping */
u64 psn_size ; /* Process mapping size */
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spinlock_t slock ; /* Protects irq/fault/event updates */
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wait_queue_head_t wq ; /* Wait queue for poll and interrupts */
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struct mutex state_mutex ; /* Mutex to update context state */
enum ocxlflash_ctx_state state ; /* Context state */
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struct ocxlflash_irqs * irqs ; /* Pointer to array of structures */
int num_irqs ; /* Number of interrupts */
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bool pending_irq ; /* Pending interrupt on the context */
ulong irq_bitmap ; /* Bits indicating pending irq num */
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u64 fault_addr ; /* Address that triggered the fault */
u64 fault_dsisr ; /* Value of dsisr register at fault */
bool pending_fault ; /* Pending translation fault */
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} ;