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linux/drivers/clk/sunxi-ng/ccu_nkm.c

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-27 09:55:01 +03:00
// SPDX-License-Identifier: GPL-2.0-or-later
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
/*
* Copyright (C) 2016 Maxime Ripard
* Maxime Ripard <maxime.ripard@free-electrons.com>
*/
#include <linux/clk-provider.h>
clk: Remove io.h from clk-provider.h Now that we've gotten rid of clk_readl() we can remove io.h from the clk-provider header and push out the io.h include to any code that isn't already including the io.h header but using things like readl/writel, etc. Found with this grep: git grep -l clk-provider.h | grep '.c$' | xargs git grep -L 'linux/io.h' | \ xargs git grep -l \ -e '\<__iowrite32_copy\>' --or \ -e '\<__ioread32_copy\>' --or \ -e '\<__iowrite64_copy\>' --or \ -e '\<ioremap_page_range\>' --or \ -e '\<ioremap_huge_init\>' --or \ -e '\<arch_ioremap_pud_supported\>' --or \ -e '\<arch_ioremap_pmd_supported\>' --or \ -e '\<devm_ioport_map\>' --or \ -e '\<devm_ioport_unmap\>' --or \ -e '\<IOMEM_ERR_PTR\>' --or \ -e '\<devm_ioremap\>' --or \ -e '\<devm_ioremap_nocache\>' --or \ -e '\<devm_ioremap_wc\>' --or \ -e '\<devm_iounmap\>' --or \ -e '\<devm_ioremap_release\>' --or \ -e '\<devm_memremap\>' --or \ -e '\<devm_memunmap\>' --or \ -e '\<__devm_memremap_pages\>' --or \ -e '\<pci_remap_cfgspace\>' --or \ -e '\<arch_has_dev_port\>' --or \ -e '\<arch_phys_wc_add\>' --or \ -e '\<arch_phys_wc_del\>' --or \ -e '\<memremap\>' --or \ -e '\<memunmap\>' --or \ -e '\<arch_io_reserve_memtype_wc\>' --or \ -e '\<arch_io_free_memtype_wc\>' --or \ -e '\<__io_aw\>' --or \ -e '\<__io_pbw\>' --or \ -e '\<__io_paw\>' --or \ -e '\<__io_pbr\>' --or \ -e '\<__io_par\>' --or \ -e '\<__raw_readb\>' --or \ -e '\<__raw_readw\>' --or \ -e '\<__raw_readl\>' --or \ -e '\<__raw_readq\>' --or \ -e '\<__raw_writeb\>' --or \ -e '\<__raw_writew\>' --or \ -e '\<__raw_writel\>' --or \ -e '\<__raw_writeq\>' --or \ -e '\<readb\>' --or \ -e '\<readw\>' --or \ -e '\<readl\>' --or \ -e '\<readq\>' --or \ -e '\<writeb\>' --or \ -e '\<writew\>' --or \ -e '\<writel\>' --or \ -e '\<writeq\>' --or \ -e '\<readb_relaxed\>' --or \ -e '\<readw_relaxed\>' --or \ -e '\<readl_relaxed\>' --or \ -e '\<readq_relaxed\>' --or \ -e '\<writeb_relaxed\>' --or \ -e '\<writew_relaxed\>' --or \ -e '\<writel_relaxed\>' --or \ -e '\<writeq_relaxed\>' --or \ -e '\<readsb\>' --or \ -e '\<readsw\>' --or \ -e '\<readsl\>' --or \ -e '\<readsq\>' --or \ -e '\<writesb\>' --or \ -e '\<writesw\>' --or \ -e '\<writesl\>' --or \ -e '\<writesq\>' --or \ -e '\<inb\>' --or \ -e '\<inw\>' --or \ -e '\<inl\>' --or \ -e '\<outb\>' --or \ -e '\<outw\>' --or \ -e '\<outl\>' --or \ -e '\<inb_p\>' --or \ -e '\<inw_p\>' --or \ -e '\<inl_p\>' --or \ -e '\<outb_p\>' --or \ -e '\<outw_p\>' --or \ -e '\<outl_p\>' --or \ -e '\<insb\>' --or \ -e '\<insw\>' --or \ -e '\<insl\>' --or \ -e '\<outsb\>' --or \ -e '\<outsw\>' --or \ -e '\<outsl\>' --or \ -e '\<insb_p\>' --or \ -e '\<insw_p\>' --or \ -e '\<insl_p\>' --or \ -e '\<outsb_p\>' --or \ -e '\<outsw_p\>' --or \ -e '\<outsl_p\>' --or \ -e '\<ioread8\>' --or \ -e '\<ioread16\>' --or \ -e '\<ioread32\>' --or \ -e '\<ioread64\>' --or \ -e '\<iowrite8\>' --or \ -e '\<iowrite16\>' --or \ -e '\<iowrite32\>' --or \ -e '\<iowrite64\>' --or \ -e '\<ioread16be\>' --or \ -e '\<ioread32be\>' --or \ -e '\<ioread64be\>' --or \ -e '\<iowrite16be\>' --or \ -e '\<iowrite32be\>' --or \ -e '\<iowrite64be\>' --or \ -e '\<ioread8_rep\>' --or \ -e '\<ioread16_rep\>' --or \ -e '\<ioread32_rep\>' --or \ -e '\<ioread64_rep\>' --or \ -e '\<iowrite8_rep\>' --or \ -e '\<iowrite16_rep\>' --or \ -e '\<iowrite32_rep\>' --or \ -e '\<iowrite64_rep\>' --or \ -e '\<__io_virt\>' --or \ -e '\<pci_iounmap\>' --or \ -e '\<virt_to_phys\>' --or \ -e '\<phys_to_virt\>' --or \ -e '\<ioremap_uc\>' --or \ -e '\<ioremap\>' --or \ -e '\<__ioremap\>' --or \ -e '\<iounmap\>' --or \ -e '\<ioremap\>' --or \ -e '\<ioremap_nocache\>' --or \ -e '\<ioremap_uc\>' --or \ -e '\<ioremap_wc\>' --or \ -e '\<ioremap_wc\>' --or \ -e '\<ioremap_wt\>' --or \ -e '\<ioport_map\>' --or \ -e '\<ioport_unmap\>' --or \ -e '\<ioport_map\>' --or \ -e '\<ioport_unmap\>' --or \ -e '\<xlate_dev_kmem_ptr\>' --or \ -e '\<xlate_dev_mem_ptr\>' --or \ -e '\<unxlate_dev_mem_ptr\>' --or \ -e '\<virt_to_bus\>' --or \ -e '\<bus_to_virt\>' --or \ -e '\<memset_io\>' --or \ -e '\<memcpy_fromio\>' --or \ -e '\<memcpy_toio\>' I also reordered a couple includes when they weren't alphabetical and removed clk.h from kona, replacing it with clk-provider.h because that driver doesn't use clk consumer APIs. Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Sekhar Nori <nsekhar@ti.com> Cc: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Mark Brown <broonie@kernel.org> Cc: Chris Zankel <chris@zankel.net> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: John Crispin <john@phrozen.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-19 01:20:22 +03:00
#include <linux/io.h>
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
#include "ccu_gate.h"
#include "ccu_nkm.h"
struct _ccu_nkm {
clk: sunxi-ng: Add minimums for all the relevant structures and clocks Modify the current clocks we have to be able to specify the minimum for each clocks we support, just like we support the max. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-29 23:57:26 +03:00
unsigned long n, min_n, max_n;
unsigned long k, min_k, max_k;
unsigned long m, min_m, max_m;
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
};
clk: sunxi-ng: nkm: Support constraints on m/n ratio and parent rate The Allwinner A64 manual lists the following constraints for the PLL-MIPI clock: - M/N <= 3 - (PLL_VIDEO0)/M >= 24MHz The PLL-MIPI clock is implemented as ccu_nkm. Therefore, add support for these constraints. Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Link: https://lore.kernel.org/r/20240310-pinephone-pll-fixes-v4-3-46fc80c83637@oltmanns.dev Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2024-03-10 16:21:13 +03:00
static bool ccu_nkm_is_valid_rate(struct ccu_common *common, unsigned long parent,
unsigned long n, unsigned long m)
{
struct ccu_nkm *nkm = container_of(common, struct ccu_nkm, common);
if (nkm->max_m_n_ratio && (m > nkm->max_m_n_ratio * n))
return false;
if (nkm->min_parent_m_ratio && (parent < nkm->min_parent_m_ratio * m))
return false;
return true;
}
clk: sunxi-ng: nkm: Support finding closest rate When finding the best rate for a NKM clock, consider rates that are higher than the requested rate, if the CCU_FEATURE_CLOSEST_RATE flag is set by using the helper function ccu_is_better_rate(). Accommodate ccu_mux_helper_determine_rate to this change. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-7-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:40 +03:00
static unsigned long ccu_nkm_find_best_with_parent_adj(struct ccu_common *common,
struct clk_hw *parent_hw,
clk: sunxi-ng: nkm: consider alternative parent rates when determining rate In case the CLK_SET_RATE_PARENT flag is set, consider using a different parent rate when determining a new rate. To find the best match for the requested rate, perform the following steps for each NKM combination: - calculate the optimal parent rate, - find the best parent rate that the parent clock actually supports - use that parent rate to calculate the effective rate. In case the clk does not support setting the parent rate, use the same algorithm as before. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-2-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:35 +03:00
unsigned long *parent, unsigned long rate,
struct _ccu_nkm *nkm)
{
clk: sunxi-ng: nkm: remove redundant initialization of tmp_parent Variable tmp_parent is being ininitialized with a value that is never read, the initialization is redundant and can be removed. Move the initialization and move the variable to the inner loop scope. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20231023133502.666559-1-colin.i.king@gmail.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-10-23 16:35:02 +03:00
unsigned long best_rate = 0, best_parent_rate = *parent;
clk: sunxi-ng: nkm: consider alternative parent rates when determining rate In case the CLK_SET_RATE_PARENT flag is set, consider using a different parent rate when determining a new rate. To find the best match for the requested rate, perform the following steps for each NKM combination: - calculate the optimal parent rate, - find the best parent rate that the parent clock actually supports - use that parent rate to calculate the effective rate. In case the clk does not support setting the parent rate, use the same algorithm as before. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-2-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:35 +03:00
unsigned long best_n = 0, best_k = 0, best_m = 0;
unsigned long _n, _k, _m;
for (_k = nkm->min_k; _k <= nkm->max_k; _k++) {
for (_n = nkm->min_n; _n <= nkm->max_n; _n++) {
for (_m = nkm->min_m; _m <= nkm->max_m; _m++) {
clk: sunxi-ng: nkm: remove redundant initialization of tmp_parent Variable tmp_parent is being ininitialized with a value that is never read, the initialization is redundant and can be removed. Move the initialization and move the variable to the inner loop scope. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20231023133502.666559-1-colin.i.king@gmail.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-10-23 16:35:02 +03:00
unsigned long tmp_rate, tmp_parent;
clk: sunxi-ng: nkm: consider alternative parent rates when determining rate In case the CLK_SET_RATE_PARENT flag is set, consider using a different parent rate when determining a new rate. To find the best match for the requested rate, perform the following steps for each NKM combination: - calculate the optimal parent rate, - find the best parent rate that the parent clock actually supports - use that parent rate to calculate the effective rate. In case the clk does not support setting the parent rate, use the same algorithm as before. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-2-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:35 +03:00
tmp_parent = clk_hw_round_rate(parent_hw, rate * _m / (_n * _k));
clk: sunxi-ng: nkm: Support constraints on m/n ratio and parent rate The Allwinner A64 manual lists the following constraints for the PLL-MIPI clock: - M/N <= 3 - (PLL_VIDEO0)/M >= 24MHz The PLL-MIPI clock is implemented as ccu_nkm. Therefore, add support for these constraints. Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Link: https://lore.kernel.org/r/20240310-pinephone-pll-fixes-v4-3-46fc80c83637@oltmanns.dev Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2024-03-10 16:21:13 +03:00
if (!ccu_nkm_is_valid_rate(common, tmp_parent, _n, _m))
continue;
clk: sunxi-ng: nkm: consider alternative parent rates when determining rate In case the CLK_SET_RATE_PARENT flag is set, consider using a different parent rate when determining a new rate. To find the best match for the requested rate, perform the following steps for each NKM combination: - calculate the optimal parent rate, - find the best parent rate that the parent clock actually supports - use that parent rate to calculate the effective rate. In case the clk does not support setting the parent rate, use the same algorithm as before. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-2-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:35 +03:00
tmp_rate = tmp_parent * _n * _k / _m;
clk: sunxi-ng: nkm: Prefer current parent rate Similar to ccu_mp, if the current parent rate allows getting the ideal rate, prefer to not change the parent clock's rate. Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-11-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:44 +03:00
if (ccu_is_better_rate(common, rate, tmp_rate, best_rate) ||
(tmp_parent == *parent && tmp_rate == best_rate)) {
clk: sunxi-ng: nkm: consider alternative parent rates when determining rate In case the CLK_SET_RATE_PARENT flag is set, consider using a different parent rate when determining a new rate. To find the best match for the requested rate, perform the following steps for each NKM combination: - calculate the optimal parent rate, - find the best parent rate that the parent clock actually supports - use that parent rate to calculate the effective rate. In case the clk does not support setting the parent rate, use the same algorithm as before. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-2-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:35 +03:00
best_rate = tmp_rate;
best_parent_rate = tmp_parent;
best_n = _n;
best_k = _k;
best_m = _m;
}
}
}
}
nkm->n = best_n;
nkm->k = best_k;
nkm->m = best_m;
*parent = best_parent_rate;
return best_rate;
}
clk: sunxi-ng: Avoid computing the rate twice The ccu_*_find_best() functions already compute a best_rate at the same time as the other factors. Return this value so the caller does not need to duplicate the computation. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20221231173055.42384-1-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-12-31 20:30:55 +03:00
static unsigned long ccu_nkm_find_best(unsigned long parent, unsigned long rate,
clk: sunxi-ng: nkm: Support finding closest rate When finding the best rate for a NKM clock, consider rates that are higher than the requested rate, if the CCU_FEATURE_CLOSEST_RATE flag is set by using the helper function ccu_is_better_rate(). Accommodate ccu_mux_helper_determine_rate to this change. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-7-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:40 +03:00
struct _ccu_nkm *nkm, struct ccu_common *common)
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
{
unsigned long best_rate = 0;
unsigned long best_n = 0, best_k = 0, best_m = 0;
unsigned long _n, _k, _m;
clk: sunxi-ng: Add minimums for all the relevant structures and clocks Modify the current clocks we have to be able to specify the minimum for each clocks we support, just like we support the max. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-29 23:57:26 +03:00
for (_k = nkm->min_k; _k <= nkm->max_k; _k++) {
for (_n = nkm->min_n; _n <= nkm->max_n; _n++) {
for (_m = nkm->min_m; _m <= nkm->max_m; _m++) {
clk: sunxi-ng: nkm: Support constraints on m/n ratio and parent rate The Allwinner A64 manual lists the following constraints for the PLL-MIPI clock: - M/N <= 3 - (PLL_VIDEO0)/M >= 24MHz The PLL-MIPI clock is implemented as ccu_nkm. Therefore, add support for these constraints. Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Link: https://lore.kernel.org/r/20240310-pinephone-pll-fixes-v4-3-46fc80c83637@oltmanns.dev Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2024-03-10 16:21:13 +03:00
if (!ccu_nkm_is_valid_rate(common, parent, _n, _m))
continue;
clk: sunxi-ng: Remove the use of rational computations While the rational library works great, it doesn't really allow us to add more constraints, like the minimum. Remove that in order to be able to deal with the constraints we'll need. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-29 23:53:12 +03:00
unsigned long tmp_rate;
tmp_rate = parent * _n * _k / _m;
clk: sunxi-ng: nkm: Support finding closest rate When finding the best rate for a NKM clock, consider rates that are higher than the requested rate, if the CCU_FEATURE_CLOSEST_RATE flag is set by using the helper function ccu_is_better_rate(). Accommodate ccu_mux_helper_determine_rate to this change. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-7-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:40 +03:00
if (ccu_is_better_rate(common, rate, tmp_rate, best_rate)) {
clk: sunxi-ng: Remove the use of rational computations While the rational library works great, it doesn't really allow us to add more constraints, like the minimum. Remove that in order to be able to deal with the constraints we'll need. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-29 23:53:12 +03:00
best_rate = tmp_rate;
best_n = _n;
best_k = _k;
best_m = _m;
}
}
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
}
}
nkm->n = best_n;
nkm->k = best_k;
nkm->m = best_m;
clk: sunxi-ng: Avoid computing the rate twice The ccu_*_find_best() functions already compute a best_rate at the same time as the other factors. Return this value so the caller does not need to duplicate the computation. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20221231173055.42384-1-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-12-31 20:30:55 +03:00
return best_rate;
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
}
static void ccu_nkm_disable(struct clk_hw *hw)
{
struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
return ccu_gate_helper_disable(&nkm->common, nkm->enable);
}
static int ccu_nkm_enable(struct clk_hw *hw)
{
struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
return ccu_gate_helper_enable(&nkm->common, nkm->enable);
}
static int ccu_nkm_is_enabled(struct clk_hw *hw)
{
struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
return ccu_gate_helper_is_enabled(&nkm->common, nkm->enable);
}
static unsigned long ccu_nkm_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
clk: sunxi-ng: nkm: add support for fixed post-divider SATA PLL on Allwinner R40 is of type (parent) * N * K / M / 6 where 6 is the fixed post-divider. Add post-divider support for NKM type clock. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [wens@csie.org: Fixed application of post-divider in set_rate callback] Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-08-12 15:43:51 +03:00
unsigned long n, m, k, rate;
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
u32 reg;
reg = readl(nkm->common.base + nkm->common.reg);
n = reg >> nkm->n.shift;
n &= (1 << nkm->n.width) - 1;
clk: sunxi-ng: Implement factors offsets The factors we've seen so far all had an offset of one. However, on the earlier Allwinner SoCs, some factors could have no offset at all, meaning that the value computed to reach the rate we want to use was the one we had to program in the registers. Implement an additional field for the factors that can have such an offset (linears, not based on a power of two) to specify that offset. This offset is not linked to the extremums that can be specified in those structures too. The minimum and maximum are representing the range of values we can use to try to compute the best rate. The offset comes later on when we want to set the best value in the registers. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-11-08 20:12:34 +03:00
n += nkm->n.offset;
if (!n)
n++;
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
k = reg >> nkm->k.shift;
k &= (1 << nkm->k.width) - 1;
clk: sunxi-ng: Implement factors offsets The factors we've seen so far all had an offset of one. However, on the earlier Allwinner SoCs, some factors could have no offset at all, meaning that the value computed to reach the rate we want to use was the one we had to program in the registers. Implement an additional field for the factors that can have such an offset (linears, not based on a power of two) to specify that offset. This offset is not linked to the extremums that can be specified in those structures too. The minimum and maximum are representing the range of values we can use to try to compute the best rate. The offset comes later on when we want to set the best value in the registers. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-11-08 20:12:34 +03:00
k += nkm->k.offset;
if (!k)
k++;
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
m = reg >> nkm->m.shift;
m &= (1 << nkm->m.width) - 1;
clk: sunxi-ng: Implement factors offsets The factors we've seen so far all had an offset of one. However, on the earlier Allwinner SoCs, some factors could have no offset at all, meaning that the value computed to reach the rate we want to use was the one we had to program in the registers. Implement an additional field for the factors that can have such an offset (linears, not based on a power of two) to specify that offset. This offset is not linked to the extremums that can be specified in those structures too. The minimum and maximum are representing the range of values we can use to try to compute the best rate. The offset comes later on when we want to set the best value in the registers. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-11-08 20:12:34 +03:00
m += nkm->m.offset;
if (!m)
m++;
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
clk: sunxi-ng: nkm: add support for fixed post-divider SATA PLL on Allwinner R40 is of type (parent) * N * K / M / 6 where 6 is the fixed post-divider. Add post-divider support for NKM type clock. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [wens@csie.org: Fixed application of post-divider in set_rate callback] Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-08-12 15:43:51 +03:00
rate = parent_rate * n * k / m;
if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate /= nkm->fixed_post_div;
return rate;
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
}
clk: sunxi-ng: nkm: Add mux to support multiple parents The MIPI mode of the MIPI-PLL on A31 is an NKM-style PLL with 2 selectable parents. Add mux support to the NKM clock. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-26 10:04:28 +03:00
static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
clk: sunxi-ng: nkm: Use correct parameter name for parent HW ccu_nkm_round_rate() takes a clk_hw as parameter "hw". Since "hw" is the nkm clock's parent clk_hw, not the clk_hw of the nkm clock itself, change the parameter name to "parent_hw" to make it more clear what we're dealing with. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-1-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:34 +03:00
struct clk_hw *parent_hw,
clk: sunxi-ng: Pass the parent and a pointer to the clocks round rate The clocks might need to modify their parent clocks. In order to make that possible, give them access to the parent clock being evaluated, and to a pointer to the parent rate so that they can modify it if needed. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-05-17 10:40:31 +03:00
unsigned long *parent_rate,
clk: sunxi-ng: nkm: Add mux to support multiple parents The MIPI mode of the MIPI-PLL on A31 is an NKM-style PLL with 2 selectable parents. Add mux support to the NKM clock. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-26 10:04:28 +03:00
unsigned long rate,
void *data)
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
{
clk: sunxi-ng: nkm: Add mux to support multiple parents The MIPI mode of the MIPI-PLL on A31 is an NKM-style PLL with 2 selectable parents. Add mux support to the NKM clock. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-26 10:04:28 +03:00
struct ccu_nkm *nkm = data;
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
struct _ccu_nkm _nkm;
clk: sunxi-ng: use 1 as fallback for minimum multiplier A zero multiplier does not make sense for clocks. Use 1 as the minimum when a multiplier minimum isn't specified. Fixes: 2beaa601c849 ("clk: sunxi-ng: Implement minimum for multipliers") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-24 11:33:05 +03:00
_nkm.min_n = nkm->n.min ?: 1;
clk: sunxi-ng: Implement multiplier maximum Some multipliers have a maximum rate that is lower than what the register width allows to. Add a field in the multiplier structure to allow CCU driver to set that maximum. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-14 13:08:19 +03:00
_nkm.max_n = nkm->n.max ?: 1 << nkm->n.width;
clk: sunxi-ng: use 1 as fallback for minimum multiplier A zero multiplier does not make sense for clocks. Use 1 as the minimum when a multiplier minimum isn't specified. Fixes: 2beaa601c849 ("clk: sunxi-ng: Implement minimum for multipliers") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-24 11:33:05 +03:00
_nkm.min_k = nkm->k.min ?: 1;
clk: sunxi-ng: Implement multiplier maximum Some multipliers have a maximum rate that is lower than what the register width allows to. Add a field in the multiplier structure to allow CCU driver to set that maximum. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-14 13:08:19 +03:00
_nkm.max_k = nkm->k.max ?: 1 << nkm->k.width;
clk: sunxi-ng: Add minimums for all the relevant structures and clocks Modify the current clocks we have to be able to specify the minimum for each clocks we support, just like we support the max. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-29 23:57:26 +03:00
_nkm.min_m = 1;
clk: sunxi-ng: div: Allow to set a maximum Some dividers might have a maximum value that is lower than the width of the register. Add a field to _ccu_div to handle those case properly. If the field is set to 0, the code will assume that the maximum value is the maximum one that can be used with the field register width. Otherwise, we'll use whatever value has been set. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-06 13:29:04 +03:00
_nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
clk: sunxi-ng: nkm: add support for fixed post-divider SATA PLL on Allwinner R40 is of type (parent) * N * K / M / 6 where 6 is the fixed post-divider. Add post-divider support for NKM type clock. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [wens@csie.org: Fixed application of post-divider in set_rate callback] Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-08-12 15:43:51 +03:00
if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate *= nkm->fixed_post_div;
clk: sunxi-ng: nkm: consider alternative parent rates when determining rate In case the CLK_SET_RATE_PARENT flag is set, consider using a different parent rate when determining a new rate. To find the best match for the requested rate, perform the following steps for each NKM combination: - calculate the optimal parent rate, - find the best parent rate that the parent clock actually supports - use that parent rate to calculate the effective rate. In case the clk does not support setting the parent rate, use the same algorithm as before. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-2-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:35 +03:00
if (!clk_hw_can_set_rate_parent(&nkm->common.hw))
clk: sunxi-ng: nkm: Support finding closest rate When finding the best rate for a NKM clock, consider rates that are higher than the requested rate, if the CCU_FEATURE_CLOSEST_RATE flag is set by using the helper function ccu_is_better_rate(). Accommodate ccu_mux_helper_determine_rate to this change. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-7-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:40 +03:00
rate = ccu_nkm_find_best(*parent_rate, rate, &_nkm, &nkm->common);
clk: sunxi-ng: nkm: consider alternative parent rates when determining rate In case the CLK_SET_RATE_PARENT flag is set, consider using a different parent rate when determining a new rate. To find the best match for the requested rate, perform the following steps for each NKM combination: - calculate the optimal parent rate, - find the best parent rate that the parent clock actually supports - use that parent rate to calculate the effective rate. In case the clk does not support setting the parent rate, use the same algorithm as before. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-2-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:35 +03:00
else
clk: sunxi-ng: nkm: Support finding closest rate When finding the best rate for a NKM clock, consider rates that are higher than the requested rate, if the CCU_FEATURE_CLOSEST_RATE flag is set by using the helper function ccu_is_better_rate(). Accommodate ccu_mux_helper_determine_rate to this change. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-7-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:40 +03:00
rate = ccu_nkm_find_best_with_parent_adj(&nkm->common, parent_hw, parent_rate, rate,
&_nkm);
clk: sunxi-ng: nkm: add support for fixed post-divider SATA PLL on Allwinner R40 is of type (parent) * N * K / M / 6 where 6 is the fixed post-divider. Add post-divider support for NKM type clock. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [wens@csie.org: Fixed application of post-divider in set_rate callback] Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-08-12 15:43:51 +03:00
if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate /= nkm->fixed_post_div;
return rate;
clk: sunxi-ng: nkm: Add mux to support multiple parents The MIPI mode of the MIPI-PLL on A31 is an NKM-style PLL with 2 selectable parents. Add mux support to the NKM clock. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-26 10:04:28 +03:00
}
static int ccu_nkm_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
return ccu_mux_helper_determine_rate(&nkm->common, &nkm->mux,
req, ccu_nkm_round_rate, nkm);
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
}
static int ccu_nkm_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
struct _ccu_nkm _nkm;
unsigned long flags;
u32 reg;
clk: sunxi-ng: nkm: add support for fixed post-divider SATA PLL on Allwinner R40 is of type (parent) * N * K / M / 6 where 6 is the fixed post-divider. Add post-divider support for NKM type clock. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [wens@csie.org: Fixed application of post-divider in set_rate callback] Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-08-12 15:43:51 +03:00
if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate *= nkm->fixed_post_div;
clk: sunxi-ng: use 1 as fallback for minimum multiplier A zero multiplier does not make sense for clocks. Use 1 as the minimum when a multiplier minimum isn't specified. Fixes: 2beaa601c849 ("clk: sunxi-ng: Implement minimum for multipliers") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-24 11:33:05 +03:00
_nkm.min_n = nkm->n.min ?: 1;
clk: sunxi-ng: Implement multiplier maximum Some multipliers have a maximum rate that is lower than what the register width allows to. Add a field in the multiplier structure to allow CCU driver to set that maximum. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-14 13:08:19 +03:00
_nkm.max_n = nkm->n.max ?: 1 << nkm->n.width;
clk: sunxi-ng: use 1 as fallback for minimum multiplier A zero multiplier does not make sense for clocks. Use 1 as the minimum when a multiplier minimum isn't specified. Fixes: 2beaa601c849 ("clk: sunxi-ng: Implement minimum for multipliers") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-24 11:33:05 +03:00
_nkm.min_k = nkm->k.min ?: 1;
clk: sunxi-ng: Implement multiplier maximum Some multipliers have a maximum rate that is lower than what the register width allows to. Add a field in the multiplier structure to allow CCU driver to set that maximum. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-14 13:08:19 +03:00
_nkm.max_k = nkm->k.max ?: 1 << nkm->k.width;
clk: sunxi-ng: Add minimums for all the relevant structures and clocks Modify the current clocks we have to be able to specify the minimum for each clocks we support, just like we support the max. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-29 23:57:26 +03:00
_nkm.min_m = 1;
clk: sunxi-ng: div: Allow to set a maximum Some dividers might have a maximum value that is lower than the width of the register. Add a field to _ccu_div to handle those case properly. If the field is set to 0, the code will assume that the maximum value is the maximum one that can be used with the field register width. Otherwise, we'll use whatever value has been set. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-06 13:29:04 +03:00
_nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
clk: sunxi-ng: nkm: Support finding closest rate When finding the best rate for a NKM clock, consider rates that are higher than the requested rate, if the CCU_FEATURE_CLOSEST_RATE flag is set by using the helper function ccu_is_better_rate(). Accommodate ccu_mux_helper_determine_rate to this change. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-7-f173239a4b59@oltmanns.dev Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-07 15:43:40 +03:00
ccu_nkm_find_best(parent_rate, rate, &_nkm, &nkm->common);
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
spin_lock_irqsave(nkm->common.lock, flags);
reg = readl(nkm->common.base + nkm->common.reg);
reg &= ~GENMASK(nkm->n.width + nkm->n.shift - 1, nkm->n.shift);
reg &= ~GENMASK(nkm->k.width + nkm->k.shift - 1, nkm->k.shift);
reg &= ~GENMASK(nkm->m.width + nkm->m.shift - 1, nkm->m.shift);
clk: sunxi-ng: Implement factors offsets The factors we've seen so far all had an offset of one. However, on the earlier Allwinner SoCs, some factors could have no offset at all, meaning that the value computed to reach the rate we want to use was the one we had to program in the registers. Implement an additional field for the factors that can have such an offset (linears, not based on a power of two) to specify that offset. This offset is not linked to the extremums that can be specified in those structures too. The minimum and maximum are representing the range of values we can use to try to compute the best rate. The offset comes later on when we want to set the best value in the registers. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-11-08 20:12:34 +03:00
reg |= (_nkm.n - nkm->n.offset) << nkm->n.shift;
reg |= (_nkm.k - nkm->k.offset) << nkm->k.shift;
reg |= (_nkm.m - nkm->m.offset) << nkm->m.shift;
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
writel(reg, nkm->common.base + nkm->common.reg);
spin_unlock_irqrestore(nkm->common.lock, flags);
ccu_helper_wait_for_lock(&nkm->common, nkm->lock);
return 0;
}
clk: sunxi-ng: nkm: Add mux to support multiple parents The MIPI mode of the MIPI-PLL on A31 is an NKM-style PLL with 2 selectable parents. Add mux support to the NKM clock. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-26 10:04:28 +03:00
static u8 ccu_nkm_get_parent(struct clk_hw *hw)
{
struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
return ccu_mux_helper_get_parent(&nkm->common, &nkm->mux);
}
static int ccu_nkm_set_parent(struct clk_hw *hw, u8 index)
{
struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
return ccu_mux_helper_set_parent(&nkm->common, &nkm->mux, index);
}
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
const struct clk_ops ccu_nkm_ops = {
.disable = ccu_nkm_disable,
.enable = ccu_nkm_enable,
.is_enabled = ccu_nkm_is_enabled,
clk: sunxi-ng: nkm: Add mux to support multiple parents The MIPI mode of the MIPI-PLL on A31 is an NKM-style PLL with 2 selectable parents. Add mux support to the NKM clock. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-26 10:04:28 +03:00
.get_parent = ccu_nkm_get_parent,
.set_parent = ccu_nkm_set_parent,
.determine_rate = ccu_nkm_determine_rate,
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 22:05:32 +03:00
.recalc_rate = ccu_nkm_recalc_rate,
.set_rate = ccu_nkm_set_rate,
};
clk: sunxi-ng: Export symbols used by CCU drivers For the individual CCU drivers to be built as modules, the ops structs, helper functions, and callback registration functions must be exported. These symbols are intended for use only by the adjacent CCU drivers, so export them into the SUNXI_CCU namespace. of_sunxi_ccu_probe is not exported because it is only used by built-in OF clock providers. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211119033338.25486-2-samuel@sholland.org
2021-11-19 06:33:34 +03:00
EXPORT_SYMBOL_NS_GPL(ccu_nkm_ops, SUNXI_CCU);
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