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// SPDX-License-Identifier: GPL-2.0+
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/*
* CAAM / SEC 4. x transport / backend driver
* JobR backend functionality
*
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* Copyright 2008 - 2012 Freescale Semiconductor , Inc .
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* Copyright 2019 , 2023 NXP
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*/
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# include <linux/of_irq.h>
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# include <linux/of_address.h>
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# include <linux/platform_device.h>
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# include "compat.h"
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# include "ctrl.h"
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# include "regs.h"
# include "jr.h"
# include "desc.h"
# include "intern.h"
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struct jr_driver_data {
/* List of Physical JobR's with the Driver */
struct list_head jr_list ;
spinlock_t jr_alloc_lock ; /* jr_list lock */
} ____cacheline_aligned ;
static struct jr_driver_data driver_data ;
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static DEFINE_MUTEX ( algs_lock ) ;
static unsigned int active_devs ;
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static void register_algs ( struct caam_drv_private_jr * jrpriv ,
struct device * dev )
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{
mutex_lock ( & algs_lock ) ;
if ( + + active_devs ! = 1 )
goto algs_unlock ;
caam_algapi_init ( dev ) ;
caam_algapi_hash_init ( dev ) ;
caam_pkc_init ( dev ) ;
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jrpriv - > hwrng = ! caam_rng_init ( dev ) ;
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caam_prng_register ( dev ) ;
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caam_qi_algapi_init ( dev ) ;
algs_unlock :
mutex_unlock ( & algs_lock ) ;
}
static void unregister_algs ( void )
{
mutex_lock ( & algs_lock ) ;
if ( - - active_devs ! = 0 )
goto algs_unlock ;
caam_qi_algapi_exit ( ) ;
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caam_prng_unregister ( NULL ) ;
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caam_pkc_exit ( ) ;
caam_algapi_hash_exit ( ) ;
caam_algapi_exit ( ) ;
algs_unlock :
mutex_unlock ( & algs_lock ) ;
}
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static void caam_jr_crypto_engine_exit ( void * data )
{
struct device * jrdev = data ;
struct caam_drv_private_jr * jrpriv = dev_get_drvdata ( jrdev ) ;
/* Free the resources of crypto-engine */
crypto_engine_exit ( jrpriv - > engine ) ;
}
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/*
* Put the CAAM in quiesce , ie stop
*
* Must be called with itr disabled
*/
static int caam_jr_stop_processing ( struct device * dev , u32 jrcr_bits )
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{
struct caam_drv_private_jr * jrp = dev_get_drvdata ( dev ) ;
unsigned int timeout = 100000 ;
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/* Check the current status */
if ( rd_reg32 ( & jrp - > rregs - > jrintstatus ) & JRINT_ERR_HALT_INPROGRESS )
goto wait_quiesce_completion ;
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/* Reset the field */
clrsetbits_32 ( & jrp - > rregs - > jrintstatus , JRINT_ERR_HALT_MASK , 0 ) ;
/* initiate flush / park (required prior to reset) */
wr_reg32 ( & jrp - > rregs - > jrcommand , jrcr_bits ) ;
wait_quiesce_completion :
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while ( ( ( rd_reg32 ( & jrp - > rregs - > jrintstatus ) & JRINT_ERR_HALT_MASK ) = =
JRINT_ERR_HALT_INPROGRESS ) & & - - timeout )
cpu_relax ( ) ;
if ( ( rd_reg32 ( & jrp - > rregs - > jrintstatus ) & JRINT_ERR_HALT_MASK ) ! =
JRINT_ERR_HALT_COMPLETE | | timeout = = 0 ) {
dev_err ( dev , " failed to flush job ring %d \n " , jrp - > ridx ) ;
return - EIO ;
}
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return 0 ;
}
/*
* Flush the job ring , so the jobs running will be stopped , jobs queued will be
* invalidated and the CAAM will no longer fetch fron input ring .
*
* Must be called with itr disabled
*/
static int caam_jr_flush ( struct device * dev )
{
return caam_jr_stop_processing ( dev , JRCR_RESET ) ;
}
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/* The resume can be used after a park or a flush if CAAM has not been reset */
static int caam_jr_restart_processing ( struct device * dev )
{
struct caam_drv_private_jr * jrp = dev_get_drvdata ( dev ) ;
u32 halt_status = rd_reg32 ( & jrp - > rregs - > jrintstatus ) &
JRINT_ERR_HALT_MASK ;
/* Check that the flush/park is completed */
if ( halt_status ! = JRINT_ERR_HALT_COMPLETE )
return - 1 ;
/* Resume processing of jobs */
clrsetbits_32 ( & jrp - > rregs - > jrintstatus , 0 , JRINT_ERR_HALT_COMPLETE ) ;
return 0 ;
}
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static int caam_reset_hw_jr ( struct device * dev )
{
struct caam_drv_private_jr * jrp = dev_get_drvdata ( dev ) ;
unsigned int timeout = 100000 ;
int err ;
/*
* mask interrupts since we are going to poll
* for reset completion status
*/
clrsetbits_32 ( & jrp - > rregs - > rconfig_lo , 0 , JRCFG_IMSK ) ;
err = caam_jr_flush ( dev ) ;
if ( err )
return err ;
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/* initiate reset */
wr_reg32 ( & jrp - > rregs - > jrcommand , JRCR_RESET ) ;
while ( ( rd_reg32 ( & jrp - > rregs - > jrcommand ) & JRCR_RESET ) & & - - timeout )
cpu_relax ( ) ;
if ( timeout = = 0 ) {
dev_err ( dev , " failed to reset job ring %d \n " , jrp - > ridx ) ;
return - EIO ;
}
/* unmask interrupts */
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clrsetbits_32 ( & jrp - > rregs - > rconfig_lo , JRCFG_IMSK , 0 ) ;
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return 0 ;
}
/*
* Shutdown JobR independent of platform property code
*/
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static int caam_jr_shutdown ( struct device * dev )
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{
struct caam_drv_private_jr * jrp = dev_get_drvdata ( dev ) ;
int ret ;
ret = caam_reset_hw_jr ( dev ) ;
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tasklet_kill ( & jrp - > irqtask ) ;
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return ret ;
}
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static void caam_jr_remove ( struct platform_device * pdev )
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{
int ret ;
struct device * jrdev ;
struct caam_drv_private_jr * jrpriv ;
jrdev = & pdev - > dev ;
jrpriv = dev_get_drvdata ( jrdev ) ;
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if ( jrpriv - > hwrng )
caam_rng_exit ( jrdev - > parent ) ;
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/*
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* If a job ring is still allocated there is trouble ahead . Once
* caam_jr_remove ( ) returned , jrpriv will be freed and the registers
* will get unmapped . So any user of such a job ring will probably
* crash .
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*/
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if ( atomic_read ( & jrpriv - > tfm_count ) ) {
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dev_alert ( jrdev , " Device is busy; consumers might start to crash \n " ) ;
return ;
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}
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/* Unregister JR-based RNG & crypto algorithms */
unregister_algs ( ) ;
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/* Remove the node from Physical JobR list maintained by driver */
spin_lock ( & driver_data . jr_alloc_lock ) ;
list_del ( & jrpriv - > list_node ) ;
spin_unlock ( & driver_data . jr_alloc_lock ) ;
/* Release ring */
ret = caam_jr_shutdown ( jrdev ) ;
if ( ret )
dev_err ( jrdev , " Failed to shut down job ring \n " ) ;
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}
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/* Main per-ring interrupt handler */
static irqreturn_t caam_jr_interrupt ( int irq , void * st_dev )
{
struct device * dev = st_dev ;
struct caam_drv_private_jr * jrp = dev_get_drvdata ( dev ) ;
u32 irqstate ;
/*
* Check the output ring for ready responses , kick
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* tasklet if jobs done .
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*/
irqstate = rd_reg32 ( & jrp - > rregs - > jrintstatus ) ;
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if ( ! ( irqstate & JRINT_JR_INT ) )
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return IRQ_NONE ;
/*
* If JobR error , we got more development work to do
* Flag a bug now , but we really need to shut down and
* restart the queue ( and fix code ) .
*/
if ( irqstate & JRINT_JR_ERROR ) {
dev_err ( dev , " job ring error: irqstate: %08x \n " , irqstate ) ;
BUG ( ) ;
}
/* mask valid interrupts */
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clrsetbits_32 ( & jrp - > rregs - > rconfig_lo , 0 , JRCFG_IMSK ) ;
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/* Have valid interrupt at this point, just ACK and trigger */
wr_reg32 ( & jrp - > rregs - > jrintstatus , irqstate ) ;
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preempt_disable ( ) ;
tasklet_schedule ( & jrp - > irqtask ) ;
preempt_enable ( ) ;
return IRQ_HANDLED ;
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}
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/* Deferred service handler, run as interrupt-fired tasklet */
static void caam_jr_dequeue ( unsigned long devarg )
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{
int hw_idx , sw_idx , i , head , tail ;
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struct caam_jr_dequeue_params * params = ( void * ) devarg ;
struct device * dev = params - > dev ;
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struct caam_drv_private_jr * jrp = dev_get_drvdata ( dev ) ;
void ( * usercall ) ( struct device * dev , u32 * desc , u32 status , void * arg ) ;
u32 * userdesc , userstatus ;
void * userarg ;
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u32 outring_used = 0 ;
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while ( outring_used | |
( outring_used = rd_reg32 ( & jrp - > rregs - > outring_used ) ) ) {
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locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE() patterns to READ_ONCE()/WRITE_ONCE()
Please do not apply this to mainline directly, instead please re-run the
coccinelle script shown below and apply its output.
For several reasons, it is desirable to use {READ,WRITE}_ONCE() in
preference to ACCESS_ONCE(), and new code is expected to use one of the
former. So far, there's been no reason to change most existing uses of
ACCESS_ONCE(), as these aren't harmful, and changing them results in
churn.
However, for some features, the read/write distinction is critical to
correct operation. To distinguish these cases, separate read/write
accessors must be used. This patch migrates (most) remaining
ACCESS_ONCE() instances to {READ,WRITE}_ONCE(), using the following
coccinelle script:
----
// Convert trivial ACCESS_ONCE() uses to equivalent READ_ONCE() and
// WRITE_ONCE()
// $ make coccicheck COCCI=/home/mark/once.cocci SPFLAGS="--include-headers" MODE=patch
virtual patch
@ depends on patch @
expression E1, E2;
@@
- ACCESS_ONCE(E1) = E2
+ WRITE_ONCE(E1, E2)
@ depends on patch @
expression E;
@@
- ACCESS_ONCE(E)
+ READ_ONCE(E)
----
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: davem@davemloft.net
Cc: linux-arch@vger.kernel.org
Cc: mpe@ellerman.id.au
Cc: shuah@kernel.org
Cc: snitzer@redhat.com
Cc: thor.thayer@linux.intel.com
Cc: tj@kernel.org
Cc: viro@zeniv.linux.org.uk
Cc: will.deacon@arm.com
Link: http://lkml.kernel.org/r/1508792849-3115-19-git-send-email-paulmck@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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head = READ_ONCE ( jrp - > head ) ;
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sw_idx = tail = jrp - > tail ;
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hw_idx = jrp - > out_ring_read_index ;
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for ( i = 0 ; CIRC_CNT ( head , tail + i , JOBR_DEPTH ) > = 1 ; i + + ) {
sw_idx = ( tail + i ) & ( JOBR_DEPTH - 1 ) ;
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if ( jr_outentry_desc ( jrp - > outring , hw_idx ) = =
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caam_dma_to_cpu ( jrp - > entinfo [ sw_idx ] . desc_addr_dma ) )
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break ; /* found */
}
/* we should never fail to find a matching descriptor */
BUG_ON ( CIRC_CNT ( head , tail + i , JOBR_DEPTH ) < = 0 ) ;
/* Unmap just-run descriptor so we can post-process */
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dma_unmap_single ( dev ,
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caam_dma_to_cpu ( jr_outentry_desc ( jrp - > outring ,
hw_idx ) ) ,
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jrp - > entinfo [ sw_idx ] . desc_size ,
DMA_TO_DEVICE ) ;
/* mark completed, avoid matching on a recycled desc addr */
jrp - > entinfo [ sw_idx ] . desc_addr_dma = 0 ;
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/* Stash callback params */
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usercall = jrp - > entinfo [ sw_idx ] . callbk ;
userarg = jrp - > entinfo [ sw_idx ] . cbkarg ;
userdesc = jrp - > entinfo [ sw_idx ] . desc_addr_virt ;
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userstatus = caam32_to_cpu ( jr_outentry_jrstatus ( jrp - > outring ,
hw_idx ) ) ;
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/*
* Make sure all information from the job has been obtained
* before telling CAAM that the job has been removed from the
* output ring .
*/
mb ( ) ;
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/* set done */
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wr_reg32 ( & jrp - > rregs - > outring_rmvd , 1 ) ;
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jrp - > out_ring_read_index = ( jrp - > out_ring_read_index + 1 ) &
( JOBR_DEPTH - 1 ) ;
/*
* if this job completed out - of - order , do not increment
* the tail . Otherwise , increment tail by 1 plus the
* number of subsequent jobs already completed out - of - order
*/
if ( sw_idx = = tail ) {
do {
tail = ( tail + 1 ) & ( JOBR_DEPTH - 1 ) ;
} while ( CIRC_CNT ( head , tail , JOBR_DEPTH ) > = 1 & &
jrp - > entinfo [ tail ] . desc_addr_dma = = 0 ) ;
jrp - > tail = tail ;
}
/* Finally, execute user's callback */
usercall ( dev , userdesc , userstatus , userarg ) ;
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outring_used - - ;
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}
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if ( params - > enable_itr )
/* reenable / unmask IRQs */
clrsetbits_32 ( & jrp - > rregs - > rconfig_lo , JRCFG_IMSK , 0 ) ;
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}
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/**
* caam_jr_alloc ( ) - Alloc a job ring for someone to use as needed .
*
* returns : pointer to the newly allocated physical
* JobR dev can be written to if successful .
* */
struct device * caam_jr_alloc ( void )
{
struct caam_drv_private_jr * jrpriv , * min_jrpriv = NULL ;
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struct device * dev = ERR_PTR ( - ENODEV ) ;
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int min_tfm_cnt = INT_MAX ;
int tfm_cnt ;
spin_lock ( & driver_data . jr_alloc_lock ) ;
if ( list_empty ( & driver_data . jr_list ) ) {
spin_unlock ( & driver_data . jr_alloc_lock ) ;
return ERR_PTR ( - ENODEV ) ;
}
list_for_each_entry ( jrpriv , & driver_data . jr_list , list_node ) {
tfm_cnt = atomic_read ( & jrpriv - > tfm_count ) ;
if ( tfm_cnt < min_tfm_cnt ) {
min_tfm_cnt = tfm_cnt ;
min_jrpriv = jrpriv ;
}
if ( ! min_tfm_cnt )
break ;
}
if ( min_jrpriv ) {
atomic_inc ( & min_jrpriv - > tfm_count ) ;
dev = min_jrpriv - > dev ;
}
spin_unlock ( & driver_data . jr_alloc_lock ) ;
return dev ;
}
EXPORT_SYMBOL ( caam_jr_alloc ) ;
/**
* caam_jr_free ( ) - Free the Job Ring
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* @ rdev : points to the dev that identifies the Job ring to
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* be released .
* */
void caam_jr_free ( struct device * rdev )
{
struct caam_drv_private_jr * jrpriv = dev_get_drvdata ( rdev ) ;
atomic_dec ( & jrpriv - > tfm_count ) ;
}
EXPORT_SYMBOL ( caam_jr_free ) ;
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/**
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* caam_jr_enqueue ( ) - Enqueue a job descriptor head . Returns - EINPROGRESS
* if OK , - ENOSPC if the queue is full , - EIO if it cannot map the caller ' s
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* descriptor .
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* @ dev : struct device of the job ring to be used
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* @ desc : points to a job descriptor that execute our request . All
* descriptors ( and all referenced data ) must be in a DMAable
* region , and all data references must be physical addresses
* accessible to CAAM ( i . e . within a PAMU window granted
* to it ) .
* @ cbk : pointer to a callback function to be invoked upon completion
* of this request . This has the form :
* callback ( struct device * dev , u32 * desc , u32 stat , void * arg )
* where :
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* dev : contains the job ring device that processed this
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* response .
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* desc : descriptor that initiated the request , same as
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* " desc " being argued to caam_jr_enqueue ( ) .
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* status : untranslated status received from CAAM . See the
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* reference manual for a detailed description of
* error meaning , or see the JRSTA definitions in the
* register header file
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* areq : optional pointer to an argument passed with the
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* original request
* @ areq : optional pointer to a user argument for use at callback
* time .
* */
int caam_jr_enqueue ( struct device * dev , u32 * desc ,
void ( * cbk ) ( struct device * dev , u32 * desc ,
u32 status , void * areq ) ,
void * areq )
{
struct caam_drv_private_jr * jrp = dev_get_drvdata ( dev ) ;
struct caam_jrentry_info * head_entry ;
int head , tail , desc_size ;
dma_addr_t desc_dma ;
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desc_size = ( caam32_to_cpu ( * desc ) & HDR_JD_LENGTH_MASK ) * sizeof ( u32 ) ;
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desc_dma = dma_map_single ( dev , desc , desc_size , DMA_TO_DEVICE ) ;
if ( dma_mapping_error ( dev , desc_dma ) ) {
dev_err ( dev , " caam_jr_enqueue(): can't map jobdesc \n " ) ;
return - EIO ;
}
crypto: caam - fix possible deadlock condition
commit "crypto: caam - use non-irq versions of spinlocks for job rings"
made two bad assumptions:
(a) The caam_jr_enqueue lock isn't used in softirq context.
Not true: jr_enqueue can be interrupted by an incoming net
interrupt and the received packet may be sent for encryption,
via caam_jr_enqueue in softirq context, thereby inducing a
deadlock.
This is evidenced when running netperf over an IPSec tunnel
between two P4080's, with spinlock debugging turned on:
[ 892.092569] BUG: spinlock lockup on CPU#7, netperf/10634, e8bf5f70
[ 892.098747] Call Trace:
[ 892.101197] [eff9fc10] [c00084c0] show_stack+0x48/0x15c (unreliable)
[ 892.107563] [eff9fc50] [c0239c2c] do_raw_spin_lock+0x16c/0x174
[ 892.113399] [eff9fc80] [c0596494] _raw_spin_lock+0x3c/0x50
[ 892.118889] [eff9fc90] [c0445e74] caam_jr_enqueue+0xf8/0x250
[ 892.124550] [eff9fcd0] [c044a644] aead_decrypt+0x6c/0xc8
[ 892.129625] BUG: spinlock lockup on CPU#5, swapper/5/0, e8bf5f70
[ 892.129629] Call Trace:
[ 892.129637] [effa7c10] [c00084c0] show_stack+0x48/0x15c (unreliable)
[ 892.129645] [effa7c50] [c0239c2c] do_raw_spin_lock+0x16c/0x174
[ 892.129652] [effa7c80] [c0596494] _raw_spin_lock+0x3c/0x50
[ 892.129660] [effa7c90] [c0445e74] caam_jr_enqueue+0xf8/0x250
[ 892.129666] [effa7cd0] [c044a644] aead_decrypt+0x6c/0xc8
[ 892.129674] [effa7d00] [c0509724] esp_input+0x178/0x334
[ 892.129681] [effa7d50] [c0519778] xfrm_input+0x77c/0x818
[ 892.129688] [effa7da0] [c050e344] xfrm4_rcv_encap+0x20/0x30
[ 892.129697] [effa7db0] [c04b90c8] ip_local_deliver+0x190/0x408
[ 892.129703] [effa7de0] [c04b966c] ip_rcv+0x32c/0x898
[ 892.129709] [effa7e10] [c048b998] __netif_receive_skb+0x27c/0x4e8
[ 892.129715] [effa7e80] [c048d744] netif_receive_skb+0x4c/0x13c
[ 892.129726] [effa7eb0] [c03c28ac] _dpa_rx+0x1a8/0x354
[ 892.129732] [effa7ef0] [c03c2ac4] ingress_rx_default_dqrr+0x6c/0x108
[ 892.129742] [effa7f10] [c0467ae0] qman_poll_dqrr+0x170/0x1d4
[ 892.129748] [effa7f40] [c03c153c] dpaa_eth_poll+0x20/0x94
[ 892.129754] [effa7f60] [c048dbd0] net_rx_action+0x13c/0x1f4
[ 892.129763] [effa7fa0] [c003d1b8] __do_softirq+0x108/0x1b0
[ 892.129769] [effa7ff0] [c000df58] call_do_softirq+0x14/0x24
[ 892.129775] [ebacfe70] [c0004868] do_softirq+0xd8/0x104
[ 892.129780] [ebacfe90] [c003d5a4] irq_exit+0xb8/0xd8
[ 892.129786] [ebacfea0] [c0004498] do_IRQ+0xa4/0x1b0
[ 892.129792] [ebacfed0] [c000fad8] ret_from_except+0x0/0x18
[ 892.129798] [ebacff90] [c0009010] cpu_idle+0x94/0xf0
[ 892.129804] [ebacffb0] [c059ff88] start_secondary+0x42c/0x430
[ 892.129809] [ebacfff0] [c0001e28] __secondary_start+0x30/0x84
[ 892.281474]
[ 892.282959] [eff9fd00] [c0509724] esp_input+0x178/0x334
[ 892.288186] [eff9fd50] [c0519778] xfrm_input+0x77c/0x818
[ 892.293499] [eff9fda0] [c050e344] xfrm4_rcv_encap+0x20/0x30
[ 892.299074] [eff9fdb0] [c04b90c8] ip_local_deliver+0x190/0x408
[ 892.304907] [eff9fde0] [c04b966c] ip_rcv+0x32c/0x898
[ 892.309872] [eff9fe10] [c048b998] __netif_receive_skb+0x27c/0x4e8
[ 892.315966] [eff9fe80] [c048d744] netif_receive_skb+0x4c/0x13c
[ 892.321803] [eff9feb0] [c03c28ac] _dpa_rx+0x1a8/0x354
[ 892.326855] [eff9fef0] [c03c2ac4] ingress_rx_default_dqrr+0x6c/0x108
[ 892.333212] [eff9ff10] [c0467ae0] qman_poll_dqrr+0x170/0x1d4
[ 892.338872] [eff9ff40] [c03c153c] dpaa_eth_poll+0x20/0x94
[ 892.344271] [eff9ff60] [c048dbd0] net_rx_action+0x13c/0x1f4
[ 892.349846] [eff9ffa0] [c003d1b8] __do_softirq+0x108/0x1b0
[ 892.355338] [eff9fff0] [c000df58] call_do_softirq+0x14/0x24
[ 892.360910] [e7169950] [c0004868] do_softirq+0xd8/0x104
[ 892.366135] [e7169970] [c003d5a4] irq_exit+0xb8/0xd8
[ 892.371101] [e7169980] [c0004498] do_IRQ+0xa4/0x1b0
[ 892.375979] [e71699b0] [c000fad8] ret_from_except+0x0/0x18
[ 892.381466] [e7169a70] [c0445e74] caam_jr_enqueue+0xf8/0x250
[ 892.387127] [e7169ab0] [c044ad4c] aead_givencrypt+0x6ac/0xa70
[ 892.392873] [e7169b20] [c050a0b8] esp_output+0x2b4/0x570
[ 892.398186] [e7169b80] [c0519b9c] xfrm_output_resume+0x248/0x7c0
[ 892.404194] [e7169bb0] [c050e89c] xfrm4_output_finish+0x18/0x28
[ 892.410113] [e7169bc0] [c050e8f4] xfrm4_output+0x48/0x98
[ 892.415427] [e7169bd0] [c04beac0] ip_local_out+0x48/0x98
[ 892.420740] [e7169be0] [c04bec7c] ip_queue_xmit+0x16c/0x490
[ 892.426314] [e7169c10] [c04d6128] tcp_transmit_skb+0x35c/0x9a4
[ 892.432147] [e7169c70] [c04d6f98] tcp_write_xmit+0x200/0xa04
[ 892.437808] [e7169cc0] [c04c8ccc] tcp_sendmsg+0x994/0xcec
[ 892.443213] [e7169d40] [c04eebfc] inet_sendmsg+0xd0/0x164
[ 892.448617] [e7169d70] [c04792f8] sock_sendmsg+0x8c/0xbc
[ 892.453931] [e7169e40] [c047aecc] sys_sendto+0xc0/0xfc
[ 892.459069] [e7169f10] [c047b934] sys_socketcall+0x110/0x25c
[ 892.464729] [e7169f40] [c000f480] ret_from_syscall+0x0/0x3c
(b) since the caam_jr_dequeue lock is only used in bh context,
then semantically it should use _bh spin_lock types. spin_lock_bh
semantics are to disable back-halves, and used when a lock is shared
between softirq (bh) context and process and/or h/w IRQ context.
Since the lock is only used within softirq context, and this tasklet
is atomic, there is no need to do the additional work to disable
back halves.
This patch adds back-half disabling protection to caam_jr_enqueue
spin_locks to fix (a), and drops it from caam_jr_dequeue to fix (b).
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-07-13 18:04:23 -05:00
spin_lock_bh ( & jrp - > inplock ) ;
2011-03-13 16:54:26 +08:00
head = jrp - > head ;
locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE() patterns to READ_ONCE()/WRITE_ONCE()
Please do not apply this to mainline directly, instead please re-run the
coccinelle script shown below and apply its output.
For several reasons, it is desirable to use {READ,WRITE}_ONCE() in
preference to ACCESS_ONCE(), and new code is expected to use one of the
former. So far, there's been no reason to change most existing uses of
ACCESS_ONCE(), as these aren't harmful, and changing them results in
churn.
However, for some features, the read/write distinction is critical to
correct operation. To distinguish these cases, separate read/write
accessors must be used. This patch migrates (most) remaining
ACCESS_ONCE() instances to {READ,WRITE}_ONCE(), using the following
coccinelle script:
----
// Convert trivial ACCESS_ONCE() uses to equivalent READ_ONCE() and
// WRITE_ONCE()
// $ make coccicheck COCCI=/home/mark/once.cocci SPFLAGS="--include-headers" MODE=patch
virtual patch
@ depends on patch @
expression E1, E2;
@@
- ACCESS_ONCE(E1) = E2
+ WRITE_ONCE(E1, E2)
@ depends on patch @
expression E;
@@
- ACCESS_ONCE(E)
+ READ_ONCE(E)
----
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: davem@davemloft.net
Cc: linux-arch@vger.kernel.org
Cc: mpe@ellerman.id.au
Cc: shuah@kernel.org
Cc: snitzer@redhat.com
Cc: thor.thayer@linux.intel.com
Cc: tj@kernel.org
Cc: viro@zeniv.linux.org.uk
Cc: will.deacon@arm.com
Link: http://lkml.kernel.org/r/1508792849-3115-19-git-send-email-paulmck@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-10-23 14:07:29 -07:00
tail = READ_ONCE ( jrp - > tail ) ;
2011-03-13 16:54:26 +08:00
2019-03-05 18:03:14 +00:00
if ( ! jrp - > inpring_avail | |
2011-03-13 16:54:26 +08:00
CIRC_SPACE ( head , tail , JOBR_DEPTH ) < = 0 ) {
crypto: caam - fix possible deadlock condition
commit "crypto: caam - use non-irq versions of spinlocks for job rings"
made two bad assumptions:
(a) The caam_jr_enqueue lock isn't used in softirq context.
Not true: jr_enqueue can be interrupted by an incoming net
interrupt and the received packet may be sent for encryption,
via caam_jr_enqueue in softirq context, thereby inducing a
deadlock.
This is evidenced when running netperf over an IPSec tunnel
between two P4080's, with spinlock debugging turned on:
[ 892.092569] BUG: spinlock lockup on CPU#7, netperf/10634, e8bf5f70
[ 892.098747] Call Trace:
[ 892.101197] [eff9fc10] [c00084c0] show_stack+0x48/0x15c (unreliable)
[ 892.107563] [eff9fc50] [c0239c2c] do_raw_spin_lock+0x16c/0x174
[ 892.113399] [eff9fc80] [c0596494] _raw_spin_lock+0x3c/0x50
[ 892.118889] [eff9fc90] [c0445e74] caam_jr_enqueue+0xf8/0x250
[ 892.124550] [eff9fcd0] [c044a644] aead_decrypt+0x6c/0xc8
[ 892.129625] BUG: spinlock lockup on CPU#5, swapper/5/0, e8bf5f70
[ 892.129629] Call Trace:
[ 892.129637] [effa7c10] [c00084c0] show_stack+0x48/0x15c (unreliable)
[ 892.129645] [effa7c50] [c0239c2c] do_raw_spin_lock+0x16c/0x174
[ 892.129652] [effa7c80] [c0596494] _raw_spin_lock+0x3c/0x50
[ 892.129660] [effa7c90] [c0445e74] caam_jr_enqueue+0xf8/0x250
[ 892.129666] [effa7cd0] [c044a644] aead_decrypt+0x6c/0xc8
[ 892.129674] [effa7d00] [c0509724] esp_input+0x178/0x334
[ 892.129681] [effa7d50] [c0519778] xfrm_input+0x77c/0x818
[ 892.129688] [effa7da0] [c050e344] xfrm4_rcv_encap+0x20/0x30
[ 892.129697] [effa7db0] [c04b90c8] ip_local_deliver+0x190/0x408
[ 892.129703] [effa7de0] [c04b966c] ip_rcv+0x32c/0x898
[ 892.129709] [effa7e10] [c048b998] __netif_receive_skb+0x27c/0x4e8
[ 892.129715] [effa7e80] [c048d744] netif_receive_skb+0x4c/0x13c
[ 892.129726] [effa7eb0] [c03c28ac] _dpa_rx+0x1a8/0x354
[ 892.129732] [effa7ef0] [c03c2ac4] ingress_rx_default_dqrr+0x6c/0x108
[ 892.129742] [effa7f10] [c0467ae0] qman_poll_dqrr+0x170/0x1d4
[ 892.129748] [effa7f40] [c03c153c] dpaa_eth_poll+0x20/0x94
[ 892.129754] [effa7f60] [c048dbd0] net_rx_action+0x13c/0x1f4
[ 892.129763] [effa7fa0] [c003d1b8] __do_softirq+0x108/0x1b0
[ 892.129769] [effa7ff0] [c000df58] call_do_softirq+0x14/0x24
[ 892.129775] [ebacfe70] [c0004868] do_softirq+0xd8/0x104
[ 892.129780] [ebacfe90] [c003d5a4] irq_exit+0xb8/0xd8
[ 892.129786] [ebacfea0] [c0004498] do_IRQ+0xa4/0x1b0
[ 892.129792] [ebacfed0] [c000fad8] ret_from_except+0x0/0x18
[ 892.129798] [ebacff90] [c0009010] cpu_idle+0x94/0xf0
[ 892.129804] [ebacffb0] [c059ff88] start_secondary+0x42c/0x430
[ 892.129809] [ebacfff0] [c0001e28] __secondary_start+0x30/0x84
[ 892.281474]
[ 892.282959] [eff9fd00] [c0509724] esp_input+0x178/0x334
[ 892.288186] [eff9fd50] [c0519778] xfrm_input+0x77c/0x818
[ 892.293499] [eff9fda0] [c050e344] xfrm4_rcv_encap+0x20/0x30
[ 892.299074] [eff9fdb0] [c04b90c8] ip_local_deliver+0x190/0x408
[ 892.304907] [eff9fde0] [c04b966c] ip_rcv+0x32c/0x898
[ 892.309872] [eff9fe10] [c048b998] __netif_receive_skb+0x27c/0x4e8
[ 892.315966] [eff9fe80] [c048d744] netif_receive_skb+0x4c/0x13c
[ 892.321803] [eff9feb0] [c03c28ac] _dpa_rx+0x1a8/0x354
[ 892.326855] [eff9fef0] [c03c2ac4] ingress_rx_default_dqrr+0x6c/0x108
[ 892.333212] [eff9ff10] [c0467ae0] qman_poll_dqrr+0x170/0x1d4
[ 892.338872] [eff9ff40] [c03c153c] dpaa_eth_poll+0x20/0x94
[ 892.344271] [eff9ff60] [c048dbd0] net_rx_action+0x13c/0x1f4
[ 892.349846] [eff9ffa0] [c003d1b8] __do_softirq+0x108/0x1b0
[ 892.355338] [eff9fff0] [c000df58] call_do_softirq+0x14/0x24
[ 892.360910] [e7169950] [c0004868] do_softirq+0xd8/0x104
[ 892.366135] [e7169970] [c003d5a4] irq_exit+0xb8/0xd8
[ 892.371101] [e7169980] [c0004498] do_IRQ+0xa4/0x1b0
[ 892.375979] [e71699b0] [c000fad8] ret_from_except+0x0/0x18
[ 892.381466] [e7169a70] [c0445e74] caam_jr_enqueue+0xf8/0x250
[ 892.387127] [e7169ab0] [c044ad4c] aead_givencrypt+0x6ac/0xa70
[ 892.392873] [e7169b20] [c050a0b8] esp_output+0x2b4/0x570
[ 892.398186] [e7169b80] [c0519b9c] xfrm_output_resume+0x248/0x7c0
[ 892.404194] [e7169bb0] [c050e89c] xfrm4_output_finish+0x18/0x28
[ 892.410113] [e7169bc0] [c050e8f4] xfrm4_output+0x48/0x98
[ 892.415427] [e7169bd0] [c04beac0] ip_local_out+0x48/0x98
[ 892.420740] [e7169be0] [c04bec7c] ip_queue_xmit+0x16c/0x490
[ 892.426314] [e7169c10] [c04d6128] tcp_transmit_skb+0x35c/0x9a4
[ 892.432147] [e7169c70] [c04d6f98] tcp_write_xmit+0x200/0xa04
[ 892.437808] [e7169cc0] [c04c8ccc] tcp_sendmsg+0x994/0xcec
[ 892.443213] [e7169d40] [c04eebfc] inet_sendmsg+0xd0/0x164
[ 892.448617] [e7169d70] [c04792f8] sock_sendmsg+0x8c/0xbc
[ 892.453931] [e7169e40] [c047aecc] sys_sendto+0xc0/0xfc
[ 892.459069] [e7169f10] [c047b934] sys_socketcall+0x110/0x25c
[ 892.464729] [e7169f40] [c000f480] ret_from_syscall+0x0/0x3c
(b) since the caam_jr_dequeue lock is only used in bh context,
then semantically it should use _bh spin_lock types. spin_lock_bh
semantics are to disable back-halves, and used when a lock is shared
between softirq (bh) context and process and/or h/w IRQ context.
Since the lock is only used within softirq context, and this tasklet
is atomic, there is no need to do the additional work to disable
back halves.
This patch adds back-half disabling protection to caam_jr_enqueue
spin_locks to fix (a), and drops it from caam_jr_dequeue to fix (b).
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-07-13 18:04:23 -05:00
spin_unlock_bh ( & jrp - > inplock ) ;
2011-03-13 16:54:26 +08:00
dma_unmap_single ( dev , desc_dma , desc_size , DMA_TO_DEVICE ) ;
2020-02-12 19:55:20 +02:00
return - ENOSPC ;
2011-03-13 16:54:26 +08:00
}
head_entry = & jrp - > entinfo [ head ] ;
head_entry - > desc_addr_virt = desc ;
head_entry - > desc_size = desc_size ;
head_entry - > callbk = ( void * ) cbk ;
head_entry - > cbkarg = areq ;
head_entry - > desc_addr_dma = desc_dma ;
2019-08-20 13:23:58 -07:00
jr_inpentry_set ( jrp - > inpring , head , cpu_to_caam_dma ( desc_dma ) ) ;
2011-03-13 16:54:26 +08:00
2015-08-05 11:28:35 -07:00
/*
* Guarantee that the descriptor ' s DMA address has been written to
* the next slot in the ring before the write index is updated , since
* other cores may update this index independently .
2023-08-08 12:55:26 +02:00
*
* Under heavy DDR load , smp_wmb ( ) or dma_wmb ( ) fail to make the input
* ring be updated before the CAAM starts reading it . So , CAAM will
* process , again , an old descriptor address and will put it in the
* output ring . This will make caam_jr_dequeue ( ) to fail , since this
* old descriptor is not in the software ring .
* To fix this , use wmb ( ) which works on the full system instead of
* inner / outer shareable domains .
2015-08-05 11:28:35 -07:00
*/
2023-08-08 12:55:26 +02:00
wmb ( ) ;
2011-03-13 16:54:26 +08:00
jrp - > head = ( head + 1 ) & ( JOBR_DEPTH - 1 ) ;
2015-08-05 11:28:35 -07:00
/*
* Ensure that all job information has been written before
2019-03-22 02:00:37 +00:00
* notifying CAAM that a new job was added to the input ring
* using a memory barrier . The wr_reg32 ( ) uses api iowrite32 ( )
* to do the register write . iowrite32 ( ) issues a memory barrier
* before the write operation .
2015-08-05 11:28:35 -07:00
*/
2011-03-13 16:54:26 +08:00
wr_reg32 ( & jrp - > rregs - > inpring_jobadd , 1 ) ;
2019-03-05 18:03:14 +00:00
jrp - > inpring_avail - - ;
if ( ! jrp - > inpring_avail )
jrp - > inpring_avail = rd_reg32 ( & jrp - > rregs - > inpring_avail ) ;
crypto: caam - fix possible deadlock condition
commit "crypto: caam - use non-irq versions of spinlocks for job rings"
made two bad assumptions:
(a) The caam_jr_enqueue lock isn't used in softirq context.
Not true: jr_enqueue can be interrupted by an incoming net
interrupt and the received packet may be sent for encryption,
via caam_jr_enqueue in softirq context, thereby inducing a
deadlock.
This is evidenced when running netperf over an IPSec tunnel
between two P4080's, with spinlock debugging turned on:
[ 892.092569] BUG: spinlock lockup on CPU#7, netperf/10634, e8bf5f70
[ 892.098747] Call Trace:
[ 892.101197] [eff9fc10] [c00084c0] show_stack+0x48/0x15c (unreliable)
[ 892.107563] [eff9fc50] [c0239c2c] do_raw_spin_lock+0x16c/0x174
[ 892.113399] [eff9fc80] [c0596494] _raw_spin_lock+0x3c/0x50
[ 892.118889] [eff9fc90] [c0445e74] caam_jr_enqueue+0xf8/0x250
[ 892.124550] [eff9fcd0] [c044a644] aead_decrypt+0x6c/0xc8
[ 892.129625] BUG: spinlock lockup on CPU#5, swapper/5/0, e8bf5f70
[ 892.129629] Call Trace:
[ 892.129637] [effa7c10] [c00084c0] show_stack+0x48/0x15c (unreliable)
[ 892.129645] [effa7c50] [c0239c2c] do_raw_spin_lock+0x16c/0x174
[ 892.129652] [effa7c80] [c0596494] _raw_spin_lock+0x3c/0x50
[ 892.129660] [effa7c90] [c0445e74] caam_jr_enqueue+0xf8/0x250
[ 892.129666] [effa7cd0] [c044a644] aead_decrypt+0x6c/0xc8
[ 892.129674] [effa7d00] [c0509724] esp_input+0x178/0x334
[ 892.129681] [effa7d50] [c0519778] xfrm_input+0x77c/0x818
[ 892.129688] [effa7da0] [c050e344] xfrm4_rcv_encap+0x20/0x30
[ 892.129697] [effa7db0] [c04b90c8] ip_local_deliver+0x190/0x408
[ 892.129703] [effa7de0] [c04b966c] ip_rcv+0x32c/0x898
[ 892.129709] [effa7e10] [c048b998] __netif_receive_skb+0x27c/0x4e8
[ 892.129715] [effa7e80] [c048d744] netif_receive_skb+0x4c/0x13c
[ 892.129726] [effa7eb0] [c03c28ac] _dpa_rx+0x1a8/0x354
[ 892.129732] [effa7ef0] [c03c2ac4] ingress_rx_default_dqrr+0x6c/0x108
[ 892.129742] [effa7f10] [c0467ae0] qman_poll_dqrr+0x170/0x1d4
[ 892.129748] [effa7f40] [c03c153c] dpaa_eth_poll+0x20/0x94
[ 892.129754] [effa7f60] [c048dbd0] net_rx_action+0x13c/0x1f4
[ 892.129763] [effa7fa0] [c003d1b8] __do_softirq+0x108/0x1b0
[ 892.129769] [effa7ff0] [c000df58] call_do_softirq+0x14/0x24
[ 892.129775] [ebacfe70] [c0004868] do_softirq+0xd8/0x104
[ 892.129780] [ebacfe90] [c003d5a4] irq_exit+0xb8/0xd8
[ 892.129786] [ebacfea0] [c0004498] do_IRQ+0xa4/0x1b0
[ 892.129792] [ebacfed0] [c000fad8] ret_from_except+0x0/0x18
[ 892.129798] [ebacff90] [c0009010] cpu_idle+0x94/0xf0
[ 892.129804] [ebacffb0] [c059ff88] start_secondary+0x42c/0x430
[ 892.129809] [ebacfff0] [c0001e28] __secondary_start+0x30/0x84
[ 892.281474]
[ 892.282959] [eff9fd00] [c0509724] esp_input+0x178/0x334
[ 892.288186] [eff9fd50] [c0519778] xfrm_input+0x77c/0x818
[ 892.293499] [eff9fda0] [c050e344] xfrm4_rcv_encap+0x20/0x30
[ 892.299074] [eff9fdb0] [c04b90c8] ip_local_deliver+0x190/0x408
[ 892.304907] [eff9fde0] [c04b966c] ip_rcv+0x32c/0x898
[ 892.309872] [eff9fe10] [c048b998] __netif_receive_skb+0x27c/0x4e8
[ 892.315966] [eff9fe80] [c048d744] netif_receive_skb+0x4c/0x13c
[ 892.321803] [eff9feb0] [c03c28ac] _dpa_rx+0x1a8/0x354
[ 892.326855] [eff9fef0] [c03c2ac4] ingress_rx_default_dqrr+0x6c/0x108
[ 892.333212] [eff9ff10] [c0467ae0] qman_poll_dqrr+0x170/0x1d4
[ 892.338872] [eff9ff40] [c03c153c] dpaa_eth_poll+0x20/0x94
[ 892.344271] [eff9ff60] [c048dbd0] net_rx_action+0x13c/0x1f4
[ 892.349846] [eff9ffa0] [c003d1b8] __do_softirq+0x108/0x1b0
[ 892.355338] [eff9fff0] [c000df58] call_do_softirq+0x14/0x24
[ 892.360910] [e7169950] [c0004868] do_softirq+0xd8/0x104
[ 892.366135] [e7169970] [c003d5a4] irq_exit+0xb8/0xd8
[ 892.371101] [e7169980] [c0004498] do_IRQ+0xa4/0x1b0
[ 892.375979] [e71699b0] [c000fad8] ret_from_except+0x0/0x18
[ 892.381466] [e7169a70] [c0445e74] caam_jr_enqueue+0xf8/0x250
[ 892.387127] [e7169ab0] [c044ad4c] aead_givencrypt+0x6ac/0xa70
[ 892.392873] [e7169b20] [c050a0b8] esp_output+0x2b4/0x570
[ 892.398186] [e7169b80] [c0519b9c] xfrm_output_resume+0x248/0x7c0
[ 892.404194] [e7169bb0] [c050e89c] xfrm4_output_finish+0x18/0x28
[ 892.410113] [e7169bc0] [c050e8f4] xfrm4_output+0x48/0x98
[ 892.415427] [e7169bd0] [c04beac0] ip_local_out+0x48/0x98
[ 892.420740] [e7169be0] [c04bec7c] ip_queue_xmit+0x16c/0x490
[ 892.426314] [e7169c10] [c04d6128] tcp_transmit_skb+0x35c/0x9a4
[ 892.432147] [e7169c70] [c04d6f98] tcp_write_xmit+0x200/0xa04
[ 892.437808] [e7169cc0] [c04c8ccc] tcp_sendmsg+0x994/0xcec
[ 892.443213] [e7169d40] [c04eebfc] inet_sendmsg+0xd0/0x164
[ 892.448617] [e7169d70] [c04792f8] sock_sendmsg+0x8c/0xbc
[ 892.453931] [e7169e40] [c047aecc] sys_sendto+0xc0/0xfc
[ 892.459069] [e7169f10] [c047b934] sys_socketcall+0x110/0x25c
[ 892.464729] [e7169f40] [c000f480] ret_from_syscall+0x0/0x3c
(b) since the caam_jr_dequeue lock is only used in bh context,
then semantically it should use _bh spin_lock types. spin_lock_bh
semantics are to disable back-halves, and used when a lock is shared
between softirq (bh) context and process and/or h/w IRQ context.
Since the lock is only used within softirq context, and this tasklet
is atomic, there is no need to do the additional work to disable
back halves.
This patch adds back-half disabling protection to caam_jr_enqueue
spin_locks to fix (a), and drops it from caam_jr_dequeue to fix (b).
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-07-13 18:04:23 -05:00
spin_unlock_bh ( & jrp - > inplock ) ;
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2020-02-12 19:55:20 +02:00
return - EINPROGRESS ;
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}
EXPORT_SYMBOL ( caam_jr_enqueue ) ;
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static void caam_jr_init_hw ( struct device * dev , dma_addr_t inpbusaddr ,
dma_addr_t outbusaddr )
{
struct caam_drv_private_jr * jrp = dev_get_drvdata ( dev ) ;
wr_reg64 ( & jrp - > rregs - > inpring_base , inpbusaddr ) ;
wr_reg64 ( & jrp - > rregs - > outring_base , outbusaddr ) ;
wr_reg32 ( & jrp - > rregs - > inpring_size , JOBR_DEPTH ) ;
wr_reg32 ( & jrp - > rregs - > outring_size , JOBR_DEPTH ) ;
/* Select interrupt coalescing parameters */
clrsetbits_32 ( & jrp - > rregs - > rconfig_lo , 0 , JOBR_INTC |
( JOBR_INTC_COUNT_THLD < < JRCFG_ICDCT_SHIFT ) |
( JOBR_INTC_TIME_THLD < < JRCFG_ICTT_SHIFT ) ) ;
}
static void caam_jr_reset_index ( struct caam_drv_private_jr * jrp )
{
jrp - > out_ring_read_index = 0 ;
jrp - > head = 0 ;
jrp - > tail = 0 ;
}
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/*
* Init JobR independent of platform property detection
*/
static int caam_jr_init ( struct device * dev )
{
struct caam_drv_private_jr * jrp ;
dma_addr_t inpbusaddr , outbusaddr ;
int i , error ;
jrp = dev_get_drvdata ( dev ) ;
error = caam_reset_hw_jr ( dev ) ;
if ( error )
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return error ;
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jrp - > inpring = dmam_alloc_coherent ( dev , SIZEOF_JR_INPENTRY *
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JOBR_DEPTH , & inpbusaddr ,
GFP_KERNEL ) ;
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if ( ! jrp - > inpring )
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return - ENOMEM ;
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jrp - > outring = dmam_alloc_coherent ( dev , SIZEOF_JR_OUTENTRY *
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JOBR_DEPTH , & outbusaddr ,
GFP_KERNEL ) ;
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if ( ! jrp - > outring )
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return - ENOMEM ;
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2019-08-20 13:23:49 -07:00
jrp - > entinfo = devm_kcalloc ( dev , JOBR_DEPTH , sizeof ( * jrp - > entinfo ) ,
GFP_KERNEL ) ;
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if ( ! jrp - > entinfo )
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return - ENOMEM ;
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for ( i = 0 ; i < JOBR_DEPTH ; i + + )
jrp - > entinfo [ i ] . desc_addr_dma = ! 0 ;
/* Setup rings */
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caam_jr_reset_index ( jrp ) ;
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jrp - > inpring_avail = JOBR_DEPTH ;
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caam_jr_init_hw ( dev , inpbusaddr , outbusaddr ) ;
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spin_lock_init ( & jrp - > inplock ) ;
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jrp - > tasklet_params . dev = dev ;
jrp - > tasklet_params . enable_itr = 1 ;
tasklet_init ( & jrp - > irqtask , caam_jr_dequeue ,
( unsigned long ) & jrp - > tasklet_params ) ;
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/* Connect job ring interrupt handler. */
error = devm_request_irq ( dev , jrp - > irq , caam_jr_interrupt , IRQF_SHARED ,
dev_name ( dev ) , dev ) ;
if ( error ) {
dev_err ( dev , " can't connect JobR %d interrupt (%d) \n " ,
jrp - > ridx , jrp - > irq ) ;
tasklet_kill ( & jrp - > irqtask ) ;
}
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return error ;
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}
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static void caam_jr_irq_dispose_mapping ( void * data )
{
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irq_dispose_mapping ( ( unsigned long ) data ) ;
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}
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/*
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* Probe routine for each detected JobR subsystem .
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*/
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static int caam_jr_probe ( struct platform_device * pdev )
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{
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struct device * jrdev ;
struct device_node * nprop ;
struct caam_job_ring __iomem * ctrl ;
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struct caam_drv_private_jr * jrpriv ;
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static int total_jobrs ;
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struct resource * r ;
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int error ;
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jrdev = & pdev - > dev ;
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jrpriv = devm_kzalloc ( jrdev , sizeof ( * jrpriv ) , GFP_KERNEL ) ;
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if ( ! jrpriv )
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return - ENOMEM ;
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dev_set_drvdata ( jrdev , jrpriv ) ;
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2013-10-25 12:01:01 +05:30
/* save ring identity relative to detection */
jrpriv - > ridx = total_jobrs + + ;
nprop = pdev - > dev . of_node ;
/* Get configuration properties from device tree */
/* First, get register page */
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r = platform_get_resource ( pdev , IORESOURCE_MEM , 0 ) ;
if ( ! r ) {
dev_err ( jrdev , " platform_get_resource() failed \n " ) ;
return - ENOMEM ;
}
ctrl = devm_ioremap ( jrdev , r - > start , resource_size ( r ) ) ;
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if ( ! ctrl ) {
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dev_err ( jrdev , " devm_ioremap() failed \n " ) ;
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return - ENOMEM ;
2011-03-13 16:54:26 +08:00
}
2013-04-15 09:55:51 +05:30
2016-11-09 10:46:14 +02:00
jrpriv - > rregs = ( struct caam_job_ring __iomem __force * ) ctrl ;
2011-03-13 16:54:26 +08:00
2019-08-20 13:23:47 -07:00
error = dma_set_mask_and_coherent ( jrdev , caam_get_dma_mask ( jrdev ) ) ;
2017-02-10 14:07:15 +02:00
if ( error ) {
dev_err ( jrdev , " dma_set_mask_and_coherent failed (%d) \n " ,
error ) ;
return error ;
}
2012-06-22 19:48:51 -05:00
2020-02-12 19:55:21 +02:00
/* Initialize crypto engine */
2020-10-26 21:06:26 +02:00
jrpriv - > engine = crypto_engine_alloc_init_and_set ( jrdev , true , NULL ,
false ,
CRYPTO_ENGINE_MAX_QLEN ) ;
2020-02-12 19:55:21 +02:00
if ( ! jrpriv - > engine ) {
dev_err ( jrdev , " Could not init crypto-engine \n " ) ;
return - ENOMEM ;
}
error = devm_add_action_or_reset ( jrdev , caam_jr_crypto_engine_exit ,
jrdev ) ;
if ( error )
return error ;
/* Start crypto engine */
error = crypto_engine_start ( jrpriv - > engine ) ;
if ( error ) {
dev_err ( jrdev , " Could not start crypto-engine \n " ) ;
return error ;
}
2011-03-13 16:54:26 +08:00
/* Identify the interrupt */
2013-11-23 16:18:25 -08:00
jrpriv - > irq = irq_of_parse_and_map ( nprop , 0 ) ;
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if ( ! jrpriv - > irq ) {
dev_err ( jrdev , " irq_of_parse_and_map failed \n " ) ;
return - EINVAL ;
}
2011-03-13 16:54:26 +08:00
2019-09-03 19:35:07 -07:00
error = devm_add_action_or_reset ( jrdev , caam_jr_irq_dispose_mapping ,
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( void * ) ( unsigned long ) jrpriv - > irq ) ;
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if ( error )
return error ;
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/* Now do the platform independent part */
error = caam_jr_init ( jrdev ) ; /* now turn on hardware */
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if ( error )
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return error ;
2013-10-25 12:01:01 +05:30
jrpriv - > dev = jrdev ;
spin_lock ( & driver_data . jr_alloc_lock ) ;
list_add_tail ( & jrpriv - > list_node , & driver_data . jr_list ) ;
spin_unlock ( & driver_data . jr_alloc_lock ) ;
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atomic_set ( & jrpriv - > tfm_count , 0 ) ;
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device_init_wakeup ( & pdev - > dev , 1 ) ;
device_set_wakeup_enable ( & pdev - > dev , false ) ;
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register_algs ( jrpriv , jrdev - > parent ) ;
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2013-10-25 12:01:01 +05:30
return 0 ;
}
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static void caam_jr_get_hw_state ( struct device * dev )
{
struct caam_drv_private_jr * jrp = dev_get_drvdata ( dev ) ;
jrp - > state . inpbusaddr = rd_reg64 ( & jrp - > rregs - > inpring_base ) ;
jrp - > state . outbusaddr = rd_reg64 ( & jrp - > rregs - > outring_base ) ;
}
static int caam_jr_suspend ( struct device * dev )
{
struct platform_device * pdev = to_platform_device ( dev ) ;
struct caam_drv_private_jr * jrpriv = platform_get_drvdata ( pdev ) ;
struct caam_drv_private * ctrlpriv = dev_get_drvdata ( dev - > parent ) ;
struct caam_jr_dequeue_params suspend_params = {
. dev = dev ,
. enable_itr = 0 ,
} ;
/* Remove the node from Physical JobR list maintained by driver */
spin_lock ( & driver_data . jr_alloc_lock ) ;
list_del ( & jrpriv - > list_node ) ;
spin_unlock ( & driver_data . jr_alloc_lock ) ;
if ( jrpriv - > hwrng )
caam_rng_exit ( dev - > parent ) ;
if ( ctrlpriv - > caam_off_during_pm ) {
int err ;
tasklet_disable ( & jrpriv - > irqtask ) ;
/* mask itr to call flush */
clrsetbits_32 ( & jrpriv - > rregs - > rconfig_lo , 0 , JRCFG_IMSK ) ;
/* Invalid job in process */
err = caam_jr_flush ( dev ) ;
if ( err ) {
dev_err ( dev , " Failed to flush \n " ) ;
return err ;
}
/* Dequeing jobs flushed */
caam_jr_dequeue ( ( unsigned long ) & suspend_params ) ;
/* Save state */
caam_jr_get_hw_state ( dev ) ;
} else if ( device_may_wakeup ( & pdev - > dev ) ) {
enable_irq_wake ( jrpriv - > irq ) ;
}
return 0 ;
}
static int caam_jr_resume ( struct device * dev )
{
struct platform_device * pdev = to_platform_device ( dev ) ;
struct caam_drv_private_jr * jrpriv = platform_get_drvdata ( pdev ) ;
struct caam_drv_private * ctrlpriv = dev_get_drvdata ( dev - > parent ) ;
if ( ctrlpriv - > caam_off_during_pm ) {
u64 inp_addr ;
int err ;
/*
* Check if the CAAM has been resetted checking the address of
* the input ring
*/
inp_addr = rd_reg64 ( & jrpriv - > rregs - > inpring_base ) ;
if ( inp_addr ! = 0 ) {
/* JR still has some configuration */
if ( inp_addr = = jrpriv - > state . inpbusaddr ) {
/* JR has not been resetted */
err = caam_jr_restart_processing ( dev ) ;
if ( err ) {
dev_err ( dev ,
" Restart processing failed \n " ) ;
return err ;
}
tasklet_enable ( & jrpriv - > irqtask ) ;
clrsetbits_32 ( & jrpriv - > rregs - > rconfig_lo ,
JRCFG_IMSK , 0 ) ;
goto add_jr ;
} else if ( ctrlpriv - > optee_en ) {
/* JR has been used by OPTEE, reset it */
err = caam_reset_hw_jr ( dev ) ;
if ( err ) {
dev_err ( dev , " Failed to reset JR \n " ) ;
return err ;
}
} else {
/* No explanation, return error */
return - EIO ;
}
}
caam_jr_reset_index ( jrpriv ) ;
caam_jr_init_hw ( dev , jrpriv - > state . inpbusaddr ,
jrpriv - > state . outbusaddr ) ;
tasklet_enable ( & jrpriv - > irqtask ) ;
} else if ( device_may_wakeup ( & pdev - > dev ) ) {
disable_irq_wake ( jrpriv - > irq ) ;
}
add_jr :
spin_lock ( & driver_data . jr_alloc_lock ) ;
list_add_tail ( & jrpriv - > list_node , & driver_data . jr_list ) ;
spin_unlock ( & driver_data . jr_alloc_lock ) ;
if ( jrpriv - > hwrng )
jrpriv - > hwrng = ! caam_rng_init ( dev - > parent ) ;
return 0 ;
}
2023-08-07 13:16:43 +02:00
static DEFINE_SIMPLE_DEV_PM_OPS ( caam_jr_pm_ops , caam_jr_suspend , caam_jr_resume ) ;
2023-07-24 08:52:30 +02:00
2017-06-16 14:46:44 +05:30
static const struct of_device_id caam_jr_match [ ] = {
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{
. compatible = " fsl,sec-v4.0-job-ring " ,
} ,
{
. compatible = " fsl,sec4.0-job-ring " ,
} ,
{ } ,
} ;
MODULE_DEVICE_TABLE ( of , caam_jr_match ) ;
static struct platform_driver caam_jr_driver = {
. driver = {
. name = " caam_jr " ,
. of_match_table = caam_jr_match ,
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. pm = pm_ptr ( & caam_jr_pm_ops ) ,
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} ,
. probe = caam_jr_probe ,
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. remove_new = caam_jr_remove ,
. shutdown = caam_jr_remove ,
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} ;
static int __init jr_driver_init ( void )
{
spin_lock_init ( & driver_data . jr_alloc_lock ) ;
INIT_LIST_HEAD ( & driver_data . jr_list ) ;
return platform_driver_register ( & caam_jr_driver ) ;
2011-03-13 16:54:26 +08:00
}
2013-10-25 12:01:01 +05:30
static void __exit jr_driver_exit ( void )
{
platform_driver_unregister ( & caam_jr_driver ) ;
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}
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module_init ( jr_driver_init ) ;
module_exit ( jr_driver_exit ) ;
MODULE_LICENSE ( " GPL " ) ;
MODULE_DESCRIPTION ( " FSL CAAM JR request backend " ) ;
MODULE_AUTHOR ( " Freescale Semiconductor - NMG/STC " ) ;