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/ *
* Based o n a r c h / a r m / m m / p r o c . S
*
* Copyright ( C ) 2 0 0 1 D e e p B l u e S o l u t i o n s L t d .
* Copyright ( C ) 2 0 1 2 A R M L t d .
* Author : Catalin M a r i n a s < c a t a l i n . m a r i n a s @arm.com>
*
* This p r o g r a m i s f r e e s o f t w a r e ; you can redistribute it and/or modify
* it u n d e r t h e t e r m s o f t h e G N U G e n e r a l P u b l i c L i c e n s e v e r s i o n 2 a s
* published b y t h e F r e e S o f t w a r e F o u n d a t i o n .
*
* This p r o g r a m i s d i s t r i b u t e d i n t h e h o p e t h a t i t w i l l b e u s e f u l ,
* but W I T H O U T A N Y W A R R A N T Y ; without even the implied warranty of
* MERCHANTABILITY o r F I T N E S S F O R A P A R T I C U L A R P U R P O S E . S e e t h e
* GNU G e n e r a l P u b l i c L i c e n s e f o r m o r e d e t a i l s .
*
* You s h o u l d h a v e r e c e i v e d a c o p y o f t h e G N U G e n e r a l P u b l i c L i c e n s e
* along w i t h t h i s p r o g r a m . I f n o t , s e e < h t t p : / / w w w . g n u . o r g / l i c e n s e s / > .
* /
# include < l i n u x / i n i t . h >
# include < l i n u x / l i n k a g e . h >
# include < a s m / a s s e m b l e r . h >
# include < a s m / a s m - o f f s e t s . h >
# include < a s m / h w c a p . h >
# include < a s m / p g t a b l e - h w d e f . h >
# include < a s m / p g t a b l e . h >
# include " p r o c - m a c r o s . S "
# ifndef C O N F I G _ S M P
/* PTWs cacheable, inner/outer WBWA not shareable */
# define T C R _ F L A G S T C R _ I R G N _ W B W A | T C R _ O R G N _ W B W A
# else
/* PTWs cacheable, inner/outer WBWA shareable */
# define T C R _ F L A G S T C R _ I R G N _ W B W A | T C R _ O R G N _ W B W A | T C R _ S H A R E D
# endif
# define M A I R ( a t t r , m t ) ( ( a t t r ) < < ( ( m t ) * 8 ) )
/ *
* cpu_ c a c h e _ o f f ( )
*
* Turn t h e C P U D - c a c h e o f f .
* /
ENTRY( c p u _ c a c h e _ o f f )
mrs x0 , s c t l r _ e l 1
bic x0 , x0 , #1 < < 2 / / c l e a r S C T L R . C
msr s c t l r _ e l 1 , x0
isb
ret
ENDPROC( c p u _ c a c h e _ o f f )
/ *
* cpu_ r e s e t ( l o c )
*
* Perform a s o f t r e s e t o f t h e s y s t e m . P u t t h e C P U i n t o t h e s a m e s t a t e
* as i t w o u l d b e i f i t h a d b e e n r e s e t , a n d b r a n c h t o w h a t w o u l d b e t h e
* reset v e c t o r . I t m u s t b e e x e c u t e d w i t h t h e f l a t i d e n t i t y m a p p i n g .
*
* - loc - l o c a t i o n t o j u m p t o f o r s o f t r e s e t
* /
.align 5
ENTRY( c p u _ r e s e t )
mrs x1 , s c t l r _ e l 1
bic x1 , x1 , #1
msr s c t l r _ e l 1 , x1 / / d i s a b l e t h e M M U
isb
ret x0
ENDPROC( c p u _ r e s e t )
/ *
* cpu_ d o _ i d l e ( )
*
* Idle t h e p r o c e s s o r ( w a i t f o r i n t e r r u p t ) .
* /
ENTRY( c p u _ d o _ i d l e )
dsb s y / / W F I m a y e n t e r a l o w - p o w e r m o d e
wfi
ret
ENDPROC( c p u _ d o _ i d l e )
/ *
* cpu_ s w i t c h _ m m ( p g d _ p h y s , t s k )
*
* Set t h e t r a n s l a t i o n t a b l e b a s e p o i n t e r t o b e p g d _ p h y s .
*
* - pgd_ p h y s - p h y s i c a l a d d r e s s o f n e w T T B
* /
ENTRY( c p u _ d o _ s w i t c h _ m m )
mmid w1 , x1 / / g e t m m - > c o n t e x t . i d
bfi x0 , x1 , #48 , #16 / / s e t t h e A S I D
msr t t b r0 _ e l 1 , x0 / / s e t T T B R 0
isb
ret
ENDPROC( c p u _ d o _ s w i t c h _ m m )
.section " .text .init " , # alloc, #e x e c i n s t r
/ *
* _ _ cpu_ s e t u p
*
* Initialise t h e p r o c e s s o r f o r t u r n i n g t h e M M U o n . R e t u r n i n x0 t h e
* value o f t h e S C T L R _ E L 1 r e g i s t e r .
* /
ENTRY( _ _ c p u _ s e t u p )
/ *
* Preserve t h e l i n k r e g i s t e r a c r o s s t h e f u n c t i o n c a l l .
* /
mov x28 , l r
bl _ _ f l u s h _ d c a c h e _ a l l
mov l r , x28
ic i a l l u / / I + B T B c a c h e i n v a l i d a t e
dsb s y
mov x0 , #3 < < 2 0
msr c p a c r _ e l 1 , x0 / / E n a b l e F P / A S I M D
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msr m d s c r _ e l 1 , x z r / / R e s e t m d s c r _ e l 1
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tlbi v m a l l e 1 i s / / i n v a l i d a t e I + D T L B s
/ *
* Memory r e g i o n a t t r i b u t e s f o r L P A E :
*
* n = A t t r I n d x [ 2 : 0 ]
* n M A I R
* DEVICE_ n G n R n E 0 0 0 0 0 0 0 0 0 0 0
* DEVICE_ n G n R E 0 0 1 0 0 0 0 0 1 0 0
* DEVICE_ G R E 0 1 0 0 0 0 0 1 1 0 0
* NORMAL_ N C 0 1 1 0 1 0 0 0 1 0 0
* NORMAL 1 0 0 1 1 1 1 1 1 1 1
* /
ldr x5 , =MAIR ( 0 x00 , M T _ D E V I C E _ n G n R n E ) | \
MAIR( 0 x04 , M T _ D E V I C E _ n G n R E ) | \
MAIR( 0 x0 c , M T _ D E V I C E _ G R E ) | \
MAIR( 0 x44 , M T _ N O R M A L _ N C ) | \
MAIR( 0 x f f , M T _ N O R M A L )
msr m a i r _ e l 1 , x5
/ *
* Prepare S C T L R
* /
adr x5 , c r v a l
ldp w5 , w6 , [ x5 ]
mrs x0 , s c t l r _ e l 1
bic x0 , x0 , x5 / / c l e a r b i t s
orr x0 , x0 , x6 / / s e t b i t s
/ *
* Set/ p r e p a r e T C R a n d T T B R . W e u s e 5 1 2 G B ( 3 9 - b i t ) a d d r e s s r a n g e f o r
* both u s e r a n d k e r n e l .
* /
ldr x10 , =TCR_TxSZ ( V A _ B I T S ) | T C R _ F L A G S | T C R _ I P S _ 4 0 B I T | \
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TCR_ A S I D 1 6 | T C R _ T B I 0 | ( 1 < < 3 1 )
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# ifdef C O N F I G _ A R M 6 4 _ 6 4 K _ P A G E S
orr x10 , x10 , T C R _ T G 0 _ 6 4 K
orr x10 , x10 , T C R _ T G 1 _ 6 4 K
# endif
msr t c r _ e l 1 , x10
ret / / r e t u r n t o h e a d . S
ENDPROC( _ _ c p u _ s e t u p )
/ *
* n n T
* U E W T T U D U S I H B S
* CE0 X W H W C Z M E T E E A S
* . . . . .IEE . . . . NEAI T E . I . . A D D E N 0 A C A M
* 0 0 1 1 0 . . . 1 1 0 1 . .0 . . .0 . 1 0 . . . . . . . . . . < hardware r e s e r v e d
* . . . . .100 . . . . 0 1 .1 1 1 .1 . .01 0001 1 1 0 1 < software s e t t i n g s
* /
.type o b j e c t
crval :
.word 0x030802e2 / / clear
.word 0x0405d11d / / set
