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linux/arch/arm/mach-omap2/cm33xx.h

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treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_30.RULE (part 1) Based on the normalized pattern: this program is free software you can redistribute it and/or modify it under the terms of the gnu general public license as published by the free software foundation version 2 this program is distributed as is without any warranty of any kind whether express or implied without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference. Reviewed-by: Allison Randal <allison@lohutok.net> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-07 17:11:11 +03:00
/* SPDX-License-Identifier: GPL-2.0-only */
ARM: OMAP AM33xx: CM: Introduce AM33xx CM APIs and register level details As far as PRM/CM/PRCM modules are concerned, AM33XX device is different than OMAP3 and OMAP4 architectures; so similar to PRM implementation, handle AM33XX CM separately. This patch introduces AM33XX CM module low-level api's, used and required by omap clockdomain and hwmod framework. Please note that cm-regbits-33xx.h (register bit field offset) and cm33xx.h (register addr offset) files are mostly auto generated. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> CC: Tony Lindgren <tony@atomide.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> [paul@pwsan.com: split the hwmod code changes in this patch into a separate patch; updated for 3.5] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-06-18 10:47:26 +04:00
/*
* AM33XX CM offset macros
*
ARM: OMAP2+: Replace HTTP links with HTTPS ones Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-19 13:30:33 +03:00
* Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/
ARM: OMAP AM33xx: CM: Introduce AM33xx CM APIs and register level details As far as PRM/CM/PRCM modules are concerned, AM33XX device is different than OMAP3 and OMAP4 architectures; so similar to PRM implementation, handle AM33XX CM separately. This patch introduces AM33XX CM module low-level api's, used and required by omap clockdomain and hwmod framework. Please note that cm-regbits-33xx.h (register bit field offset) and cm33xx.h (register addr offset) files are mostly auto generated. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> CC: Tony Lindgren <tony@atomide.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> [paul@pwsan.com: split the hwmod code changes in this patch into a separate patch; updated for 3.5] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-06-18 10:47:26 +04:00
* Vaibhav Hiremath <hvaibhav@ti.com>
*/
#ifndef __ARCH_ARM_MACH_OMAP2_CM_33XX_H
#define __ARCH_ARM_MACH_OMAP2_CM_33XX_H
#include "cm.h"
#include "cm-regbits-33xx.h"
ARM: OMAP2+: CM: move SoC specific init calls within a generic API This gets rid of need for some exported driver APIs, and simplifies the initialization of the CM driver. Done in preparation to make CM a separate driver. The init data is now also passed to the SoC specific implementations, allowing future expansion to add feature flags etc. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-11-21 16:51:37 +03:00
#include "prcm-common.h"
ARM: OMAP AM33xx: CM: Introduce AM33xx CM APIs and register level details As far as PRM/CM/PRCM modules are concerned, AM33XX device is different than OMAP3 and OMAP4 architectures; so similar to PRM implementation, handle AM33XX CM separately. This patch introduces AM33XX CM module low-level api's, used and required by omap clockdomain and hwmod framework. Please note that cm-regbits-33xx.h (register bit field offset) and cm33xx.h (register addr offset) files are mostly auto generated. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> CC: Tony Lindgren <tony@atomide.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> [paul@pwsan.com: split the hwmod code changes in this patch into a separate patch; updated for 3.5] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-06-18 10:47:26 +04:00
/* CM base address */
#define AM33XX_CM_BASE 0x44e00000
#define AM33XX_CM_REGADDR(inst, reg) \
AM33XX_L4_WK_IO_ADDRESS(AM33XX_CM_BASE + (inst) + (reg))
/* CM instances */
#define AM33XX_CM_PER_MOD 0x0000
#define AM33XX_CM_WKUP_MOD 0x0400
#define AM33XX_CM_DPLL_MOD 0x0500
#define AM33XX_CM_MPU_MOD 0x0600
#define AM33XX_CM_DEVICE_MOD 0x0700
#define AM33XX_CM_RTC_MOD 0x0800
#define AM33XX_CM_GFX_MOD 0x0900
#define AM33XX_CM_CEFUSE_MOD 0x0A00
/* CM.PER_CM register offsets */
#define AM33XX_CM_PER_L4LS_CLKSTCTRL_OFFSET 0x0000
#define AM33XX_CM_PER_L4LS_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0000)
#define AM33XX_CM_PER_L3S_CLKSTCTRL_OFFSET 0x0004
#define AM33XX_CM_PER_L3S_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0004)
#define AM33XX_CM_PER_L4FW_CLKSTCTRL_OFFSET 0x0008
#define AM33XX_CM_PER_L4FW_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0008)
#define AM33XX_CM_PER_L3_CLKSTCTRL_OFFSET 0x000c
#define AM33XX_CM_PER_L3_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x000c)
#define AM33XX_CM_PER_EMIF_CLKCTRL_OFFSET 0x0028
#define AM33XX_CM_PER_EMIF_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0028)
#define AM33XX_CM_PER_L4HS_CLKSTCTRL_OFFSET 0x011c
#define AM33XX_CM_PER_L4HS_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x011c)
#define AM33XX_CM_PER_OCPWP_L3_CLKSTCTRL_OFFSET 0x012c
#define AM33XX_CM_PER_OCPWP_L3_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x012c)
#define AM33XX_CM_PER_PRUSS_CLKSTCTRL_OFFSET 0x0140
#define AM33XX_CM_PER_PRUSS_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0140)
#define AM33XX_CM_PER_CPSW_CLKSTCTRL_OFFSET 0x0144
#define AM33XX_CM_PER_CPSW_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0144)
#define AM33XX_CM_PER_LCDC_CLKSTCTRL_OFFSET 0x0148
#define AM33XX_CM_PER_LCDC_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0148)
#define AM33XX_CM_PER_CLK_24MHZ_CLKSTCTRL_OFFSET 0x0150
#define AM33XX_CM_PER_CLK_24MHZ_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0150)
/* CM.WKUP_CM register offsets */
#define AM33XX_CM_WKUP_CLKSTCTRL_OFFSET 0x0000
#define AM33XX_CM_WKUP_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0000)
#define AM33XX_CM_L3_AON_CLKSTCTRL_OFFSET 0x0018
#define AM33XX_CM_L3_AON_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0018)
#define AM33XX_CM_L4_WKUP_AON_CLKSTCTRL_OFFSET 0x00cc
#define AM33XX_CM_L4_WKUP_AON_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00cc)
/* CM.DPLL_CM register offsets */
#define AM33XX_CLKSEL_GFX_FCLK AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x002c)
/* CM.MPU_CM register offsets */
#define AM33XX_CM_MPU_CLKSTCTRL_OFFSET 0x0000
#define AM33XX_CM_MPU_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_MPU_MOD, 0x0000)
#define AM33XX_CM_MPU_MPU_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_MPU_MOD, 0x0004)
/* CM.DEVICE_CM register offsets */
/* CM.RTC_CM register offsets */
#define AM33XX_CM_RTC_CLKSTCTRL_OFFSET 0x0004
#define AM33XX_CM_RTC_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_RTC_MOD, 0x0004)
/* CM.GFX_CM register offsets */
#define AM33XX_CM_GFX_L3_CLKSTCTRL_OFFSET 0x0000
#define AM33XX_CM_GFX_L3_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_GFX_MOD, 0x0000)
#define AM33XX_CM_GFX_L4LS_GFX_CLKSTCTRL__1_OFFSET 0x000c
#define AM33XX_CM_GFX_L4LS_GFX_CLKSTCTRL__1 AM33XX_CM_REGADDR(AM33XX_CM_GFX_MOD, 0x000c)
/* CM.CEFUSE_CM register offsets */
#define AM33XX_CM_CEFUSE_CLKSTCTRL_OFFSET 0x0000
#define AM33XX_CM_CEFUSE_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_CEFUSE_MOD, 0x0000)
ARM: OMAP2+: AM33XX: CM/PRM: Use __ASSEMBLER__ macros in header files This is necessary to ensure that macros declared here can be reused from assembly files. Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-01-29 15:15:01 +04:00
#ifndef __ASSEMBLER__
ARM: OMAP2+: CM: move SoC specific init calls within a generic API This gets rid of need for some exported driver APIs, and simplifies the initialization of the CM driver. Done in preparation to make CM a separate driver. The init data is now also passed to the SoC specific implementations, allowing future expansion to add feature flags etc. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-11-21 16:51:37 +03:00
int am33xx_cm_init(const struct omap_prcm_init_data *data);
ARM: OMAP2+: AM33XX: CM/PRM: Use __ASSEMBLER__ macros in header files This is necessary to ensure that macros declared here can be reused from assembly files. Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-01-29 15:15:01 +04:00
#endif /* ASSEMBLER */
ARM: OMAP AM33xx: CM: Introduce AM33xx CM APIs and register level details As far as PRM/CM/PRCM modules are concerned, AM33XX device is different than OMAP3 and OMAP4 architectures; so similar to PRM implementation, handle AM33XX CM separately. This patch introduces AM33XX CM module low-level api's, used and required by omap clockdomain and hwmod framework. Please note that cm-regbits-33xx.h (register bit field offset) and cm33xx.h (register addr offset) files are mostly auto generated. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> CC: Tony Lindgren <tony@atomide.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> [paul@pwsan.com: split the hwmod code changes in this patch into a separate patch; updated for 3.5] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-06-18 10:47:26 +04:00
#endif
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