2019-05-27 08:55:01 +02:00
// SPDX-License-Identifier: GPL-2.0-or-later
2011-03-17 09:40:29 +01:00
/*
* MX35 CPU type detection
*
* Copyright ( c ) 2009 Daniel Mack < daniel @ caiaq . de >
*/
# include <linux/module.h>
2020-09-16 21:41:20 -03:00
# include <linux/of_address.h>
2011-03-17 09:40:29 +01:00
# include <linux/io.h>
2012-09-13 21:18:39 +08:00
2012-09-14 14:14:45 +08:00
# include "hardware.h"
2012-09-13 21:18:39 +08:00
# include "iim.h"
2011-03-17 09:40:29 +01:00
2011-08-26 13:35:22 +08:00
static int mx35_cpu_rev = - 1 ;
2011-03-17 09:40:29 +01:00
2011-08-26 13:35:22 +08:00
static int mx35_read_cpu_rev ( void )
2011-03-17 09:40:29 +01:00
{
2020-09-16 21:41:20 -03:00
void __iomem * iim_base ;
struct device_node * np ;
2011-03-17 09:40:29 +01:00
u32 rev ;
2020-09-16 21:41:20 -03:00
np = of_find_compatible_node ( NULL , NULL , " fsl,imx35-iim " ) ;
iim_base = of_iomap ( np , 0 ) ;
BUG_ON ( ! iim_base ) ;
rev = imx_readl ( iim_base + MXC_IIMSREV ) ;
2011-03-17 09:40:29 +01:00
switch ( rev ) {
case 0x00 :
2011-08-26 13:35:22 +08:00
return IMX_CHIP_REVISION_1_0 ;
2011-03-17 09:40:29 +01:00
case 0x10 :
2011-08-26 13:35:22 +08:00
return IMX_CHIP_REVISION_2_0 ;
2011-03-17 09:40:29 +01:00
case 0x11 :
2011-08-26 13:35:22 +08:00
return IMX_CHIP_REVISION_2_1 ;
2011-03-17 09:40:29 +01:00
default :
2011-08-26 13:35:22 +08:00
return IMX_CHIP_REVISION_UNKNOWN ;
2011-03-17 09:40:29 +01:00
}
2011-08-26 13:35:22 +08:00
}
int mx35_revision ( void )
{
if ( mx35_cpu_rev = = - 1 )
mx35_cpu_rev = mx35_read_cpu_rev ( ) ;
2011-03-17 09:40:29 +01:00
2011-08-26 13:35:22 +08:00
return mx35_cpu_rev ;
2011-03-17 09:40:29 +01:00
}
2011-08-26 13:35:22 +08:00
EXPORT_SYMBOL ( mx35_revision ) ;