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/*
* linux / arch / arm / mach - omap2 / clock . h
*
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* Copyright ( C ) 2005 - 2008 Texas Instruments , Inc .
* Copyright ( C ) 2004 - 2008 Nokia Corporation
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*
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* Contacts :
* Richard Woodruff < r - woodruff2 @ ti . com >
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* Paul Walmsley
*
* This program is free software ; you can redistribute it and / or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation .
*/
# ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_H
# define __ARCH_ARM_MACH_OMAP2_CLOCK_H
# include <asm/arch/clock.h>
int omap2_clk_enable ( struct clk * clk ) ;
void omap2_clk_disable ( struct clk * clk ) ;
long omap2_clk_round_rate ( struct clk * clk , unsigned long rate ) ;
int omap2_clk_set_rate ( struct clk * clk , unsigned long rate ) ;
int omap2_clk_set_parent ( struct clk * clk , struct clk * new_parent ) ;
# ifdef CONFIG_OMAP_RESET_CLOCKS
void omap2_clk_disable_unused ( struct clk * clk ) ;
# else
# define omap2_clk_disable_unused NULL
# endif
void omap2_clksel_recalc ( struct clk * clk ) ;
void omap2_init_clksel_parent ( struct clk * clk ) ;
u32 omap2_clksel_get_divisor ( struct clk * clk ) ;
u32 omap2_clksel_round_rate_div ( struct clk * clk , unsigned long target_rate ,
u32 * new_div ) ;
u32 omap2_clksel_to_divisor ( struct clk * clk , u32 field_val ) ;
u32 omap2_divisor_to_clksel ( struct clk * clk , u32 div ) ;
void omap2_fixed_divisor_recalc ( struct clk * clk ) ;
long omap2_clksel_round_rate ( struct clk * clk , unsigned long target_rate ) ;
int omap2_clksel_set_rate ( struct clk * clk , unsigned long rate ) ;
u32 omap2_get_dpll_rate ( struct clk * clk ) ;
int omap2_wait_clock_ready ( void __iomem * reg , u32 cval , const char * name ) ;
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void omap2_clk_prepare_for_reboot ( void ) ;
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extern u8 cpu_mask ;
/* clksel_rate data common to 24xx/343x */
static const struct clksel_rate gpt_32k_rates [ ] = {
{ . div = 1 , . val = 0 , . flags = RATE_IN_24XX | RATE_IN_343X | DEFAULT_RATE } ,
{ . div = 0 }
} ;
static const struct clksel_rate gpt_sys_rates [ ] = {
{ . div = 1 , . val = 1 , . flags = RATE_IN_24XX | RATE_IN_343X | DEFAULT_RATE } ,
{ . div = 0 }
} ;
static const struct clksel_rate gfx_l3_rates [ ] = {
{ . div = 1 , . val = 1 , . flags = RATE_IN_24XX | RATE_IN_343X } ,
{ . div = 2 , . val = 2 , . flags = RATE_IN_24XX | RATE_IN_343X | DEFAULT_RATE } ,
{ . div = 3 , . val = 3 , . flags = RATE_IN_243X | RATE_IN_343X } ,
{ . div = 4 , . val = 4 , . flags = RATE_IN_243X | RATE_IN_343X } ,
{ . div = 0 }
} ;
# endif