From 0019bd1e6c3485910de45a8f9da1fa5f7006d4d8 Mon Sep 17 00:00:00 2001 From: Xianwei Zhao Date: Thu, 16 May 2024 15:16:12 +0800 Subject: [PATCH] clk: meson: s4: fix pwm_j_div parent clock [ Upstream commit c591745831e75b11ef19fb33c5c5a16e4d3f7fbf ] Update peripherals pwm_j_div's parent clock to pwm_j_mux Fixes: 57b55c76aaf1 ("clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller") Signed-off-by: Xianwei Zhao Link: https://lore.kernel.org/r/20240516071612.2978201-1-xianwei.zhao@amlogic.com Signed-off-by: Jerome Brunet Signed-off-by: Sasha Levin --- drivers/clk/meson/s4-peripherals.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/meson/s4-peripherals.c b/drivers/clk/meson/s4-peripherals.c index 5e17ca50ab09..73340c7e815e 100644 --- a/drivers/clk/meson/s4-peripherals.c +++ b/drivers/clk/meson/s4-peripherals.c @@ -2978,7 +2978,7 @@ static struct clk_regmap s4_pwm_j_div = { .name = "pwm_j_div", .ops = &clk_regmap_divider_ops, .parent_hws = (const struct clk_hw *[]) { - &s4_pwm_h_mux.hw + &s4_pwm_j_mux.hw }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT,