MIPS: kernel: proc: fix trivial style errors
Fix the following checkpatch errors - no logic changes: WARNING: Block comments use a trailing */ on a separate line + * */ ERROR: space prohibited before open square bracket '[' + char fmt [64]; ERROR: space prohibited before that ',' (ctx:WxE) + seq_printf(m, "%s0x%04x", i ? ", " : "" , ERROR: trailing whitespace +^Iseq_printf(m, "isa\t\t\t:"); $ ERROR: trailing statements should be on next line Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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@ -19,8 +19,8 @@
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unsigned int vced_count, vcei_count;
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/*
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* * No lock; only written during early bootup by CPU 0.
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* */
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* No lock; only written during early bootup by CPU 0.
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*/
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static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain);
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int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb)
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@ -39,7 +39,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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unsigned long n = (unsigned long) v - 1;
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unsigned int version = cpu_data[n].processor_id;
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unsigned int fp_vers = cpu_data[n].fpu_id;
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char fmt [64];
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char fmt[64];
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int i;
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#ifdef CONFIG_SMP
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@ -78,12 +78,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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seq_printf(m, "count: %d, address/irw mask: [",
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cpu_data[n].watch_reg_count);
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for (i = 0; i < cpu_data[n].watch_reg_count; i++)
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seq_printf(m, "%s0x%04x", i ? ", " : "" ,
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seq_printf(m, "%s0x%04x", i ? ", " : "",
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cpu_data[n].watch_reg_masks[i]);
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seq_printf(m, "]\n");
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}
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seq_printf(m, "isa\t\t\t:");
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seq_printf(m, "isa\t\t\t:");
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if (cpu_has_mips_1)
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seq_printf(m, " mips1");
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if (cpu_has_mips_2)
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@ -113,25 +113,44 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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seq_printf(m, "\n");
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seq_printf(m, "ASEs implemented\t:");
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if (cpu_has_mips16) seq_printf(m, "%s", " mips16");
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if (cpu_has_mips16e2) seq_printf(m, "%s", " mips16e2");
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if (cpu_has_mdmx) seq_printf(m, "%s", " mdmx");
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if (cpu_has_mips3d) seq_printf(m, "%s", " mips3d");
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if (cpu_has_smartmips) seq_printf(m, "%s", " smartmips");
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if (cpu_has_dsp) seq_printf(m, "%s", " dsp");
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if (cpu_has_dsp2) seq_printf(m, "%s", " dsp2");
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if (cpu_has_dsp3) seq_printf(m, "%s", " dsp3");
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if (cpu_has_mipsmt) seq_printf(m, "%s", " mt");
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if (cpu_has_mmips) seq_printf(m, "%s", " micromips");
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if (cpu_has_vz) seq_printf(m, "%s", " vz");
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if (cpu_has_msa) seq_printf(m, "%s", " msa");
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if (cpu_has_eva) seq_printf(m, "%s", " eva");
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if (cpu_has_htw) seq_printf(m, "%s", " htw");
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if (cpu_has_xpa) seq_printf(m, "%s", " xpa");
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if (cpu_has_loongson_mmi) seq_printf(m, "%s", " loongson-mmi");
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if (cpu_has_loongson_cam) seq_printf(m, "%s", " loongson-cam");
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if (cpu_has_loongson_ext) seq_printf(m, "%s", " loongson-ext");
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if (cpu_has_loongson_ext2) seq_printf(m, "%s", " loongson-ext2");
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if (cpu_has_mips16)
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seq_printf(m, "%s", " mips16");
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if (cpu_has_mips16e2)
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seq_printf(m, "%s", " mips16e2");
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if (cpu_has_mdmx)
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seq_printf(m, "%s", " mdmx");
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if (cpu_has_mips3d)
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seq_printf(m, "%s", " mips3d");
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if (cpu_has_smartmips)
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seq_printf(m, "%s", " smartmips");
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if (cpu_has_dsp)
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seq_printf(m, "%s", " dsp");
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if (cpu_has_dsp2)
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seq_printf(m, "%s", " dsp2");
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if (cpu_has_dsp3)
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seq_printf(m, "%s", " dsp3");
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if (cpu_has_mipsmt)
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seq_printf(m, "%s", " mt");
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if (cpu_has_mmips)
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seq_printf(m, "%s", " micromips");
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if (cpu_has_vz)
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seq_printf(m, "%s", " vz");
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if (cpu_has_msa)
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seq_printf(m, "%s", " msa");
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if (cpu_has_eva)
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seq_printf(m, "%s", " eva");
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if (cpu_has_htw)
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seq_printf(m, "%s", " htw");
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if (cpu_has_xpa)
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seq_printf(m, "%s", " xpa");
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if (cpu_has_loongson_mmi)
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seq_printf(m, "%s", " loongson-mmi");
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if (cpu_has_loongson_cam)
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seq_printf(m, "%s", " loongson-cam");
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if (cpu_has_loongson_ext)
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seq_printf(m, "%s", " loongson-ext");
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if (cpu_has_loongson_ext2)
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seq_printf(m, "%s", " loongson-ext2");
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seq_printf(m, "\n");
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if (cpu_has_mmips) {
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