From 02d794a34c0083057bdfd576e2f6e75b54f31e00 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= Date: Wed, 11 Nov 2020 08:24:07 -0800 Subject: [PATCH] drm/i915/display: Group DC9 mask set MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit DC9 has a separate HW flow from the rest of the DC states and it is available in GEN9 LP platforms and on GEN11 and newer, so here moving the assignment of the mask to a single conditional block to simplifly code. Cc: Lucas De Marchi Cc: Anusha Srivatsa Signed-off-by: José Roberto de Souza Reviewed-by: Lucas De Marchi Link: https://patchwork.freedesktop.org/patch/msgid/20201111162408.98002-1-jose.souza@intel.com --- .../gpu/drm/i915/display/intel_display_power.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 689922480661..48d41a43fbb2 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -4497,26 +4497,24 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv, max_dc = 3; else max_dc = 4; - /* - * DC9 has a separate HW flow from the rest of the DC states, - * not depending on the DMC firmware. It's needed by system - * suspend/resume, so allow it unconditionally. - */ - mask = DC_STATE_EN_DC9; } else if (IS_GEN(dev_priv, 11)) { max_dc = 2; - mask = DC_STATE_EN_DC9; } else if (IS_GEN(dev_priv, 10) || IS_GEN9_BC(dev_priv)) { max_dc = 2; - mask = 0; } else if (IS_GEN9_LP(dev_priv)) { max_dc = 1; - mask = DC_STATE_EN_DC9; } else { max_dc = 0; - mask = 0; } + /* + * DC9 has a separate HW flow from the rest of the DC states, + * not depending on the DMC firmware. It's needed by system + * suspend/resume, so allow it unconditionally. + */ + mask = IS_GEN9_LP(dev_priv) || INTEL_GEN(dev_priv) >= 11 ? + DC_STATE_EN_DC9 : 0; + if (!dev_priv->params.disable_power_well) max_dc = 0;