net/mlx5: CQ Database per EQ
Before this patch the driver had one CQ database protected via one spinlock, this spinlock is meant to synchronize between CQ adding/removing and CQ IRQ interrupt handling. On a system with large number of CPUs and on a work load that requires lots of interrupts, this global spinlock becomes a very nasty hotspot and introduces a contention between the active cores, which will significantly hurt performance and becomes a bottleneck that prevents seamless cpu scaling. To solve this we simply move the CQ database and its spinlock to be per EQ (IRQ), thus per core. Tested with: system: 2 sockets, 14 cores per socket, hyperthreading, 2x14x2=56 cores netperf command: ./super_netperf 200 -P 0 -t TCP_RR -H <server> -l 30 -- -r 300,300 -o -s 1M,1M -S 1M,1M WITHOUT THIS PATCH: Average: CPU %usr %nice %sys %iowait %irq %soft %steal %guest %gnice %idle Average: all 4.32 0.00 36.15 0.09 0.00 34.02 0.00 0.00 0.00 25.41 Samples: 2M of event 'cycles:pp', Event count (approx.): 1554616897271 Overhead Command Shared Object Symbol + 14.28% swapper [kernel.vmlinux] [k] intel_idle + 12.25% swapper [kernel.vmlinux] [k] queued_spin_lock_slowpath + 10.29% netserver [kernel.vmlinux] [k] queued_spin_lock_slowpath + 1.32% netserver [kernel.vmlinux] [k] mlx5e_xmit WITH THIS PATCH: Average: CPU %usr %nice %sys %iowait %irq %soft %steal %guest %gnice %idle Average: all 4.27 0.00 34.31 0.01 0.00 18.71 0.00 0.00 0.00 42.69 Samples: 2M of event 'cycles:pp', Event count (approx.): 1498132937483 Overhead Command Shared Object Symbol + 23.33% swapper [kernel.vmlinux] [k] intel_idle + 1.69% netserver [kernel.vmlinux] [k] mlx5e_xmit Tested-by: Song Liu <songliubraving@fb.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Reviewed-by: Gal Pressman <galp@mellanox.com>
This commit is contained in:
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7928b2cbe5
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02d92f7903
@ -86,10 +86,10 @@ static void mlx5_add_cq_to_tasklet(struct mlx5_core_cq *cq)
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spin_unlock_irqrestore(&tasklet_ctx->lock, flags);
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}
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void mlx5_cq_completion(struct mlx5_core_dev *dev, u32 cqn)
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void mlx5_cq_completion(struct mlx5_eq *eq, u32 cqn)
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{
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struct mlx5_cq_table *table = &eq->cq_table;
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struct mlx5_core_cq *cq;
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struct mlx5_cq_table *table = &dev->priv.cq_table;
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spin_lock(&table->lock);
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cq = radix_tree_lookup(&table->tree, cqn);
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@ -98,7 +98,7 @@ void mlx5_cq_completion(struct mlx5_core_dev *dev, u32 cqn)
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spin_unlock(&table->lock);
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if (!cq) {
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mlx5_core_warn(dev, "Completion event for bogus CQ 0x%x\n", cqn);
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mlx5_core_warn(eq->dev, "Completion event for bogus CQ 0x%x\n", cqn);
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return;
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}
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@ -110,9 +110,9 @@ void mlx5_cq_completion(struct mlx5_core_dev *dev, u32 cqn)
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complete(&cq->free);
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}
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void mlx5_cq_event(struct mlx5_core_dev *dev, u32 cqn, int event_type)
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void mlx5_cq_event(struct mlx5_eq *eq, u32 cqn, int event_type)
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{
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struct mlx5_cq_table *table = &dev->priv.cq_table;
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struct mlx5_cq_table *table = &eq->cq_table;
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struct mlx5_core_cq *cq;
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spin_lock(&table->lock);
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@ -124,7 +124,7 @@ void mlx5_cq_event(struct mlx5_core_dev *dev, u32 cqn, int event_type)
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spin_unlock(&table->lock);
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if (!cq) {
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mlx5_core_warn(dev, "Async event for bogus CQ 0x%x\n", cqn);
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mlx5_core_warn(eq->dev, "Async event for bogus CQ 0x%x\n", cqn);
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return;
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}
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@ -137,19 +137,22 @@ void mlx5_cq_event(struct mlx5_core_dev *dev, u32 cqn, int event_type)
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int mlx5_core_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
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u32 *in, int inlen)
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{
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struct mlx5_cq_table *table = &dev->priv.cq_table;
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u32 out[MLX5_ST_SZ_DW(create_cq_out)];
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u32 din[MLX5_ST_SZ_DW(destroy_cq_in)];
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u32 dout[MLX5_ST_SZ_DW(destroy_cq_out)];
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int eqn = MLX5_GET(cqc, MLX5_ADDR_OF(create_cq_in, in, cq_context),
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c_eqn);
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struct mlx5_eq *eq;
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struct mlx5_eq *eq, *async_eq;
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struct mlx5_cq_table *table;
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int err;
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async_eq = &dev->priv.eq_table.async_eq;
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eq = mlx5_eqn2eq(dev, eqn);
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if (IS_ERR(eq))
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return PTR_ERR(eq);
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table = &eq->cq_table;
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memset(out, 0, sizeof(out));
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MLX5_SET(create_cq_in, in, opcode, MLX5_CMD_OP_CREATE_CQ);
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err = mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
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@ -159,6 +162,7 @@ int mlx5_core_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
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cq->cqn = MLX5_GET(create_cq_out, out, cqn);
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cq->cons_index = 0;
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cq->arm_sn = 0;
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cq->eq = eq;
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refcount_set(&cq->refcount, 1);
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init_completion(&cq->free);
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if (!cq->comp)
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@ -167,12 +171,20 @@ int mlx5_core_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
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cq->tasklet_ctx.priv = &eq->tasklet_ctx;
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INIT_LIST_HEAD(&cq->tasklet_ctx.list);
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/* Add to comp EQ CQ tree to recv comp events */
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spin_lock_irq(&table->lock);
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err = radix_tree_insert(&table->tree, cq->cqn, cq);
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spin_unlock_irq(&table->lock);
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if (err)
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goto err_cmd;
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/* Add to async EQ CQ tree to recv Async events */
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spin_lock_irq(&async_eq->cq_table.lock);
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err = radix_tree_insert(&async_eq->cq_table.tree, cq->cqn, cq);
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spin_unlock_irq(&async_eq->cq_table.lock);
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if (err)
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goto err_cq_table;
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cq->pid = current->pid;
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err = mlx5_debug_cq_add(dev, cq);
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if (err)
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@ -183,6 +195,10 @@ int mlx5_core_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
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return 0;
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err_cq_table:
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spin_lock_irq(&table->lock);
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radix_tree_delete(&table->tree, cq->cqn);
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spin_unlock_irq(&table->lock);
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err_cmd:
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memset(din, 0, sizeof(din));
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memset(dout, 0, sizeof(dout));
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@ -195,21 +211,34 @@ EXPORT_SYMBOL(mlx5_core_create_cq);
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int mlx5_core_destroy_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq)
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{
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struct mlx5_cq_table *table = &dev->priv.cq_table;
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struct mlx5_cq_table *asyn_eq_cq_table = &dev->priv.eq_table.async_eq.cq_table;
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struct mlx5_cq_table *table = &cq->eq->cq_table;
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u32 out[MLX5_ST_SZ_DW(destroy_cq_out)] = {0};
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u32 in[MLX5_ST_SZ_DW(destroy_cq_in)] = {0};
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struct mlx5_core_cq *tmp;
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int err;
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spin_lock_irq(&asyn_eq_cq_table->lock);
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tmp = radix_tree_delete(&asyn_eq_cq_table->tree, cq->cqn);
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spin_unlock_irq(&asyn_eq_cq_table->lock);
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if (!tmp) {
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mlx5_core_warn(dev, "cq 0x%x not found in async eq cq tree\n", cq->cqn);
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return -EINVAL;
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}
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if (tmp != cq) {
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mlx5_core_warn(dev, "corruption on cqn 0x%x in async eq cq tree\n", cq->cqn);
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return -EINVAL;
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}
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spin_lock_irq(&table->lock);
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tmp = radix_tree_delete(&table->tree, cq->cqn);
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spin_unlock_irq(&table->lock);
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if (!tmp) {
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mlx5_core_warn(dev, "cq 0x%x not found in tree\n", cq->cqn);
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mlx5_core_warn(dev, "cq 0x%x not found in comp eq cq tree\n", cq->cqn);
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return -EINVAL;
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}
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if (tmp != cq) {
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mlx5_core_warn(dev, "corruption on srqn 0x%x\n", cq->cqn);
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mlx5_core_warn(dev, "corruption on cqn 0x%x in comp eq cq tree\n", cq->cqn);
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return -EINVAL;
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}
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@ -270,21 +299,3 @@ int mlx5_core_modify_cq_moderation(struct mlx5_core_dev *dev,
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return mlx5_core_modify_cq(dev, cq, in, sizeof(in));
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}
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EXPORT_SYMBOL(mlx5_core_modify_cq_moderation);
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int mlx5_init_cq_table(struct mlx5_core_dev *dev)
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{
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struct mlx5_cq_table *table = &dev->priv.cq_table;
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int err;
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memset(table, 0, sizeof(*table));
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spin_lock_init(&table->lock);
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INIT_RADIX_TREE(&table->tree, GFP_ATOMIC);
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err = mlx5_cq_debugfs_init(dev);
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return err;
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}
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void mlx5_cleanup_cq_table(struct mlx5_core_dev *dev)
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{
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mlx5_cq_debugfs_cleanup(dev);
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}
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@ -415,7 +415,7 @@ static irqreturn_t mlx5_eq_int(int irq, void *eq_ptr)
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switch (eqe->type) {
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case MLX5_EVENT_TYPE_COMP:
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cqn = be32_to_cpu(eqe->data.comp.cqn) & 0xffffff;
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mlx5_cq_completion(dev, cqn);
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mlx5_cq_completion(eq, cqn);
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break;
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case MLX5_EVENT_TYPE_DCT_DRAINED:
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rsn = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff;
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@ -472,7 +472,7 @@ static irqreturn_t mlx5_eq_int(int irq, void *eq_ptr)
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cqn = be32_to_cpu(eqe->data.cq_err.cqn) & 0xffffff;
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mlx5_core_warn(dev, "CQ error on CQN 0x%x, syndrome 0x%x\n",
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cqn, eqe->data.cq_err.syndrome);
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mlx5_cq_event(dev, cqn, eqe->type);
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mlx5_cq_event(eq, cqn, eqe->type);
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break;
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case MLX5_EVENT_TYPE_PAGE_REQUEST:
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@ -567,6 +567,7 @@ int mlx5_create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, u8 vecidx,
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int nent, u64 mask, const char *name,
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enum mlx5_eq_type type)
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{
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struct mlx5_cq_table *cq_table = &eq->cq_table;
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u32 out[MLX5_ST_SZ_DW(create_eq_out)] = {0};
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struct mlx5_priv *priv = &dev->priv;
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irq_handler_t handler;
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@ -576,6 +577,11 @@ int mlx5_create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, u8 vecidx,
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u32 *in;
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int err;
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/* Init CQ table */
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memset(cq_table, 0, sizeof(*cq_table));
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spin_lock_init(&cq_table->lock);
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INIT_RADIX_TREE(&cq_table->tree, GFP_ATOMIC);
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eq->type = type;
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eq->nent = roundup_pow_of_two(nent + MLX5_NUM_SPARE_EQE);
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eq->cons_index = 0;
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@ -942,9 +942,9 @@ static int mlx5_init_once(struct mlx5_core_dev *dev, struct mlx5_priv *priv)
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goto out;
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}
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err = mlx5_init_cq_table(dev);
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err = mlx5_cq_debugfs_init(dev);
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if (err) {
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dev_err(&pdev->dev, "failed to initialize cq table\n");
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dev_err(&pdev->dev, "failed to initialize cq debugfs\n");
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goto err_eq_cleanup;
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}
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@ -1002,7 +1002,7 @@ err_tables_cleanup:
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mlx5_cleanup_mkey_table(dev);
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mlx5_cleanup_srq_table(dev);
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mlx5_cleanup_qp_table(dev);
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mlx5_cleanup_cq_table(dev);
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mlx5_cq_debugfs_cleanup(dev);
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err_eq_cleanup:
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mlx5_eq_cleanup(dev);
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@ -1023,7 +1023,7 @@ static void mlx5_cleanup_once(struct mlx5_core_dev *dev)
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mlx5_cleanup_mkey_table(dev);
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mlx5_cleanup_srq_table(dev);
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mlx5_cleanup_qp_table(dev);
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mlx5_cleanup_cq_table(dev);
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mlx5_cq_debugfs_cleanup(dev);
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mlx5_eq_cleanup(dev);
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}
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@ -60,6 +60,7 @@ struct mlx5_core_cq {
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} tasklet_ctx;
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int reset_notify_added;
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struct list_head reset_notify;
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struct mlx5_eq *eq;
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};
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@ -171,8 +172,6 @@ static inline void mlx5_cq_arm(struct mlx5_core_cq *cq, u32 cmd,
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mlx5_write64(doorbell, uar_page + MLX5_CQ_DOORBELL, NULL);
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}
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int mlx5_init_cq_table(struct mlx5_core_dev *dev);
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void mlx5_cleanup_cq_table(struct mlx5_core_dev *dev);
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int mlx5_core_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
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u32 *in, int inlen);
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int mlx5_core_destroy_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
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@ -375,8 +375,15 @@ struct mlx5_eq_pagefault {
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mempool_t *pool;
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};
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struct mlx5_cq_table {
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/* protect radix tree */
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spinlock_t lock;
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struct radix_tree_root tree;
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};
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struct mlx5_eq {
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struct mlx5_core_dev *dev;
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struct mlx5_cq_table cq_table;
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__be32 __iomem *doorbell;
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u32 cons_index;
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struct mlx5_buf buf;
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@ -526,13 +533,6 @@ struct mlx5_core_health {
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struct delayed_work recover_work;
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};
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struct mlx5_cq_table {
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/* protect radix tree
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*/
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spinlock_t lock;
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struct radix_tree_root tree;
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};
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struct mlx5_qp_table {
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/* protect radix tree
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*/
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@ -654,10 +654,6 @@ struct mlx5_priv {
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struct dentry *cmdif_debugfs;
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/* end: qp staff */
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/* start: cq staff */
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struct mlx5_cq_table cq_table;
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/* end: cq staff */
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/* start: mkey staff */
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struct mlx5_mkey_table mkey_table;
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/* end: mkey staff */
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@ -1053,12 +1049,12 @@ int mlx5_eq_init(struct mlx5_core_dev *dev);
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void mlx5_eq_cleanup(struct mlx5_core_dev *dev);
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void mlx5_fill_page_array(struct mlx5_buf *buf, __be64 *pas);
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void mlx5_fill_page_frag_array(struct mlx5_frag_buf *frag_buf, __be64 *pas);
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void mlx5_cq_completion(struct mlx5_core_dev *dev, u32 cqn);
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void mlx5_cq_completion(struct mlx5_eq *eq, u32 cqn);
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void mlx5_rsc_event(struct mlx5_core_dev *dev, u32 rsn, int event_type);
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void mlx5_srq_event(struct mlx5_core_dev *dev, u32 srqn, int event_type);
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struct mlx5_core_srq *mlx5_core_get_srq(struct mlx5_core_dev *dev, u32 srqn);
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void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u64 vec, bool forced);
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void mlx5_cq_event(struct mlx5_core_dev *dev, u32 cqn, int event_type);
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void mlx5_cq_event(struct mlx5_eq *eq, u32 cqn, int event_type);
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int mlx5_create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, u8 vecidx,
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int nent, u64 mask, const char *name,
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enum mlx5_eq_type type);
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