ARM: entry: avoid enabling interrupts in prefetch/data abort handlers
Avoid enabling interrupts if the parent context had interrupts enabled in the abort handler assembly code, and move this into the breakpoint/ page/alignment fault handlers instead. This gets rid of some special-casing for the breakpoint fault handlers from the low level abort handler path. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
parent
8b4186160b
commit
02fe2845d6
@ -185,20 +185,15 @@ ENDPROC(__und_invalid)
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__dabt_svc:
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svc_entry
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@
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@ get ready to re-enable interrupts if appropriate
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@
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mrs r9, cpsr
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tst r5, #PSR_I_BIT
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biceq r9, r9, #PSR_I_BIT
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#ifdef CONFIG_TRACE_IRQFLAGS
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bl trace_hardirqs_off
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#endif
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dabt_helper
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@
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@ set desired IRQ state, then call main handler
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@ call main handler
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@
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debug_entry r1
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msr cpsr_c, r9
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mov r2, sp
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bl do_DataAbort
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@ -211,6 +206,12 @@ __dabt_svc:
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@ restore SPSR and restart the instruction
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@
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ldr r5, [sp, #S_PSR]
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#ifdef CONFIG_TRACE_IRQFLAGS
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tst r5, #PSR_I_BIT
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bleq trace_hardirqs_on
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tst r5, #PSR_I_BIT
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blne trace_hardirqs_off
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#endif
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svc_exit r5 @ return from exception
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UNWIND(.fnend )
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ENDPROC(__dabt_svc)
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@ -307,16 +308,11 @@ ENDPROC(__und_svc)
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__pabt_svc:
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svc_entry
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@
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@ re-enable interrupts if appropriate
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@
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mrs r9, cpsr
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tst r5, #PSR_I_BIT
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biceq r9, r9, #PSR_I_BIT
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#ifdef CONFIG_TRACE_IRQFLAGS
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bl trace_hardirqs_off
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#endif
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pabt_helper
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debug_entry r1
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msr cpsr_c, r9 @ Maybe enable interrupts
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mov r2, sp @ regs
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bl do_PrefetchAbort @ call abort handler
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@ -329,6 +325,12 @@ __pabt_svc:
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@ restore SPSR and restart the instruction
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@
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ldr r5, [sp, #S_PSR]
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#ifdef CONFIG_TRACE_IRQFLAGS
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tst r5, #PSR_I_BIT
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bleq trace_hardirqs_on
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tst r5, #PSR_I_BIT
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blne trace_hardirqs_off
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#endif
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svc_exit r5 @ return from exception
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UNWIND(.fnend )
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ENDPROC(__pabt_svc)
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@ -412,11 +414,6 @@ __dabt_usr:
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kuser_cmpxchg_check
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dabt_helper
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@
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@ IRQs on, then call the main handler
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@
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debug_entry r1
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enable_irq
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mov r2, sp
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adr lr, BSYM(ret_from_exception)
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b do_DataAbort
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@ -663,8 +660,6 @@ ENDPROC(__und_usr_unknown)
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__pabt_usr:
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usr_entry
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pabt_helper
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debug_entry r1
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enable_irq @ Enable interrupts
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mov r2, sp @ regs
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bl do_PrefetchAbort @ call abort handler
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UNWIND(.fnend )
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@ -165,25 +165,6 @@
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.endm
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#endif /* !CONFIG_THUMB2_KERNEL */
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@
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@ Debug exceptions are taken as prefetch or data aborts.
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@ We must disable preemption during the handler so that
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@ we can access the debug registers safely.
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@
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.macro debug_entry, fsr
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#if defined(CONFIG_HAVE_HW_BREAKPOINT) && defined(CONFIG_PREEMPT)
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ldr r4, =0x40f @ mask out fsr.fs
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and r5, r4, \fsr
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cmp r5, #2 @ debug exception
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bne 1f
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get_thread_info r10
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ldr r6, [r10, #TI_PREEMPT] @ get preempt count
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add r11, r6, #1 @ increment it
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str r11, [r10, #TI_PREEMPT]
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1:
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#endif
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.endm
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/*
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* These are the registers used in the syscall handler, and allow us to
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* have in theory up to 7 arguments to a function - r0 to r6.
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@ -796,7 +796,7 @@ unlock:
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/*
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* Called from either the Data Abort Handler [watchpoint] or the
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* Prefetch Abort Handler [breakpoint] with preemption disabled.
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* Prefetch Abort Handler [breakpoint] with interrupts disabled.
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*/
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static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr,
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struct pt_regs *regs)
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@ -804,8 +804,10 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr,
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int ret = 0;
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u32 dscr;
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/* We must be called with preemption disabled. */
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WARN_ON(preemptible());
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preempt_disable();
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if (interrupts_enabled(regs))
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local_irq_enable();
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/* We only handle watchpoints and hardware breakpoints. */
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ARM_DBG_READ(c1, 0, dscr);
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@ -824,10 +826,6 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr,
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ret = 1; /* Unhandled fault. */
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}
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/*
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* Re-enable preemption after it was disabled in the
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* low-level exception handling code.
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*/
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preempt_enable();
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return ret;
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@ -727,6 +727,9 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
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int isize = 4;
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int thumb2_32b = 0;
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if (interrupts_enabled(regs))
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local_irq_enable();
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instrptr = instruction_pointer(regs);
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fs = get_fs();
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@ -285,6 +285,10 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
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tsk = current;
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mm = tsk->mm;
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/* Enable interrupts if they were enabled in the parent context. */
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if (interrupts_enabled(regs))
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local_irq_enable();
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/*
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* If we're in an interrupt or have no user
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* context, we must not take the fault..
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