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R-Car DU changes for v4.20

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Merge tag 'du-next-20180914' of git://linuxtv.org/pinchartl/media into drm-next

R-Car DU changes for v4.20

The pull request mostly contains updates to the R-Car DU driver, notably
support for interlaced modes on Gen3 hardware, support for the LVDS output on
R8A77980, and a set of miscellaneous bug fixes. There are also two SPDX
conversion patches for the drm shmobile and panel-lvds drivers, as well as an
update to MAINTAINERS to add Kieran Bingham as a co-maintainer for the DU
driver.

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/3273568.LdoAI77IYW@avalon
This commit is contained in:
Dave Airlie 2018-09-20 14:12:01 +10:00
commit 0320ac5188
36 changed files with 256 additions and 254 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
View File

@ -14,6 +14,7 @@ Required properties:
- "renesas,r8a7795-lvds" for R8A7795 (R-Car H3) compatible LVDS encoders
- "renesas,r8a7796-lvds" for R8A7796 (R-Car M3-W) compatible LVDS encoders
- "renesas,r8a77970-lvds" for R8A77970 (R-Car V3M) compatible LVDS encoders
- "renesas,r8a77980-lvds" for R8A77980 (R-Car V3H) compatible LVDS encoders
- "renesas,r8a77995-lvds" for R8A77995 (R-Car D3) compatible LVDS encoders
- reg: Base address and length for the memory-mapped registers

2
Documentation/devicetree/bindings/display/renesas,du.txt
View File

@ -15,6 +15,7 @@ Required Properties:
- "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU
- "renesas,du-r8a77965" for R8A77965 (R-Car M3-N) compatible DU
- "renesas,du-r8a77970" for R8A77970 (R-Car V3M) compatible DU
- "renesas,du-r8a77980" for R8A77980 (R-Car V3H) compatible DU
- "renesas,du-r8a77995" for R8A77995 (R-Car D3) compatible DU
- reg: the memory-mapped I/O registers base address and length
@ -61,6 +62,7 @@ corresponding to each DU output.
R8A7796 (R-Car M3-W) DPAD 0 HDMI 0 LVDS 0 -
R8A77965 (R-Car M3-N) DPAD 0 HDMI 0 LVDS 0 -
R8A77970 (R-Car V3M) DPAD 0 LVDS 0 - -
R8A77980 (R-Car V3H) DPAD 0 LVDS 0 - -
R8A77995 (R-Car D3) DPAD 0 LVDS 0 LVDS 1 -

3
MAINTAINERS
View File

@ -4870,9 +4870,10 @@ F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
DRM DRIVERS FOR RENESAS
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
M: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
L: dri-devel@lists.freedesktop.org
L: linux-renesas-soc@vger.kernel.org
T: git git://linuxtv.org/pinchartl/fbdev
T: git git://linuxtv.org/pinchartl/media drm/du/next
S: Supported
F: drivers/gpu/drm/rcar-du/
F: drivers/gpu/drm/shmobile/

6
drivers/gpu/drm/panel/panel-lvds.c
View File

@ -1,3 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Generic LVDS panel driver
*
@ -5,11 +6,6 @@
* Copyright (C) 2016 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/backlight.h>

1
drivers/gpu/drm/rcar-du/Kconfig
View File

@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
config DRM_RCAR_DU
tristate "DRM Support for R-Car Display Unit"
depends on DRM && OF

187
drivers/gpu/drm/rcar-du/rcar_du_crtc.c
View File

@ -1,14 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* rcar_du_crtc.c -- R-Car Display Unit CRTCs
*
* Copyright (C) 2013-2015 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/clk.h>
@ -198,6 +194,47 @@ done:
best_diff);
}
struct du_clk_params {
struct clk *clk;
unsigned long rate;
unsigned long diff;
u32 escr;
};
static void rcar_du_escr_divider(struct clk *clk, unsigned long target,
u32 escr, struct du_clk_params *params)
{
unsigned long rate;
unsigned long diff;
u32 div;
/*
* If the target rate has already been achieved perfectly we can't do
* better.
*/
if (params->diff == 0)
return;
/*
* Compute the input clock rate and internal divisor values to obtain
* the clock rate closest to the target frequency.
*/
rate = clk_round_rate(clk, target);
div = clamp(DIV_ROUND_CLOSEST(rate, target), 1UL, 64UL) - 1;
diff = abs(rate / (div + 1) - target);
/*
* Store the parameters if the resulting frequency is better than any
* previously calculated value.
*/
if (diff < params->diff) {
params->clk = clk;
params->rate = rate;
params->diff = diff;
params->escr = escr | div;
}
}
static const struct soc_device_attribute rcar_du_r8a7795_es1[] = {
{ .soc_id = "r8a7795", .revision = "ES1.*" },
{ /* sentinel */ }
@ -208,89 +245,83 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
const struct drm_display_mode *mode = &rcrtc->crtc.state->adjusted_mode;
struct rcar_du_device *rcdu = rcrtc->group->dev;
unsigned long mode_clock = mode->clock * 1000;
unsigned long clk;
u32 value;
u32 dsmr;
u32 escr;
u32 div;
/*
* Compute the clock divisor and select the internal or external dot
* clock based on the requested frequency.
*/
clk = clk_get_rate(rcrtc->clock);
div = DIV_ROUND_CLOSEST(clk, mode_clock);
div = clamp(div, 1U, 64U) - 1;
escr = div | ESCR_DCLKSEL_CLKS;
if (rcrtc->extclock) {
if (rcdu->info->dpll_mask & (1 << rcrtc->index)) {
unsigned long target = mode_clock;
struct dpll_info dpll = { 0 };
unsigned long extclk;
unsigned long extrate;
unsigned long rate;
u32 extdiv;
u32 dpllcr;
u32 div = 0;
/*
* DU channels that have a display PLL can't use the internal
* system clock, and have no internal clock divider.
*/
if (WARN_ON(!rcrtc->extclock))
return;
/*
* The H3 ES1.x exhibits dot clock duty cycle stability issues.
* We can work around them by configuring the DPLL to twice the
* desired frequency, coupled with a /2 post-divider. Restrict
* the workaround to H3 ES1.x as ES2.0 and all other SoCs have
* no post-divider when a display PLL is present (as shown by
* the workaround breaking HDMI output on M3-W during testing).
*/
if (soc_device_match(rcar_du_r8a7795_es1)) {
target *= 2;
div = 1;
}
extclk = clk_get_rate(rcrtc->extclock);
if (rcdu->info->dpll_ch & (1 << rcrtc->index)) {
unsigned long target = mode_clock;
rcar_du_dpll_divider(rcrtc, &dpll, extclk, target);
/*
* The H3 ES1.x exhibits dot clock duty cycle stability
* issues. We can work around them by configuring the
* DPLL to twice the desired frequency, coupled with a
* /2 post-divider. This isn't needed on other SoCs and
* breaks HDMI output on M3-W for a currently unknown
* reason, so restrict the workaround to H3 ES1.x.
*/
if (soc_device_match(rcar_du_r8a7795_es1))
target *= 2;
dpllcr = DPLLCR_CODE | DPLLCR_CLKE
| DPLLCR_FDPLL(dpll.fdpll)
| DPLLCR_N(dpll.n) | DPLLCR_M(dpll.m)
| DPLLCR_STBY;
rcar_du_dpll_divider(rcrtc, &dpll, extclk, target);
extclk = dpll.output;
}
if (rcrtc->index == 1)
dpllcr |= DPLLCR_PLCS1
| DPLLCR_INCS_DOTCLKIN1;
else
dpllcr |= DPLLCR_PLCS0
| DPLLCR_INCS_DOTCLKIN0;
extdiv = DIV_ROUND_CLOSEST(extclk, mode_clock);
extdiv = clamp(extdiv, 1U, 64U) - 1;
rcar_du_group_write(rcrtc->group, DPLLCR, dpllcr);
rate = clk / (div + 1);
extrate = extclk / (extdiv + 1);
escr = ESCR_DCLKSEL_DCLKIN | div;
} else {
struct du_clk_params params = { .diff = (unsigned long)-1 };
if (abs((long)extrate - (long)mode_clock) <
abs((long)rate - (long)mode_clock)) {
rcar_du_escr_divider(rcrtc->clock, mode_clock,
ESCR_DCLKSEL_CLKS, &params);
if (rcrtc->extclock)
rcar_du_escr_divider(rcrtc->extclock, mode_clock,
ESCR_DCLKSEL_DCLKIN, &params);
if (rcdu->info->dpll_ch & (1 << rcrtc->index)) {
u32 dpllcr = DPLLCR_CODE | DPLLCR_CLKE
| DPLLCR_FDPLL(dpll.fdpll)
| DPLLCR_N(dpll.n) | DPLLCR_M(dpll.m)
| DPLLCR_STBY;
dev_dbg(rcrtc->group->dev->dev, "mode clock %lu %s rate %lu\n",
mode_clock, params.clk == rcrtc->clock ? "cpg" : "ext",
params.rate);
if (rcrtc->index == 1)
dpllcr |= DPLLCR_PLCS1
| DPLLCR_INCS_DOTCLKIN1;
else
dpllcr |= DPLLCR_PLCS0
| DPLLCR_INCS_DOTCLKIN0;
rcar_du_group_write(rcrtc->group, DPLLCR,
dpllcr);
}
escr = ESCR_DCLKSEL_DCLKIN | extdiv;
}
dev_dbg(rcrtc->group->dev->dev,
"mode clock %lu extrate %lu rate %lu ESCR 0x%08x\n",
mode_clock, extrate, rate, escr);
clk_set_rate(params.clk, params.rate);
escr = params.escr;
}
rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? ESCR2 : ESCR,
escr);
rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? OTAR2 : OTAR, 0);
dev_dbg(rcrtc->group->dev->dev, "%s: ESCR 0x%08x\n", __func__, escr);
rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? ESCR13 : ESCR02, escr);
rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? OTAR13 : OTAR02, 0);
/* Signal polarities */
value = ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? DSMR_VSL : 0)
| ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? DSMR_HSL : 0)
| DSMR_DIPM_DISP | DSMR_CSPM;
rcar_du_crtc_write(rcrtc, DSMR, value);
dsmr = ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? DSMR_VSL : 0)
| ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? DSMR_HSL : 0)
| ((mode->flags & DRM_MODE_FLAG_INTERLACE) ? DSMR_ODEV : 0)
| DSMR_DIPM_DISP | DSMR_CSPM;
rcar_du_crtc_write(rcrtc, DSMR, dsmr);
/* Display timings */
rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - mode->hsync_start - 19);
@ -684,11 +715,25 @@ static void rcar_du_crtc_atomic_flush(struct drm_crtc *crtc,
rcar_du_vsp_atomic_flush(rcrtc);
}
enum drm_mode_status rcar_du_crtc_mode_valid(struct drm_crtc *crtc,
const struct drm_display_mode *mode)
{
struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
struct rcar_du_device *rcdu = rcrtc->group->dev;
bool interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
if (interlaced && !rcar_du_has(rcdu, RCAR_DU_FEATURE_INTERLACED))
return MODE_NO_INTERLACE;
return MODE_OK;
}
static const struct drm_crtc_helper_funcs crtc_helper_funcs = {
.atomic_begin = rcar_du_crtc_atomic_begin,
.atomic_flush = rcar_du_crtc_atomic_flush,
.atomic_enable = rcar_du_crtc_atomic_enable,
.atomic_disable = rcar_du_crtc_atomic_disable,
.mode_valid = rcar_du_crtc_mode_valid,
};
static void rcar_du_crtc_crc_init(struct rcar_du_crtc *rcrtc)

6
drivers/gpu/drm/rcar-du/rcar_du_crtc.h
View File

@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* rcar_du_crtc.h -- R-Car Display Unit CRTCs
*
* Copyright (C) 2013-2015 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __RCAR_DU_CRTC_H__

44
drivers/gpu/drm/rcar-du/rcar_du_drv.c
View File

@ -1,14 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* rcar_du_drv.c -- R-Car Display Unit DRM driver
*
* Copyright (C) 2013-2015 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/clk.h>
@ -39,7 +35,8 @@
static const struct rcar_du_device_info rzg1_du_r8a7743_info = {
.gen = 2,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_EXT_CTRL_REGS,
| RCAR_DU_FEATURE_EXT_CTRL_REGS
| RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@ -60,7 +57,8 @@ static const struct rcar_du_device_info rzg1_du_r8a7743_info = {
static const struct rcar_du_device_info rzg1_du_r8a7745_info = {
.gen = 2,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_EXT_CTRL_REGS,
| RCAR_DU_FEATURE_EXT_CTRL_REGS
| RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@ -79,7 +77,7 @@ static const struct rcar_du_device_info rzg1_du_r8a7745_info = {
static const struct rcar_du_device_info rcar_du_r8a7779_info = {
.gen = 2,
.features = 0,
.features = RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@ -100,7 +98,8 @@ static const struct rcar_du_device_info rcar_du_r8a7779_info = {
static const struct rcar_du_device_info rcar_du_r8a7790_info = {
.gen = 2,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_EXT_CTRL_REGS,
| RCAR_DU_FEATURE_EXT_CTRL_REGS
| RCAR_DU_FEATURE_INTERLACED,
.quirks = RCAR_DU_QUIRK_ALIGN_128B,
.channels_mask = BIT(2) | BIT(1) | BIT(0),
.routes = {
@ -128,7 +127,8 @@ static const struct rcar_du_device_info rcar_du_r8a7790_info = {
static const struct rcar_du_device_info rcar_du_r8a7791_info = {
.gen = 2,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_EXT_CTRL_REGS,
| RCAR_DU_FEATURE_EXT_CTRL_REGS
| RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@ -150,7 +150,8 @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = {
static const struct rcar_du_device_info rcar_du_r8a7792_info = {
.gen = 2,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_EXT_CTRL_REGS,
| RCAR_DU_FEATURE_EXT_CTRL_REGS
| RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/* R8A7792 has two RGB outputs. */
@ -168,7 +169,8 @@ static const struct rcar_du_device_info rcar_du_r8a7792_info = {
static const struct rcar_du_device_info rcar_du_r8a7794_info = {
.gen = 2,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_EXT_CTRL_REGS,
| RCAR_DU_FEATURE_EXT_CTRL_REGS
| RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@ -190,7 +192,8 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_EXT_CTRL_REGS
| RCAR_DU_FEATURE_VSP1_SOURCE,
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(3) | BIT(2) | BIT(1) | BIT(0),
.routes = {
/*
@ -215,14 +218,15 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = {
},
},
.num_lvds = 1,
.dpll_ch = BIT(2) | BIT(1),
.dpll_mask = BIT(2) | BIT(1),
};
static const struct rcar_du_device_info rcar_du_r8a7796_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_EXT_CTRL_REGS
| RCAR_DU_FEATURE_VSP1_SOURCE,
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(2) | BIT(1) | BIT(0),
.routes = {
/*
@ -243,14 +247,15 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = {
},
},
.num_lvds = 1,
.dpll_ch = BIT(1),
.dpll_mask = BIT(1),
};
static const struct rcar_du_device_info rcar_du_r8a77965_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_EXT_CTRL_REGS
| RCAR_DU_FEATURE_VSP1_SOURCE,
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(3) | BIT(1) | BIT(0),
.routes = {
/*
@ -271,14 +276,15 @@ static const struct rcar_du_device_info rcar_du_r8a77965_info = {
},
},
.num_lvds = 1,
.dpll_ch = BIT(1),
.dpll_mask = BIT(1),
};
static const struct rcar_du_device_info rcar_du_r8a77970_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_EXT_CTRL_REGS
| RCAR_DU_FEATURE_VSP1_SOURCE,
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(0),
.routes = {
/* R8A77970 has one RGB output and one LVDS output. */

18
drivers/gpu/drm/rcar-du/rcar_du_drv.h
View File

@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* rcar_du_drv.h -- R-Car Display Unit DRM driver
*
* Copyright (C) 2013-2015 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __RCAR_DU_DRV_H__
@ -27,11 +23,12 @@ struct drm_device;
struct drm_fbdev_cma;
struct rcar_du_device;
#define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK (1 << 0) /* Per-CRTC IRQ and clock */
#define RCAR_DU_FEATURE_EXT_CTRL_REGS (1 << 1) /* Has extended control registers */
#define RCAR_DU_FEATURE_VSP1_SOURCE (1 << 2) /* Has inputs from VSP1 */
#define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK BIT(0) /* Per-CRTC IRQ and clock */
#define RCAR_DU_FEATURE_EXT_CTRL_REGS BIT(1) /* Has extended control registers */
#define RCAR_DU_FEATURE_VSP1_SOURCE BIT(2) /* Has inputs from VSP1 */
#define RCAR_DU_FEATURE_INTERLACED BIT(3) /* HW supports interlaced */
#define RCAR_DU_QUIRK_ALIGN_128B (1 << 0) /* Align pitches to 128 bytes */
#define RCAR_DU_QUIRK_ALIGN_128B BIT(0) /* Align pitches to 128 bytes */
/*
* struct rcar_du_output_routing - Output routing specification
@ -55,6 +52,7 @@ struct rcar_du_output_routing {
* @channels_mask: bit mask of available DU channels
* @routes: array of CRTC to output routes, indexed by output (RCAR_DU_OUTPUT_*)
* @num_lvds: number of internal LVDS encoders
* @dpll_mask: bit mask of DU channels equipped with a DPLL
*/
struct rcar_du_device_info {
unsigned int gen;
@ -63,7 +61,7 @@ struct rcar_du_device_info {
unsigned int channels_mask;
struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
unsigned int num_lvds;
unsigned int dpll_ch;
unsigned int dpll_mask;
};
#define RCAR_DU_MAX_CRTCS 4

6
drivers/gpu/drm/rcar-du/rcar_du_encoder.c
View File

@ -1,14 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* rcar_du_encoder.c -- R-Car Display Unit Encoder
*
* Copyright (C) 2013-2014 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/export.h>

6
drivers/gpu/drm/rcar-du/rcar_du_encoder.h
View File

@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* rcar_du_encoder.h -- R-Car Display Unit Encoder
*
* Copyright (C) 2013-2014 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __RCAR_DU_ENCODER_H__

6
drivers/gpu/drm/rcar-du/rcar_du_group.c
View File

@ -1,14 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* rcar_du_group.c -- R-Car Display Unit Channels Pair
*
* Copyright (C) 2013-2015 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
/*

6
drivers/gpu/drm/rcar-du/rcar_du_group.h
View File

@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* rcar_du_group.c -- R-Car Display Unit Planes and CRTCs Group
*
* Copyright (C) 2013-2014 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __RCAR_DU_GROUP_H__

87
drivers/gpu/drm/rcar-du/rcar_du_kms.c
View File

@ -1,14 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* rcar_du_kms.c -- R-Car Display Unit Mode Setting
*
* Copyright (C) 2013-2015 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <drm/drmP.h>
@ -101,6 +97,38 @@ static const struct rcar_du_format_info rcar_du_format_infos[] = {
* associated .pnmr or .edf settings.
*/
{
.fourcc = DRM_FORMAT_RGB332,
.bpp = 8,
.planes = 1,
}, {
.fourcc = DRM_FORMAT_ARGB4444,
.bpp = 16,
.planes = 1,
}, {
.fourcc = DRM_FORMAT_XRGB4444,
.bpp = 16,
.planes = 1,
}, {
.fourcc = DRM_FORMAT_BGR888,
.bpp = 24,
.planes = 1,
}, {
.fourcc = DRM_FORMAT_RGB888,
.bpp = 24,
.planes = 1,
}, {
.fourcc = DRM_FORMAT_BGRA8888,
.bpp = 32,
.planes = 1,
}, {
.fourcc = DRM_FORMAT_BGRX8888,
.bpp = 32,
.planes = 1,
}, {
.fourcc = DRM_FORMAT_YVYU,
.bpp = 16,
.planes = 1,
}, {
.fourcc = DRM_FORMAT_NV61,
.bpp = 16,
.planes = 2,
@ -176,7 +204,6 @@ rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
const struct rcar_du_format_info *format;
unsigned int max_pitch;
unsigned int align;
unsigned int bpp;
unsigned int i;
format = rcar_du_format_info(mode_cmd->pixel_format);
@ -186,20 +213,32 @@ rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
return ERR_PTR(-EINVAL);
}
/*
* The pitch and alignment constraints are expressed in pixels on the
* hardware side and in bytes in the DRM API.
*/
bpp = format->planes == 1 ? format->bpp / 8 : 1;
max_pitch = 4096 * bpp;
if (rcdu->info->gen < 3) {
/*
* On Gen2 the DU limits the pitch to 4095 pixels and requires
* buffers to be aligned to a 16 pixels boundary (or 128 bytes
* on some platforms).
*/
unsigned int bpp = format->planes == 1 ? format->bpp / 8 : 1;
if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
align = 128;
else
align = 16 * bpp;
max_pitch = 4095 * bpp;
if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
align = 128;
else
align = 16 * bpp;
} else {
/*
* On Gen3 the memory interface is handled by the VSP that
* limits the pitch to 65535 bytes and has no alignment
* constraint.
*/
max_pitch = 65535;
align = 1;
}
if (mode_cmd->pitches[0] & (align - 1) ||
mode_cmd->pitches[0] >= max_pitch) {
mode_cmd->pitches[0] > max_pitch) {
dev_dbg(dev->dev, "invalid pitch value %u\n",
mode_cmd->pitches[0]);
return ERR_PTR(-EINVAL);
@ -516,12 +555,22 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
dev->mode_config.min_width = 0;
dev->mode_config.min_height = 0;
dev->mode_config.max_width = 4095;
dev->mode_config.max_height = 2047;
dev->mode_config.normalize_zpos = true;
dev->mode_config.funcs = &rcar_du_mode_config_funcs;
dev->mode_config.helper_private = &rcar_du_mode_config_helper;
if (rcdu->info->gen < 3) {
dev->mode_config.max_width = 4095;
dev->mode_config.max_height = 2047;
} else {
/*
* The Gen3 DU uses the VSP1 for memory access, and is limited
* to frame sizes of 8190x8190.
*/
dev->mode_config.max_width = 8190;
dev->mode_config.max_height = 8190;
}
rcdu->num_crtcs = hweight8(rcdu->info->channels_mask);
ret = rcar_du_properties_init(rcdu);

6
drivers/gpu/drm/rcar-du/rcar_du_kms.h
View File

@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* rcar_du_kms.h -- R-Car Display Unit Mode Setting
*
* Copyright (C) 2013-2014 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __RCAR_DU_KMS_H__

6
drivers/gpu/drm/rcar-du/rcar_du_plane.c
View File

@ -1,14 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* rcar_du_plane.c -- R-Car Display Unit Planes
*
* Copyright (C) 2013-2015 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <drm/drmP.h>

6
drivers/gpu/drm/rcar-du/rcar_du_plane.h
View File

@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* rcar_du_plane.h -- R-Car Display Unit Planes
*
* Copyright (C) 2013-2014 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __RCAR_DU_PLANE_H__

13
drivers/gpu/drm/rcar-du/rcar_du_regs.h
View File

@ -1,13 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* rcar_du_regs.h -- R-Car Display Unit Registers Definitions
*
* Copyright (C) 2013-2015 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*/
#ifndef __RCAR_DU_REGS_H__
@ -492,8 +489,8 @@
* External Synchronization Control Registers
*/
#define ESCR 0x10000
#define ESCR2 0x31000
#define ESCR02 0x10000
#define ESCR13 0x01000
#define ESCR_DCLKOINV (1 << 25)
#define ESCR_DCLKSEL_DCLKIN (0 << 20)
#define ESCR_DCLKSEL_CLKS (1 << 20)
@ -504,8 +501,8 @@
#define ESCR_SYNCSEL_EXHSYNC (3 << 8)
#define ESCR_FRQSEL_MASK (0x3f << 0)
#define OTAR 0x10004
#define OTAR2 0x31004
#define OTAR02 0x10004
#define OTAR13 0x01004
/* -----------------------------------------------------------------------------
* Dual Display Output Control Registers

9
drivers/gpu/drm/rcar-du/rcar_du_vsp.c
View File

@ -1,14 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* rcar_du_vsp.h -- R-Car Display Unit VSP-Based Compositor
*
* Copyright (C) 2015 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <drm/drmP.h>
@ -52,6 +48,7 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)
struct vsp1_du_lif_config cfg = {
.width = mode->hdisplay,
.height = mode->vdisplay,
.interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE,
.callback = rcar_du_vsp_complete,
.callback_data = crtc,
};
@ -129,7 +126,6 @@ static const u32 formats_kms[] = {
DRM_FORMAT_ARGB8888,
DRM_FORMAT_XRGB8888,
DRM_FORMAT_UYVY,
DRM_FORMAT_VYUY,
DRM_FORMAT_YUYV,
DRM_FORMAT_YVYU,
DRM_FORMAT_NV12,
@ -158,7 +154,6 @@ static const u32 formats_v4l2[] = {
V4L2_PIX_FMT_ABGR32,
V4L2_PIX_FMT_XBGR32,
V4L2_PIX_FMT_UYVY,
V4L2_PIX_FMT_VYUY,
V4L2_PIX_FMT_YUYV,
V4L2_PIX_FMT_YVYU,
V4L2_PIX_FMT_NV12M,

6
drivers/gpu/drm/rcar-du/rcar_du_vsp.h
View File

@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* rcar_du_vsp.h -- R-Car Display Unit VSP-Based Compositor
*
* Copyright (C) 2015 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __RCAR_DU_VSP_H__

6
drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c
View File

@ -1,14 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* R-Car Gen3 HDMI PHY
*
* Copyright (C) 2016 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/module.h>

1
drivers/gpu/drm/rcar-du/rcar_lvds.c
View File

@ -522,6 +522,7 @@ static const struct of_device_id rcar_lvds_of_table[] = {
{ .compatible = "renesas,r8a7795-lvds", .data = &rcar_lvds_gen3_info },
{ .compatible = "renesas,r8a7796-lvds", .data = &rcar_lvds_gen3_info },
{ .compatible = "renesas,r8a77970-lvds", .data = &rcar_lvds_r8a77970_info },
{ .compatible = "renesas,r8a77980-lvds", .data = &rcar_lvds_gen3_info },
{ }
};

5
drivers/gpu/drm/rcar-du/rcar_lvds_regs.h
View File

@ -1,13 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* rcar_lvds_regs.h -- R-Car LVDS Interface Registers Definitions
*
* Copyright (C) 2013-2015 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*/
#ifndef __RCAR_LVDS_REGS_H__

1
drivers/gpu/drm/shmobile/Kconfig
View File

@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
config DRM_SHMOBILE
tristate "DRM Support for SH Mobile"
depends on DRM && ARM

6
drivers/gpu/drm/shmobile/shmob_drm_backlight.c
View File

@ -1,14 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* shmob_drm_backlight.c -- SH Mobile DRM Backlight
*
* Copyright (C) 2012 Renesas Electronics Corporation
*
* Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/backlight.h>

6
drivers/gpu/drm/shmobile/shmob_drm_backlight.h
View File

@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* shmob_drm_backlight.h -- SH Mobile DRM Backlight
*
* Copyright (C) 2012 Renesas Electronics Corporation
*
* Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __SHMOB_DRM_BACKLIGHT_H__

6
drivers/gpu/drm/shmobile/shmob_drm_crtc.c
View File

@ -1,14 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* shmob_drm_crtc.c -- SH Mobile DRM CRTCs
*
* Copyright (C) 2012 Renesas Electronics Corporation
*
* Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/backlight.h>

6
drivers/gpu/drm/shmobile/shmob_drm_crtc.h
View File

@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* shmob_drm_crtc.h -- SH Mobile DRM CRTCs
*
* Copyright (C) 2012 Renesas Electronics Corporation
*
* Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __SHMOB_DRM_CRTC_H__

6
drivers/gpu/drm/shmobile/shmob_drm_drv.c
View File

@ -1,14 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* shmob_drm_drv.c -- SH Mobile DRM driver
*
* Copyright (C) 2012 Renesas Electronics Corporation
*
* Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/clk.h>

6
drivers/gpu/drm/shmobile/shmob_drm_drv.h
View File

@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* shmob_drm.h -- SH Mobile DRM driver
*
* Copyright (C) 2012 Renesas Electronics Corporation
*
* Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __SHMOB_DRM_DRV_H__

6
drivers/gpu/drm/shmobile/shmob_drm_kms.c
View File

@ -1,14 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* shmob_drm_kms.c -- SH Mobile DRM Mode Setting
*
* Copyright (C) 2012 Renesas Electronics Corporation
*
* Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <drm/drmP.h>

6
drivers/gpu/drm/shmobile/shmob_drm_kms.h
View File

@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* shmob_drm_kms.h -- SH Mobile DRM Mode Setting
*
* Copyright (C) 2012 Renesas Electronics Corporation
*
* Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __SHMOB_DRM_KMS_H__

6
drivers/gpu/drm/shmobile/shmob_drm_plane.c
View File

@ -1,14 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* shmob_drm_plane.c -- SH Mobile DRM Planes
*
* Copyright (C) 2012 Renesas Electronics Corporation
*
* Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <drm/drmP.h>

6
drivers/gpu/drm/shmobile/shmob_drm_plane.h
View File

@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* shmob_drm_plane.h -- SH Mobile DRM Planes
*
* Copyright (C) 2012 Renesas Electronics Corporation
*
* Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __SHMOB_DRM_PLANE_H__

6
drivers/gpu/drm/shmobile/shmob_drm_regs.h
View File

@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* shmob_drm_regs.h -- SH Mobile DRM registers
*
* Copyright (C) 2012 Renesas Electronics Corporation
*
* Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __SHMOB_DRM_REGS_H__

6
include/linux/platform_data/shmob_drm.h
View File

@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* shmob_drm.h -- SH Mobile DRM driver
*
* Copyright (C) 2012 Renesas Corporation
*
* Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __SHMOB_DRM_H__