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drm/i915/gt: Remove bogus comment on IVB_FBC_RT_BASE_UPPER

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The comment on the parameter being 0 to avoid the read back doesn't
apply as this is not a call to wa_add(), but rather to
wa_write_clr_set(). So, this register is actually checked and it's
according to the Bspec that the register is RW, not RO.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230630203509.1635216-7-lucas.demarchi@intel.com
This commit is contained in:
Lucas De Marchi 2023-06-30 13:35:08 -07:00
parent 9a54a7c3f3
commit 03286f9480
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/i915/gt/intel_workarounds.c
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@ -666,7 +666,7 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine,
/* Wa_1604278689:icl,ehl */
wa_write(wal, IVB_FBC_RT_BASE, 0xFFFFFFFF & ~ILK_FBC_RT_VALID);
wa_write_clr_set(wal, IVB_FBC_RT_BASE_UPPER,
0, /* write-only register; skip validation */
0,
0xFFFFFFFF);
/* Wa_1406306137:icl,ehl */