More arm64 updates for 5.10
- Improve performance of Spectre-v2 mitigation on Falkor CPUs (if you're lucky enough to have one) - Select HAVE_MOVE_PMD. This has been shown to improve mremap() performance, which is used heavily by the Android runtime GC, and it seems we forgot to enable this upstream back in 2018. - Ensure linker flags are consistent between LLVM and BFD - Fix stale comment in Spectre mitigation rework - Fix broken copyright header - Fix KASLR randomisation of the linear map - Prevent arm64-specific prctl()s from compat tasks (return -EINVAL) -----BEGIN PGP SIGNATURE----- iQFEBAABCgAuFiEEPxTL6PPUbjXGY88ct6xw3ITBYzQFAl+QEPAQHHdpbGxAa2Vy bmVsLm9yZwAKCRC3rHDchMFjNE8jB/0YNYKO9mis/Xn5KcOCwlg4dbc2uVBknZXD f7otEJ6SOax2HcWz8qJlrJ+qbGFawPIqFBUAM0vU1VmoyctIoKRFTA8ACfWfWtnK QBfHrcxtJCh/GGq+E1IyuqWzCjppeY/7gYVdgi1xDEZRSaLz53MC1GVBwKBtu5cf X2Bfm8d9+PSSnmKfpO65wSCTvN3PQX1SNEHwwTWFZQx0p7GcQK1DdwoobM6dRnVy +e984ske+2a+nTrkhLSyQIgsfHuLB4pD6XdM/UOThnfdNxdQ0dUGn375sXP+b4dW 7MTH9HP/dXIymTcuErMXOHJXLk/zUiUBaOxkmOxdvrhQd0uFNFIc =e9p9 -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull more arm64 updates from Will Deacon: "A small selection of further arm64 fixes and updates. Most of these are fixes that came in during the merge window, with the exception of the HAVE_MOVE_PMD mremap() speed-up which we discussed back in 2018 and somehow forgot to enable upstream. - Improve performance of Spectre-v2 mitigation on Falkor CPUs (if you're lucky enough to have one) - Select HAVE_MOVE_PMD. This has been shown to improve mremap() performance, which is used heavily by the Android runtime GC, and it seems we forgot to enable this upstream back in 2018. - Ensure linker flags are consistent between LLVM and BFD - Fix stale comment in Spectre mitigation rework - Fix broken copyright header - Fix KASLR randomisation of the linear map - Prevent arm64-specific prctl()s from compat tasks (return -EINVAL)" Link: https://lore.kernel.org/kvmarm/20181108181201.88826-3-joelaf@google.com/ * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: proton-pack: Update comment to reflect new function name arm64: spectre-v2: Favour CPU-specific mitigation at EL2 arm64: link with -z norelro regardless of CONFIG_RELOCATABLE arm64: Fix a broken copyright header in gen_vdso_offsets.sh arm64: mremap speedup - Enable HAVE_MOVE_PMD arm64: mm: use single quantity to represent the PA to VA translation arm64: reject prctl(PR_PAC_RESET_KEYS) on compat tasks
This commit is contained in:
commit
032c7ed958
@ -123,6 +123,7 @@ config ARM64
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select GENERIC_VDSO_TIME_NS
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select HANDLE_DOMAIN_IRQ
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select HARDIRQS_SW_RESEND
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select HAVE_MOVE_PMD
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select HAVE_PCI
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select HAVE_ACPI_APEI if (ACPI && EFI)
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select HAVE_ALIGNED_STRUCT_PAGE if SLUB
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@ -10,13 +10,13 @@
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#
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# Copyright (C) 1995-2001 by Russell King
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LDFLAGS_vmlinux :=--no-undefined -X
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LDFLAGS_vmlinux :=--no-undefined -X -z norelro
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ifeq ($(CONFIG_RELOCATABLE), y)
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# Pass --no-apply-dynamic-relocs to restore pre-binutils-2.27 behaviour
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# for relative relocs, since this leads to better Image compression
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# with the relocation offsets always being zero.
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LDFLAGS_vmlinux += -shared -Bsymbolic -z notext -z norelro \
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LDFLAGS_vmlinux += -shared -Bsymbolic -z notext \
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$(call ld-option, --no-apply-dynamic-relocs)
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endif
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@ -169,7 +169,6 @@
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extern u64 vabits_actual;
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#define PAGE_END (_PAGE_END(vabits_actual))
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extern s64 physvirt_offset;
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extern s64 memstart_addr;
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/* PHYS_OFFSET - the physical address of the start of memory. */
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#define PHYS_OFFSET ({ VM_BUG_ON(memstart_addr & 1); memstart_addr; })
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@ -245,7 +244,7 @@ static inline const void *__tag_set(const void *addr, u8 tag)
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*/
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#define __is_lm_address(addr) (!(((u64)addr) & BIT(vabits_actual - 1)))
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#define __lm_to_phys(addr) (((addr) + physvirt_offset))
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#define __lm_to_phys(addr) (((addr) & ~PAGE_OFFSET) + PHYS_OFFSET)
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#define __kimg_to_phys(addr) ((addr) - kimage_voffset)
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#define __virt_to_phys_nodebug(x) ({ \
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@ -263,7 +262,7 @@ extern phys_addr_t __phys_addr_symbol(unsigned long x);
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#define __phys_addr_symbol(x) __pa_symbol_nodebug(x)
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#endif /* CONFIG_DEBUG_VIRTUAL */
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#define __phys_to_virt(x) ((unsigned long)((x) - physvirt_offset))
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#define __phys_to_virt(x) ((unsigned long)((x) - PHYS_OFFSET) | PAGE_OFFSET)
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#define __phys_to_kimg(x) ((unsigned long)((x) + kimage_voffset))
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/*
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@ -24,6 +24,8 @@
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#define VMALLOC_START (MODULES_END)
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#define VMALLOC_END (- PUD_SIZE - VMEMMAP_SIZE - SZ_64K)
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#define vmemmap ((struct page *)VMEMMAP_START - (memstart_addr >> PAGE_SHIFT))
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#define FIRST_USER_ADDRESS 0UL
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#ifndef __ASSEMBLY__
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@ -34,8 +36,6 @@
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#include <linux/mm_types.h>
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#include <linux/sched.h>
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extern struct page *vmemmap;
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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#define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
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@ -678,7 +678,7 @@ int sve_set_current_vl(unsigned long arg)
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vl = arg & PR_SVE_VL_LEN_MASK;
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flags = arg & ~vl;
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if (!system_supports_sve())
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if (!system_supports_sve() || is_compat_task())
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return -EINVAL;
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ret = sve_set_vector_length(current, vl, flags);
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@ -691,7 +691,7 @@ int sve_set_current_vl(unsigned long arg)
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/* PR_SVE_GET_VL */
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int sve_get_current_vl(void)
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{
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if (!system_supports_sve())
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if (!system_supports_sve() || is_compat_task())
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return -EINVAL;
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return sve_prctl_status(0);
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@ -1,5 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0
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#include <linux/compat.h>
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#include <linux/errno.h>
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#include <linux/prctl.h>
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#include <linux/random.h>
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@ -17,6 +18,9 @@ int ptrauth_prctl_reset_keys(struct task_struct *tsk, unsigned long arg)
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if (!system_supports_address_auth() && !system_supports_generic_auth())
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return -EINVAL;
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if (is_compat_thread(task_thread_info(tsk)))
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return -EINVAL;
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if (!arg) {
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ptrauth_keys_init_user(keys);
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return 0;
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@ -67,7 +67,8 @@ ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr,
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* - Mitigated in hardware and advertised by ID_AA64PFR0_EL1.CSV2.
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* - Mitigated in hardware and listed in our "safe list".
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* - Mitigated in software by firmware.
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* - Mitigated in software by a CPU-specific dance in the kernel.
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* - Mitigated in software by a CPU-specific dance in the kernel and a
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* firmware call at EL2.
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* - Vulnerable.
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*
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* It's not unlikely for different CPUs in a big.LITTLE system to fall into
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@ -204,8 +205,8 @@ static void install_bp_hardening_cb(bp_hardening_cb_t fn)
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__SMCCC_WORKAROUND_1_SMC_SZ;
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/*
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* detect_harden_bp_fw() passes NULL for the hyp_vecs start/end if
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* we're a guest. Skip the hyp-vectors work.
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* Vinz Clortho takes the hyp_vecs start/end "keys" at
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* the door when we're a guest. Skip the hyp-vectors work.
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*/
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if (!is_hyp_mode_available()) {
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__this_cpu_write(bp_hardening_data.fn, fn);
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@ -259,6 +260,16 @@ static void qcom_link_stack_sanitisation(void)
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: "=&r" (tmp));
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}
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static bp_hardening_cb_t spectre_v2_get_sw_mitigation_cb(void)
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{
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u32 midr = read_cpuid_id();
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if (((midr & MIDR_CPU_MODEL_MASK) != MIDR_QCOM_FALKOR) &&
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((midr & MIDR_CPU_MODEL_MASK) != MIDR_QCOM_FALKOR_V1))
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return NULL;
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return qcom_link_stack_sanitisation;
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}
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static enum mitigation_state spectre_v2_enable_fw_mitigation(void)
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{
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bp_hardening_cb_t cb;
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@ -284,26 +295,15 @@ static enum mitigation_state spectre_v2_enable_fw_mitigation(void)
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return SPECTRE_VULNERABLE;
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}
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/*
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* Prefer a CPU-specific workaround if it exists. Note that we
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* still rely on firmware for the mitigation at EL2.
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*/
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cb = spectre_v2_get_sw_mitigation_cb() ?: cb;
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install_bp_hardening_cb(cb);
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return SPECTRE_MITIGATED;
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}
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static enum mitigation_state spectre_v2_enable_sw_mitigation(void)
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{
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u32 midr;
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if (spectre_v2_mitigations_off())
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return SPECTRE_VULNERABLE;
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midr = read_cpuid_id();
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if (((midr & MIDR_CPU_MODEL_MASK) != MIDR_QCOM_FALKOR) &&
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((midr & MIDR_CPU_MODEL_MASK) != MIDR_QCOM_FALKOR_V1))
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return SPECTRE_VULNERABLE;
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install_bp_hardening_cb(qcom_link_stack_sanitisation);
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return SPECTRE_MITIGATED;
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}
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void spectre_v2_enable_mitigation(const struct arm64_cpu_capabilities *__unused)
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{
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enum mitigation_state state;
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@ -313,8 +313,6 @@ void spectre_v2_enable_mitigation(const struct arm64_cpu_capabilities *__unused)
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state = spectre_v2_get_cpu_hw_mitigation_state();
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if (state == SPECTRE_VULNERABLE)
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state = spectre_v2_enable_fw_mitigation();
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if (state == SPECTRE_VULNERABLE)
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state = spectre_v2_enable_sw_mitigation();
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update_mitigation_state(&spectre_v2_state, state);
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}
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# Doing this inside the Makefile will break the $(filter-out) function,
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# causing Kbuild to rebuild the vdso-offsets header file every time.
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#
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# Author: Will Deacon <will.deacon@arm.com
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# Author: Will Deacon <will.deacon@arm.com>
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#
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LC_ALL=C
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s64 memstart_addr __ro_after_init = -1;
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EXPORT_SYMBOL(memstart_addr);
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s64 physvirt_offset __ro_after_init;
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EXPORT_SYMBOL(physvirt_offset);
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struct page *vmemmap __ro_after_init;
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EXPORT_SYMBOL(vmemmap);
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/*
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* We create both ZONE_DMA and ZONE_DMA32. ZONE_DMA covers the first 1G of
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* memory as some devices, namely the Raspberry Pi 4, have peripherals with
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@ -289,20 +283,6 @@ void __init arm64_memblock_init(void)
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memstart_addr = round_down(memblock_start_of_DRAM(),
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ARM64_MEMSTART_ALIGN);
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physvirt_offset = PHYS_OFFSET - PAGE_OFFSET;
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vmemmap = ((struct page *)VMEMMAP_START - (memstart_addr >> PAGE_SHIFT));
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/*
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* If we are running with a 52-bit kernel VA config on a system that
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* does not support it, we have to offset our vmemmap and physvirt_offset
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* s.t. we avoid the 52-bit portion of the direct linear map
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*/
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if (IS_ENABLED(CONFIG_ARM64_VA_BITS_52) && (vabits_actual != 52)) {
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vmemmap += (_PAGE_OFFSET(48) - _PAGE_OFFSET(52)) >> PAGE_SHIFT;
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physvirt_offset = PHYS_OFFSET - _PAGE_OFFSET(48);
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}
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/*
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* Remove the memory that we will not be able to cover with the
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* linear mapping. Take care not to clip the kernel which may be
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@ -317,6 +297,16 @@ void __init arm64_memblock_init(void)
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memblock_remove(0, memstart_addr);
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}
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/*
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* If we are running with a 52-bit kernel VA config on a system that
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* does not support it, we have to place the available physical
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* memory in the 48-bit addressable part of the linear region, i.e.,
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* we have to move it upward. Since memstart_addr represents the
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* physical address of PAGE_OFFSET, we have to *subtract* from it.
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*/
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if (IS_ENABLED(CONFIG_ARM64_VA_BITS_52) && (vabits_actual != 52))
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memstart_addr -= _PAGE_OFFSET(48) - _PAGE_OFFSET(52);
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/*
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* Apply the memory limit if it was set. Since the kernel may be loaded
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* high up in memory, add back the kernel region that must be accessible
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