From 036bc85c1d06ef0a0924aed3fbbef8dccb86b9a1 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Wed, 16 Jan 2019 18:37:53 +0000 Subject: [PATCH] arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodes According to the latest information, clkp2 is available on RZ/G2. Modify CAN0 and CAN1 nodes accordingly. Signed-off-by: Fabrizio Castro Reviewed-by: Chris Paterson Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi index 5b7fca953964..638eb015d6ca 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi @@ -969,8 +969,10 @@ "renesas,rcar-gen3-can"; reg = <0 0xe6c30000 0 0x1000>; interrupts = ; - clocks = <&cpg CPG_MOD 916>, <&can_clk>; - clock-names = "clkp1", "can_clk"; + clocks = <&cpg CPG_MOD 916>, + <&cpg CPG_CORE R8A774C0_CLK_CANFD>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; resets = <&cpg 916>; status = "disabled"; @@ -981,8 +983,10 @@ "renesas,rcar-gen3-can"; reg = <0 0xe6c38000 0 0x1000>; interrupts = ; - clocks = <&cpg CPG_MOD 915>, <&can_clk>; - clock-names = "clkp1", "can_clk"; + clocks = <&cpg CPG_MOD 915>, + <&cpg CPG_CORE R8A774C0_CLK_CANFD>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; resets = <&cpg 915>; status = "disabled";