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drm/amdgpu: move umc_ras_if from gmc to umc block

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umc_ras_if is relevant to umc

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tao Zhou 2019-09-12 16:34:08 +08:00 committed by Alex Deucher
parent fc04e6b484
commit 03740baab3
4 changed files with 17 additions and 17 deletions
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1
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
View File

@ -181,7 +181,6 @@ struct amdgpu_gmc {
struct amdgpu_xgmi xgmi;
struct amdgpu_irq_src ecc_irq;
struct ras_common_if *umc_ras_if;
struct ras_common_if *mmhub_ras_if;
};

28
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
View File

@ -35,24 +35,24 @@ int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, void *ras_ih_info)
if (!ih_info)
return -EINVAL;
if (!adev->gmc.umc_ras_if) {
adev->gmc.umc_ras_if =
if (!adev->umc.ras_if) {
adev->umc.ras_if =
kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
if (!adev->gmc.umc_ras_if)
if (!adev->umc.ras_if)
return -ENOMEM;
adev->gmc.umc_ras_if->block = AMDGPU_RAS_BLOCK__UMC;
adev->gmc.umc_ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
adev->gmc.umc_ras_if->sub_block_index = 0;
strcpy(adev->gmc.umc_ras_if->name, "umc");
adev->umc.ras_if->block = AMDGPU_RAS_BLOCK__UMC;
adev->umc.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
adev->umc.ras_if->sub_block_index = 0;
strcpy(adev->umc.ras_if->name, "umc");
}
ih_info->head = fs_info.head = *adev->gmc.umc_ras_if;
ih_info->head = fs_info.head = *adev->umc.ras_if;
r = amdgpu_ras_late_init(adev, adev->gmc.umc_ras_if,
r = amdgpu_ras_late_init(adev, adev->umc.ras_if,
&fs_info, ih_info);
if (r)
goto free;
if (amdgpu_ras_is_supported(adev, adev->gmc.umc_ras_if->block)) {
if (amdgpu_ras_is_supported(adev, adev->umc.ras_if->block)) {
r = amdgpu_irq_get(adev, &adev->gmc.ecc_irq, 0);
if (r)
goto late_fini;
@ -68,10 +68,10 @@ int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, void *ras_ih_info)
return 0;
late_fini:
amdgpu_ras_late_fini(adev, adev->gmc.umc_ras_if, ih_info);
amdgpu_ras_late_fini(adev, adev->umc.ras_if, ih_info);
free:
kfree(adev->gmc.umc_ras_if);
adev->gmc.umc_ras_if = NULL;
kfree(adev->umc.ras_if);
adev->umc.ras_if = NULL;
return r;
}
@ -125,7 +125,7 @@ int amdgpu_umc_process_ecc_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{
struct ras_common_if *ras_if = adev->gmc.umc_ras_if;
struct ras_common_if *ras_if = adev->umc.ras_if;
struct ras_dispatch_if ih_data = {
.entry = entry,
};

1
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
View File

@ -77,6 +77,7 @@ struct amdgpu_umc {
uint32_t channel_offs;
/* channel index table of interleaved memory */
const uint32_t *channel_idx_tbl;
struct ras_common_if *ras_if;
const struct amdgpu_umc_funcs *funcs;
};

4
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
View File

@ -1109,8 +1109,8 @@ static int gmc_v9_0_sw_fini(void *handle)
void *stolen_vga_buf;
if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__UMC) &&
adev->gmc.umc_ras_if) {
struct ras_common_if *ras_if = adev->gmc.umc_ras_if;
adev->umc.ras_if) {
struct ras_common_if *ras_if = adev->umc.ras_if;
struct ras_ih_if ih_info = {
.head = *ras_if,
};