ARM: dts: imx6dl-prtmvt: configure ethernet reference clock parent
On this board the PHY is the ref clock provider. So, configure ethernet reference clock as input. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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887185649c
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03c8a3c719
@ -193,6 +193,7 @@
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-output-names = "enet_ref_pad";
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};
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reg_1v8: regulator-1v8 {
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@ -293,8 +294,10 @@
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};
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
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clocks = <&clk50m_phy>;
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clock-names = "enet_ref_pad";
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_ENET_REF_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, <&clk50m_phy>;
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};
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&ecspi1 {
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@ -314,10 +317,6 @@
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rmii";
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clocks = <&clks IMX6QDL_CLK_ENET>,
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<&clks IMX6QDL_CLK_ENET>,
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<&clk50m_phy>;
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clock-names = "ipg", "ahb", "ptp";
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phy-handle = <&rmii_phy>;
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status = "okay";
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