Updates for X86 PCI interrupt routing:
- Cleanup and robustify the PCI interrupt routing table handling
including proper range checks
- Add support for Intel 82378ZB/82379AB, SiS85C497 PIRQ routers
- Fix the ALi M1487 router handling
- Handle the IRT routing table format in AMI BIOSes correctly
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Merge tag 'x86-irq-2022-05-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 PCI irq routing updates from Thomas Gleixner:
- Cleanup and robustify the PCI interrupt routing table handling
including proper range checks
- Add support for Intel 82378ZB/82379AB, SiS85C497 PIRQ routers
- Fix the ALi M1487 router handling
- Handle the IRT routing table format in AMI BIOSes correctly
* tag 'x86-irq-2022-05-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/PCI: Fix coding style in PIRQ table verification
x86/PCI: Fix ALi M1487 (IBC) PIRQ router link value interpretation
x86/PCI: Add $IRT PIRQ routing table support
x86/PCI: Handle PIRQ routing tables with no router device given
x86/PCI: Add PIRQ routing table range checks
x86/PCI: Add support for the SiS85C497 PIRQ router
x86/PCI: Disambiguate SiS85C503 PIRQ router code entities
x86/PCI: Handle IRQ swizzling with PIRQ routers
x86/PCI: Also match function number in $PIR table
x86/PCI: Include function number in $PIR table dump
x86/PCI: Show the physical address of the $PIR table
This commit is contained in:
Linus Torvalds
commit
03e1ccd45f
@ -93,6 +93,15 @@ struct irq_routing_table {
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struct irq_info slots[];
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} __attribute__((packed));
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struct irt_routing_table {
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u32 signature; /* IRT_SIGNATURE should be here */
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u8 size; /* Number of entries provided */
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u8 used; /* Number of entries actually used */
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u16 exclusive_irqs; /* IRQs devoted exclusively to
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PCI usage */
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struct irq_info slots[];
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} __attribute__((packed));
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extern unsigned int pcibios_irq_mask;
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extern raw_spinlock_t pci_config_lock;
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@ -25,6 +25,8 @@
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#define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
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#define PIRQ_VERSION 0x0100
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#define IRT_SIGNATURE (('$' << 0) + ('I' << 8) + ('R' << 16) + ('T' << 24))
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static int broken_hp_bios_irq9;
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static int acer_tm360_irqrouting;
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@ -68,30 +70,99 @@ void (*pcibios_disable_irq)(struct pci_dev *dev) = pirq_disable_irq;
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* and perform checksum verification.
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*/
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static inline struct irq_routing_table *pirq_check_routing_table(u8 *addr)
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static inline struct irq_routing_table *pirq_check_routing_table(u8 *addr,
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u8 *limit)
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{
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struct irq_routing_table *rt;
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int i;
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u8 sum;
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rt = (struct irq_routing_table *) addr;
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rt = (struct irq_routing_table *)addr;
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if (rt->signature != PIRQ_SIGNATURE ||
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rt->version != PIRQ_VERSION ||
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rt->size % 16 ||
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rt->size < sizeof(struct irq_routing_table))
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rt->size < sizeof(struct irq_routing_table) ||
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(limit && rt->size > limit - addr))
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return NULL;
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sum = 0;
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for (i = 0; i < rt->size; i++)
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sum += addr[i];
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if (!sum) {
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DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%p\n",
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rt);
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DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%lx\n",
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__pa(rt));
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return rt;
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}
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return NULL;
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}
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/*
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* Handle the $IRT PCI IRQ Routing Table format used by AMI for its BCP
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* (BIOS Configuration Program) external tool meant for tweaking BIOS
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* structures without the need to rebuild it from sources. The $IRT
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* format has been invented by AMI before Microsoft has come up with its
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* $PIR format and a $IRT table is therefore there in some systems that
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* lack a $PIR table.
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*
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* It uses the same PCI BIOS 2.1 format for interrupt routing entries
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* themselves but has a different simpler header prepended instead,
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* occupying 8 bytes, where a `$IRT' signature is followed by one byte
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* specifying the total number of interrupt routing entries allocated in
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* the table, then one byte specifying the actual number of entries used
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* (which the BCP tool can take advantage of when modifying the table),
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* and finally a 16-bit word giving the IRQs devoted exclusively to PCI.
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* Unlike with the $PIR table there is no alignment guarantee.
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*
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* Given the similarity of the two formats the $IRT one is trivial to
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* convert to the $PIR one, which we do here, except that obviously we
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* have no information as to the router device to use, but we can handle
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* it by matching PCI device IDs actually seen on the bus against ones
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* that our individual routers recognise.
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*
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* Reportedly there is another $IRT table format where a 16-bit word
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* follows the header instead that points to interrupt routing entries
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* in a $PIR table provided elsewhere. In that case this code will not
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* be reached though as the $PIR table will have been chosen instead.
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*/
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static inline struct irq_routing_table *pirq_convert_irt_table(u8 *addr,
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u8 *limit)
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{
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struct irt_routing_table *ir;
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struct irq_routing_table *rt;
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u16 size;
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u8 sum;
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int i;
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ir = (struct irt_routing_table *)addr;
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if (ir->signature != IRT_SIGNATURE || !ir->used || ir->size < ir->used)
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return NULL;
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size = sizeof(*ir) + ir->used * sizeof(ir->slots[0]);
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if (size > limit - addr)
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return NULL;
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DBG(KERN_DEBUG "PCI: $IRT Interrupt Routing Table found at 0x%lx\n",
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__pa(ir));
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size = sizeof(*rt) + ir->used * sizeof(rt->slots[0]);
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rt = kzalloc(size, GFP_KERNEL);
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if (!rt)
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return NULL;
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rt->signature = PIRQ_SIGNATURE;
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rt->version = PIRQ_VERSION;
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rt->size = size;
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rt->exclusive_irqs = ir->exclusive_irqs;
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for (i = 0; i < ir->used; i++)
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rt->slots[i] = ir->slots[i];
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addr = (u8 *)rt;
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sum = 0;
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for (i = 0; i < size; i++)
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sum += addr[i];
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rt->checksum = -sum;
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return rt;
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}
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/*
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* Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
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@ -99,17 +170,29 @@ static inline struct irq_routing_table *pirq_check_routing_table(u8 *addr)
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static struct irq_routing_table * __init pirq_find_routing_table(void)
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{
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u8 * const bios_start = (u8 *)__va(0xf0000);
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u8 * const bios_end = (u8 *)__va(0x100000);
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u8 *addr;
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struct irq_routing_table *rt;
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if (pirq_table_addr) {
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rt = pirq_check_routing_table((u8 *) __va(pirq_table_addr));
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rt = pirq_check_routing_table((u8 *)__va(pirq_table_addr),
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NULL);
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if (rt)
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return rt;
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printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n");
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}
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for (addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
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rt = pirq_check_routing_table(addr);
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for (addr = bios_start;
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addr < bios_end - sizeof(struct irq_routing_table);
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addr += 16) {
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rt = pirq_check_routing_table(addr, bios_end);
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if (rt)
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return rt;
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}
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for (addr = bios_start;
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addr < bios_end - sizeof(struct irt_routing_table);
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addr++) {
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rt = pirq_convert_irt_table(addr, bios_end);
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if (rt)
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return rt;
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}
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@ -135,7 +218,8 @@ static void __init pirq_peer_trick(void)
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#ifdef DEBUG
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{
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int j;
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DBG(KERN_DEBUG "%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
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DBG(KERN_DEBUG "%02x:%02x.%x slot=%02x",
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e->bus, e->devfn / 8, e->devfn % 8, e->slot);
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for (j = 0; j < 4; j++)
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DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
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DBG("\n");
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@ -253,6 +337,15 @@ static void write_pc_conf_nybble(u8 base, u8 index, u8 val)
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pc_conf_set(reg, x);
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}
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/*
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* FinALi pirq rules are as follows:
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*
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* - bit 0 selects between INTx Routing Table Mapping Registers,
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*
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* - bit 3 selects the nibble within the INTx Routing Table Mapping Register,
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*
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* - bits 7:4 map to bits 3:0 of the PCI INTx Sensitivity Register.
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*/
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static int pirq_finali_get(struct pci_dev *router, struct pci_dev *dev,
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int pirq)
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{
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@ -260,11 +353,13 @@ static int pirq_finali_get(struct pci_dev *router, struct pci_dev *dev,
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0, 9, 3, 10, 4, 5, 7, 6, 0, 11, 0, 12, 0, 14, 0, 15
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};
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unsigned long flags;
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u8 index;
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u8 x;
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index = (pirq & 1) << 1 | (pirq & 8) >> 3;
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raw_spin_lock_irqsave(&pc_conf_lock, flags);
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pc_conf_set(PC_CONF_FINALI_LOCK, PC_CONF_FINALI_LOCK_KEY);
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x = irqmap[read_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, pirq - 1)];
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x = irqmap[read_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, index)];
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pc_conf_set(PC_CONF_FINALI_LOCK, 0);
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raw_spin_unlock_irqrestore(&pc_conf_lock, flags);
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return x;
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@ -278,13 +373,15 @@ static int pirq_finali_set(struct pci_dev *router, struct pci_dev *dev,
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};
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u8 val = irqmap[irq];
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unsigned long flags;
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u8 index;
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if (!val)
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return 0;
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index = (pirq & 1) << 1 | (pirq & 8) >> 3;
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raw_spin_lock_irqsave(&pc_conf_lock, flags);
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pc_conf_set(PC_CONF_FINALI_LOCK, PC_CONF_FINALI_LOCK_KEY);
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write_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, pirq - 1, val);
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write_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, index, val);
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pc_conf_set(PC_CONF_FINALI_LOCK, 0);
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raw_spin_unlock_irqrestore(&pc_conf_lock, flags);
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return 1;
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@ -293,7 +390,7 @@ static int pirq_finali_set(struct pci_dev *router, struct pci_dev *dev,
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static int pirq_finali_lvl(struct pci_dev *router, struct pci_dev *dev,
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int pirq, int irq)
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{
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u8 mask = ~(1u << (pirq - 1));
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u8 mask = ~((pirq & 0xf0u) >> 4);
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unsigned long flags;
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u8 trig;
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@ -579,6 +676,81 @@ static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq,
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return 1;
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}
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/*
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* PIRQ routing for the SiS85C497 AT Bus Controller & Megacell (ATM)
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* ISA bridge used with the SiS 85C496/497 486 Green PC VESA/ISA/PCI
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* Chipset.
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*
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* There are four PCI INTx#-to-IRQ Link registers provided in the
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* SiS85C497 part of the peculiar combined 85C496/497 configuration
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* space decoded by the SiS85C496 PCI & CPU Memory Controller (PCM)
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* host bridge, at 0xc0/0xc1/0xc2/0xc3 respectively for the PCI INT
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* A/B/C/D lines. Bit 7 enables the respective link if set and bits
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* 3:0 select the 8259A IRQ line as follows:
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*
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* 0000 : Reserved
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* 0001 : Reserved
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* 0010 : Reserved
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* 0011 : IRQ3
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* 0100 : IRQ4
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* 0101 : IRQ5
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* 0110 : IRQ6
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* 0111 : IRQ7
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* 1000 : Reserved
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* 1001 : IRQ9
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* 1010 : IRQ10
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* 1011 : IRQ11
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* 1100 : IRQ12
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* 1101 : Reserved
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* 1110 : IRQ14
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* 1111 : IRQ15
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*
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* We avoid using a reserved value for disabled links, hence the
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* choice of IRQ15 for that case.
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*
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* References:
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*
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* "486 Green PC VESA/ISA/PCI Chipset, SiS 85C496/497", Rev 3.0,
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* Silicon Integrated Systems Corp., July 1995
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*/
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#define PCI_SIS497_INTA_TO_IRQ_LINK 0xc0u
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#define PIRQ_SIS497_IRQ_MASK 0x0fu
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#define PIRQ_SIS497_IRQ_ENABLE 0x80u
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static int pirq_sis497_get(struct pci_dev *router, struct pci_dev *dev,
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int pirq)
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{
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int reg;
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u8 x;
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reg = pirq;
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if (reg >= 1 && reg <= 4)
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reg += PCI_SIS497_INTA_TO_IRQ_LINK - 1;
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pci_read_config_byte(router, reg, &x);
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return (x & PIRQ_SIS497_IRQ_ENABLE) ? (x & PIRQ_SIS497_IRQ_MASK) : 0;
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}
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static int pirq_sis497_set(struct pci_dev *router, struct pci_dev *dev,
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int pirq, int irq)
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{
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int reg;
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u8 x;
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reg = pirq;
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if (reg >= 1 && reg <= 4)
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reg += PCI_SIS497_INTA_TO_IRQ_LINK - 1;
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pci_read_config_byte(router, reg, &x);
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x &= ~(PIRQ_SIS497_IRQ_MASK | PIRQ_SIS497_IRQ_ENABLE);
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x |= irq ? (PIRQ_SIS497_IRQ_ENABLE | irq) : PIRQ_SIS497_IRQ_MASK;
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pci_write_config_byte(router, reg, x);
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return 1;
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}
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/*
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* PIRQ routing for SiS 85C503 router used in several SiS chipsets.
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* We have to deal with the following issues here:
|
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@ -640,11 +812,12 @@ static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq,
|
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* bit 6-4 are probably unused, not like 5595
|
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*/
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#define PIRQ_SIS_IRQ_MASK 0x0f
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#define PIRQ_SIS_IRQ_DISABLE 0x80
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#define PIRQ_SIS_USB_ENABLE 0x40
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#define PIRQ_SIS503_IRQ_MASK 0x0f
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#define PIRQ_SIS503_IRQ_DISABLE 0x80
|
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#define PIRQ_SIS503_USB_ENABLE 0x40
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static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
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static int pirq_sis503_get(struct pci_dev *router, struct pci_dev *dev,
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int pirq)
|
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{
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u8 x;
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int reg;
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@ -653,10 +826,11 @@ static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
|
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if (reg >= 0x01 && reg <= 0x04)
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reg += 0x40;
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pci_read_config_byte(router, reg, &x);
|
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return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
|
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return (x & PIRQ_SIS503_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS503_IRQ_MASK);
|
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}
|
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|
||||
static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
|
||||
static int pirq_sis503_set(struct pci_dev *router, struct pci_dev *dev,
|
||||
int pirq, int irq)
|
||||
{
|
||||
u8 x;
|
||||
int reg;
|
||||
@ -665,8 +839,8 @@ static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, i
|
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if (reg >= 0x01 && reg <= 0x04)
|
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reg += 0x40;
|
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pci_read_config_byte(router, reg, &x);
|
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x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE);
|
||||
x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE;
|
||||
x &= ~(PIRQ_SIS503_IRQ_MASK | PIRQ_SIS503_IRQ_DISABLE);
|
||||
x |= irq ? irq : PIRQ_SIS503_IRQ_DISABLE;
|
||||
pci_write_config_byte(router, reg, x);
|
||||
return 1;
|
||||
}
|
||||
@ -958,13 +1132,19 @@ static __init int serverworks_router_probe(struct irq_router *r,
|
||||
|
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static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
|
||||
{
|
||||
if (device != PCI_DEVICE_ID_SI_503)
|
||||
return 0;
|
||||
|
||||
r->name = "SIS";
|
||||
r->get = pirq_sis_get;
|
||||
r->set = pirq_sis_set;
|
||||
return 1;
|
||||
switch (device) {
|
||||
case PCI_DEVICE_ID_SI_496:
|
||||
r->name = "SiS85C497";
|
||||
r->get = pirq_sis497_get;
|
||||
r->set = pirq_sis497_set;
|
||||
return 1;
|
||||
case PCI_DEVICE_ID_SI_503:
|
||||
r->name = "SiS85C503";
|
||||
r->get = pirq_sis503_get;
|
||||
r->set = pirq_sis503_set;
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
|
||||
@ -1084,10 +1264,32 @@ static struct pci_dev *pirq_router_dev;
|
||||
* chipset" ?
|
||||
*/
|
||||
|
||||
static bool __init pirq_try_router(struct irq_router *r,
|
||||
struct irq_routing_table *rt,
|
||||
struct pci_dev *dev)
|
||||
{
|
||||
struct irq_router_handler *h;
|
||||
|
||||
DBG(KERN_DEBUG "PCI: Trying IRQ router for [%04x:%04x]\n",
|
||||
dev->vendor, dev->device);
|
||||
|
||||
for (h = pirq_routers; h->vendor; h++) {
|
||||
/* First look for a router match */
|
||||
if (rt->rtr_vendor == h->vendor &&
|
||||
h->probe(r, dev, rt->rtr_device))
|
||||
return true;
|
||||
/* Fall back to a device match */
|
||||
if (dev->vendor == h->vendor &&
|
||||
h->probe(r, dev, dev->device))
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
static void __init pirq_find_router(struct irq_router *r)
|
||||
{
|
||||
struct irq_routing_table *rt = pirq_table;
|
||||
struct irq_router_handler *h;
|
||||
struct pci_dev *dev;
|
||||
|
||||
#ifdef CONFIG_PCI_BIOS
|
||||
if (!rt->signature) {
|
||||
@ -1106,50 +1308,94 @@ static void __init pirq_find_router(struct irq_router *r)
|
||||
DBG(KERN_DEBUG "PCI: Attempting to find IRQ router for [%04x:%04x]\n",
|
||||
rt->rtr_vendor, rt->rtr_device);
|
||||
|
||||
pirq_router_dev = pci_get_domain_bus_and_slot(0, rt->rtr_bus,
|
||||
rt->rtr_devfn);
|
||||
if (!pirq_router_dev) {
|
||||
DBG(KERN_DEBUG "PCI: Interrupt router not found at "
|
||||
"%02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
|
||||
return;
|
||||
/* Use any vendor:device provided by the routing table or try all. */
|
||||
if (rt->rtr_vendor) {
|
||||
dev = pci_get_domain_bus_and_slot(0, rt->rtr_bus,
|
||||
rt->rtr_devfn);
|
||||
if (dev && pirq_try_router(r, rt, dev))
|
||||
pirq_router_dev = dev;
|
||||
} else {
|
||||
dev = NULL;
|
||||
for_each_pci_dev(dev) {
|
||||
if (pirq_try_router(r, rt, dev)) {
|
||||
pirq_router_dev = dev;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for (h = pirq_routers; h->vendor; h++) {
|
||||
/* First look for a router match */
|
||||
if (rt->rtr_vendor == h->vendor &&
|
||||
h->probe(r, pirq_router_dev, rt->rtr_device))
|
||||
break;
|
||||
/* Fall back to a device match */
|
||||
if (pirq_router_dev->vendor == h->vendor &&
|
||||
h->probe(r, pirq_router_dev, pirq_router_dev->device))
|
||||
break;
|
||||
}
|
||||
dev_info(&pirq_router_dev->dev, "%s IRQ router [%04x:%04x]\n",
|
||||
pirq_router.name,
|
||||
pirq_router_dev->vendor, pirq_router_dev->device);
|
||||
if (pirq_router_dev)
|
||||
dev_info(&pirq_router_dev->dev, "%s IRQ router [%04x:%04x]\n",
|
||||
pirq_router.name,
|
||||
pirq_router_dev->vendor, pirq_router_dev->device);
|
||||
else
|
||||
DBG(KERN_DEBUG "PCI: Interrupt router not found at "
|
||||
"%02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
|
||||
|
||||
/* The device remains referenced for the kernel lifetime */
|
||||
}
|
||||
|
||||
static struct irq_info *pirq_get_info(struct pci_dev *dev)
|
||||
/*
|
||||
* We're supposed to match on the PCI device only and not the function,
|
||||
* but some BIOSes build their tables with the PCI function included
|
||||
* for motherboard devices, so if a complete match is found, then give
|
||||
* it precedence over a slot match.
|
||||
*/
|
||||
static struct irq_info *pirq_get_dev_info(struct pci_dev *dev)
|
||||
{
|
||||
struct irq_routing_table *rt = pirq_table;
|
||||
int entries = (rt->size - sizeof(struct irq_routing_table)) /
|
||||
sizeof(struct irq_info);
|
||||
struct irq_info *slotinfo = NULL;
|
||||
struct irq_info *info;
|
||||
|
||||
for (info = rt->slots; entries--; info++)
|
||||
if (info->bus == dev->bus->number &&
|
||||
PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
|
||||
return info;
|
||||
return NULL;
|
||||
if (info->bus == dev->bus->number) {
|
||||
if (info->devfn == dev->devfn)
|
||||
return info;
|
||||
if (!slotinfo &&
|
||||
PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
|
||||
slotinfo = info;
|
||||
}
|
||||
return slotinfo;
|
||||
}
|
||||
|
||||
/*
|
||||
* Buses behind bridges are typically not listed in the PIRQ routing table.
|
||||
* Do the usual dance then and walk the tree of bridges up adjusting the
|
||||
* pin number accordingly on the way until the originating root bus device
|
||||
* has been reached and then use its routing information.
|
||||
*/
|
||||
static struct irq_info *pirq_get_info(struct pci_dev *dev, u8 *pin)
|
||||
{
|
||||
struct pci_dev *temp_dev = dev;
|
||||
struct irq_info *info;
|
||||
u8 temp_pin = *pin;
|
||||
u8 dpin = temp_pin;
|
||||
|
||||
info = pirq_get_dev_info(dev);
|
||||
while (!info && temp_dev->bus->parent) {
|
||||
struct pci_dev *bridge = temp_dev->bus->self;
|
||||
|
||||
temp_pin = pci_swizzle_interrupt_pin(temp_dev, temp_pin);
|
||||
info = pirq_get_dev_info(bridge);
|
||||
if (info)
|
||||
dev_warn(&dev->dev,
|
||||
"using bridge %s INT %c to get INT %c\n",
|
||||
pci_name(bridge),
|
||||
'A' + temp_pin - 1, 'A' + dpin - 1);
|
||||
|
||||
temp_dev = bridge;
|
||||
}
|
||||
*pin = temp_pin;
|
||||
return info;
|
||||
}
|
||||
|
||||
static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
|
||||
{
|
||||
u8 pin;
|
||||
struct irq_info *info;
|
||||
int i, pirq, newirq;
|
||||
u8 dpin, pin;
|
||||
int irq = 0;
|
||||
u32 mask;
|
||||
struct irq_router *r = &pirq_router;
|
||||
@ -1157,8 +1403,8 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
|
||||
char *msg = NULL;
|
||||
|
||||
/* Find IRQ pin */
|
||||
pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
|
||||
if (!pin) {
|
||||
pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &dpin);
|
||||
if (!dpin) {
|
||||
dev_dbg(&dev->dev, "no interrupt pin\n");
|
||||
return 0;
|
||||
}
|
||||
@ -1171,20 +1417,21 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
|
||||
if (!pirq_table)
|
||||
return 0;
|
||||
|
||||
info = pirq_get_info(dev);
|
||||
pin = dpin;
|
||||
info = pirq_get_info(dev, &pin);
|
||||
if (!info) {
|
||||
dev_dbg(&dev->dev, "PCI INT %c not found in routing table\n",
|
||||
'A' + pin - 1);
|
||||
'A' + dpin - 1);
|
||||
return 0;
|
||||
}
|
||||
pirq = info->irq[pin - 1].link;
|
||||
mask = info->irq[pin - 1].bitmap;
|
||||
if (!pirq) {
|
||||
dev_dbg(&dev->dev, "PCI INT %c not routed\n", 'A' + pin - 1);
|
||||
dev_dbg(&dev->dev, "PCI INT %c not routed\n", 'A' + dpin - 1);
|
||||
return 0;
|
||||
}
|
||||
dev_dbg(&dev->dev, "PCI INT %c -> PIRQ %02x, mask %04x, excl %04x",
|
||||
'A' + pin - 1, pirq, mask, pirq_table->exclusive_irqs);
|
||||
'A' + dpin - 1, pirq, mask, pirq_table->exclusive_irqs);
|
||||
mask &= pcibios_irq_mask;
|
||||
|
||||
/* Work around broken HP Pavilion Notebooks which assign USB to
|
||||
@ -1226,7 +1473,7 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
|
||||
newirq = i;
|
||||
}
|
||||
}
|
||||
dev_dbg(&dev->dev, "PCI INT %c -> newirq %d", 'A' + pin - 1, newirq);
|
||||
dev_dbg(&dev->dev, "PCI INT %c -> newirq %d", 'A' + dpin - 1, newirq);
|
||||
|
||||
/* Check if it is hardcoded */
|
||||
if ((pirq & 0xf0) == 0xf0) {
|
||||
@ -1260,15 +1507,17 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
dev_info(&dev->dev, "%s PCI INT %c -> IRQ %d\n", msg, 'A' + pin - 1, irq);
|
||||
dev_info(&dev->dev, "%s PCI INT %c -> IRQ %d\n",
|
||||
msg, 'A' + dpin - 1, irq);
|
||||
|
||||
/* Update IRQ for all devices with the same pirq value */
|
||||
for_each_pci_dev(dev2) {
|
||||
pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin);
|
||||
if (!pin)
|
||||
pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &dpin);
|
||||
if (!dpin)
|
||||
continue;
|
||||
|
||||
info = pirq_get_info(dev2);
|
||||
pin = dpin;
|
||||
info = pirq_get_info(dev2, &pin);
|
||||
if (!info)
|
||||
continue;
|
||||
if (info->irq[pin - 1].link == pirq) {
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user