drm/i915: s/HAS_BAR2_SMEM_STOLEN/HAS_LMEMBAR_SMEM_STOLEN/
The fact that LMEMBAR is BAR2 should be of no real interest to anyone. So use the name of the BAR rather than its index. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221005154159.18750-3-ville.syrjala@linux.intel.com Acked-by: Matthew Auld <matthew.auld@intel.com>
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@ -79,7 +79,7 @@ void i915_gem_stolen_remove_node(struct drm_i915_private *i915,
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static bool valid_stolen_size(struct drm_i915_private *i915, struct resource *dsm)
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{
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return (dsm->start != 0 || HAS_BAR2_SMEM_STOLEN(i915)) && dsm->end > dsm->start;
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return (dsm->start != 0 || HAS_LMEMBAR_SMEM_STOLEN(i915)) && dsm->end > dsm->start;
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}
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static int adjust_stolen(struct drm_i915_private *i915,
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@ -151,9 +151,9 @@ static int request_smem_stolen(struct drm_i915_private *i915,
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* address range since it's local to the gpu.
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*
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* Starting MTL, in IGFX devices the stolen memory is exposed via
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* BAR2 and shall be considered similar to stolen lmem.
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* LMEMBAR and shall be considered similar to stolen lmem.
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*/
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if (HAS_LMEM(i915) || HAS_BAR2_SMEM_STOLEN(i915))
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if (HAS_LMEM(i915) || HAS_LMEMBAR_SMEM_STOLEN(i915))
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return 0;
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/*
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@ -406,7 +406,7 @@ static void icl_get_stolen_reserved(struct drm_i915_private *i915,
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MISSING_CASE(reg_val & GEN8_STOLEN_RESERVED_SIZE_MASK);
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}
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if (HAS_BAR2_SMEM_STOLEN(i915))
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if (HAS_LMEMBAR_SMEM_STOLEN(i915))
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/* the base is initialized to stolen top so subtract size to get base */
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*base -= *size;
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else
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@ -881,7 +881,7 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type,
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if (!i915_pci_resource_valid(pdev, GEN12_LMEM_BAR))
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return ERR_PTR(-ENXIO);
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if (HAS_BAR2_SMEM_STOLEN(i915) || IS_DG1(i915)) {
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if (HAS_LMEMBAR_SMEM_STOLEN(i915) || IS_DG1(i915)) {
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lmem_size = pci_resource_len(pdev, GEN12_LMEM_BAR);
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} else {
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resource_size_t lmem_range;
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@ -891,7 +891,7 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type,
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lmem_size *= SZ_1G;
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}
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if (HAS_BAR2_SMEM_STOLEN(i915)) {
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if (HAS_LMEMBAR_SMEM_STOLEN(i915)) {
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/*
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* MTL dsm size is in GGC register.
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* Also MTL uses offset to DSMBASE in ptes, so i915
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@ -917,7 +917,7 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type,
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}
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io_size = dsm_size;
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if (HAS_BAR2_SMEM_STOLEN(i915)) {
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if (HAS_LMEMBAR_SMEM_STOLEN(i915)) {
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io_start = pci_resource_start(pdev, GEN12_LMEM_BAR) + SZ_8M;
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} else if (pci_resource_len(pdev, GEN12_LMEM_BAR) < lmem_size) {
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io_start = 0;
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@ -931,7 +931,7 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
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unsigned int size;
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u16 snb_gmch_ctl;
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if (!HAS_LMEM(i915) && !HAS_BAR2_SMEM_STOLEN(i915)) {
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if (!HAS_LMEM(i915) && !HAS_LMEMBAR_SMEM_STOLEN(i915)) {
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if (!i915_pci_resource_valid(pdev, GEN4_GMADR_BAR))
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return -ENXIO;
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@ -970,8 +970,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
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#define HAS_ONE_EU_PER_FUSE_BIT(i915) (INTEL_INFO(i915)->has_one_eu_per_fuse_bit)
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#define HAS_BAR2_SMEM_STOLEN(i915) (!HAS_LMEM(i915) && \
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GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
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#define HAS_LMEMBAR_SMEM_STOLEN(i915) (!HAS_LMEM(i915) && \
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GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
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/* intel_device_info.c */
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static inline struct intel_device_info *
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