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crypto: qat - use masks for AE groups

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[ Upstream commit f7df2329eec1729a606bba8ed1566a1b3c248bad ]

The adf_fw_config structures hardcode a bit mask that represents the
acceleration engines (AEs) where a certain firmware image will have to
be loaded to. Remove the hardcoded masks and replace them with defines.

This does not introduce any functional change.

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Damian Muszynski <damian.muszynski@intel.com>
Reviewed-by: Tero Kristo <tero.kristo@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Stable-dep-of: a238487f7965 ("crypto: qat - fix ring to service map for QAT GEN4")
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Giovanni Cabiddu 2023-10-20 15:49:22 +02:00 committed by Greg Kroah-Hartman
parent a7be12fbac
commit 04985fb71a
1 changed files with 25 additions and 21 deletions
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46
drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c
View File

@ -14,6 +14,10 @@
#include "adf_cfg_services.h"
#include "icp_qat_hw.h"
#define ADF_AE_GROUP_0 GENMASK(3, 0)
#define ADF_AE_GROUP_1 GENMASK(7, 4)
#define ADF_AE_GROUP_2 BIT(8)
enum adf_fw_objs {
ADF_FW_SYM_OBJ,
ADF_FW_ASYM_OBJ,
@ -41,45 +45,45 @@ struct adf_fw_config {
};
static const struct adf_fw_config adf_fw_cy_config[] = {
{0xF0, ADF_FW_SYM_OBJ},
{0xF, ADF_FW_ASYM_OBJ},
{0x100, ADF_FW_ADMIN_OBJ},
{ADF_AE_GROUP_1, ADF_FW_SYM_OBJ},
{ADF_AE_GROUP_0, ADF_FW_ASYM_OBJ},
{ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ},
};
static const struct adf_fw_config adf_fw_dc_config[] = {
{0xF0, ADF_FW_DC_OBJ},
{0xF, ADF_FW_DC_OBJ},
{0x100, ADF_FW_ADMIN_OBJ},
{ADF_AE_GROUP_1, ADF_FW_DC_OBJ},
{ADF_AE_GROUP_0, ADF_FW_DC_OBJ},
{ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ},
};
static const struct adf_fw_config adf_fw_sym_config[] = {
{0xF0, ADF_FW_SYM_OBJ},
{0xF, ADF_FW_SYM_OBJ},
{0x100, ADF_FW_ADMIN_OBJ},
{ADF_AE_GROUP_1, ADF_FW_SYM_OBJ},
{ADF_AE_GROUP_0, ADF_FW_SYM_OBJ},
{ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ},
};
static const struct adf_fw_config adf_fw_asym_config[] = {
{0xF0, ADF_FW_ASYM_OBJ},
{0xF, ADF_FW_ASYM_OBJ},
{0x100, ADF_FW_ADMIN_OBJ},
{ADF_AE_GROUP_1, ADF_FW_ASYM_OBJ},
{ADF_AE_GROUP_0, ADF_FW_ASYM_OBJ},
{ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ},
};
static const struct adf_fw_config adf_fw_asym_dc_config[] = {
{0xF0, ADF_FW_ASYM_OBJ},
{0xF, ADF_FW_DC_OBJ},
{0x100, ADF_FW_ADMIN_OBJ},
{ADF_AE_GROUP_1, ADF_FW_ASYM_OBJ},
{ADF_AE_GROUP_0, ADF_FW_DC_OBJ},
{ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ},
};
static const struct adf_fw_config adf_fw_sym_dc_config[] = {
{0xF0, ADF_FW_SYM_OBJ},
{0xF, ADF_FW_DC_OBJ},
{0x100, ADF_FW_ADMIN_OBJ},
{ADF_AE_GROUP_1, ADF_FW_SYM_OBJ},
{ADF_AE_GROUP_0, ADF_FW_DC_OBJ},
{ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ},
};
static const struct adf_fw_config adf_fw_dcc_config[] = {
{0xF0, ADF_FW_DC_OBJ},
{0xF, ADF_FW_SYM_OBJ},
{0x100, ADF_FW_ADMIN_OBJ},
{ADF_AE_GROUP_1, ADF_FW_DC_OBJ},
{ADF_AE_GROUP_0, ADF_FW_SYM_OBJ},
{ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ},
};
static_assert(ARRAY_SIZE(adf_fw_cy_config) == ARRAY_SIZE(adf_fw_dc_config));