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arm64: dts: qcom: Use "pcie" as the node name instead of "pci"

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Qcom SoCs doesn't support the legacy PCI, but only PCIe. So use the correct
node name for the controller instances.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20231206135540.17068-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Manivannan Sadhasivam 2023-12-06 19:25:39 +05:30 committed by Bjorn Andersson
parent 4555798a21
commit 052c9a1f14
13 changed files with 25 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/qcom/ipq6018.dtsi
View File

@ -802,7 +802,7 @@
};
};
pcie0: pci@20000000 {
pcie0: pcie@20000000 {
compatible = "qcom,pcie-ipq6018";
reg = <0x0 0x20000000 0x0 0xf1d>,
<0x0 0x20000f20 0x0 0xa8>,

4
arch/arm64/boot/dts/qcom/ipq8074.dtsi
View File

@ -789,7 +789,7 @@
};
};
pcie1: pci@10000000 {
pcie1: pcie@10000000 {
compatible = "qcom,pcie-ipq8074";
reg = <0x10000000 0xf1d>,
<0x10000f20 0xa8>,
@ -850,7 +850,7 @@
status = "disabled";
};
pcie0: pci@20000000 {
pcie0: pcie@20000000 {
compatible = "qcom,pcie-ipq8074-gen3";
reg = <0x20000000 0xf1d>,
<0x20000f20 0xa8>,

2
arch/arm64/boot/dts/qcom/msm8998.dtsi
View File

@ -933,7 +933,7 @@
<GIC_SPI 465 IRQ_TYPE_EDGE_RISING>;
};
pcie0: pci@1c00000 {
pcie0: pcie@1c00000 {
compatible = "qcom,pcie-msm8998", "qcom,pcie-msm8996";
reg = <0x01c00000 0x2000>,
<0x1b000000 0xf1d>,

2
arch/arm64/boot/dts/qcom/qcs404.dtsi
View File

@ -1461,7 +1461,7 @@
};
};
pcie: pci@10000000 {
pcie: pcie@10000000 {
compatible = "qcom,pcie-qcs404";
reg = <0x10000000 0xf1d>,
<0x10000f20 0xa8>,

4
arch/arm64/boot/dts/qcom/sa8775p.dtsi
View File

@ -3515,7 +3515,7 @@
<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
};
pcie0: pci@1c00000{
pcie0: pcie@1c00000{
compatible = "qcom,pcie-sa8775p";
reg = <0x0 0x01c00000 0x0 0x3000>,
<0x0 0x40000000 0x0 0xf20>,
@ -3615,7 +3615,7 @@
status = "disabled";
};
pcie1: pci@1c10000{
pcie1: pcie@1c10000{
compatible = "qcom,pcie-sa8775p";
reg = <0x0 0x01c10000 0x0 0x3000>,
<0x0 0x60000000 0x0 0xf20>,

2
arch/arm64/boot/dts/qcom/sc7280.dtsi
View File

@ -2147,7 +2147,7 @@
qcom,smem-state-names = "wlan-smp2p-out";
};
pcie1: pci@1c08000 {
pcie1: pcie@1c08000 {
compatible = "qcom,pcie-sc7280";
reg = <0 0x01c08000 0 0x3000>,
<0 0x40000000 0 0xf1d>,

8
arch/arm64/boot/dts/qcom/sc8180x.dtsi
View File

@ -1684,7 +1684,7 @@
qcom,bcm-voters = <&apps_bcm_voter>;
};
pcie0: pci@1c00000 {
pcie0: pcie@1c00000 {
compatible = "qcom,pcie-sc8180x";
reg = <0 0x01c00000 0 0x3000>,
<0 0x60000000 0 0xf1d>,
@ -1780,7 +1780,7 @@
status = "disabled";
};
pcie3: pci@1c08000 {
pcie3: pcie@1c08000 {
compatible = "qcom,pcie-sc8180x";
reg = <0 0x01c08000 0 0x3000>,
<0 0x40000000 0 0xf1d>,
@ -1877,7 +1877,7 @@
status = "disabled";
};
pcie1: pci@1c10000 {
pcie1: pcie@1c10000 {
compatible = "qcom,pcie-sc8180x";
reg = <0 0x01c10000 0 0x3000>,
<0 0x68000000 0 0xf1d>,
@ -1974,7 +1974,7 @@
status = "disabled";
};
pcie2: pci@1c18000 {
pcie2: pcie@1c18000 {
compatible = "qcom,pcie-sc8180x";
reg = <0 0x01c18000 0 0x3000>,
<0 0x70000000 0 0xf1d>,

4
arch/arm64/boot/dts/qcom/sdm845.dtsi
View File

@ -2306,7 +2306,7 @@
};
};
pcie0: pci@1c00000 {
pcie0: pcie@1c00000 {
compatible = "qcom,pcie-sdm845";
reg = <0 0x01c00000 0 0x2000>,
<0 0x60000000 0 0xf1d>,
@ -2405,7 +2405,7 @@
status = "disabled";
};
pcie1: pci@1c08000 {
pcie1: pcie@1c08000 {
compatible = "qcom,pcie-sdm845";
reg = <0 0x01c08000 0 0x2000>,
<0 0x40000000 0 0xf1d>,

4
arch/arm64/boot/dts/qcom/sm8150.dtsi
View File

@ -1824,7 +1824,7 @@
<0x0 0x010ad000 0x0 0x3000>;
};
pcie0: pci@1c00000 {
pcie0: pcie@1c00000 {
compatible = "qcom,pcie-sm8150";
reg = <0 0x01c00000 0 0x3000>,
<0 0x60000000 0 0xf1d>,
@ -1915,7 +1915,7 @@
status = "disabled";
};
pcie1: pci@1c08000 {
pcie1: pcie@1c08000 {
compatible = "qcom,pcie-sm8150";
reg = <0 0x01c08000 0 0x3000>,
<0 0x40000000 0 0xf1d>,

6
arch/arm64/boot/dts/qcom/sm8250.dtsi
View File

@ -2124,7 +2124,7 @@
qcom,bcm-voters = <&apps_bcm_voter>;
};
pcie0: pci@1c00000 {
pcie0: pcie@1c00000 {
compatible = "qcom,pcie-sm8250";
reg = <0 0x01c00000 0 0x3000>,
<0 0x60000000 0 0xf1d>,
@ -2228,7 +2228,7 @@
status = "disabled";
};
pcie1: pci@1c08000 {
pcie1: pcie@1c08000 {
compatible = "qcom,pcie-sm8250";
reg = <0 0x01c08000 0 0x3000>,
<0 0x40000000 0 0xf1d>,
@ -2329,7 +2329,7 @@
status = "disabled";
};
pcie2: pci@1c10000 {
pcie2: pcie@1c10000 {
compatible = "qcom,pcie-sm8250";
reg = <0 0x01c10000 0 0x3000>,
<0 0x64000000 0 0xf1d>,

4
arch/arm64/boot/dts/qcom/sm8350.dtsi
View File

@ -1499,7 +1499,7 @@
qcom,bcm-voters = <&apps_bcm_voter>;
};
pcie0: pci@1c00000 {
pcie0: pcie@1c00000 {
compatible = "qcom,pcie-sm8350";
reg = <0 0x01c00000 0 0x3000>,
<0 0x60000000 0 0xf1d>,
@ -1592,7 +1592,7 @@
status = "disabled";
};
pcie1: pci@1c08000 {
pcie1: pcie@1c08000 {
compatible = "qcom,pcie-sm8350";
reg = <0 0x01c08000 0 0x3000>,
<0 0x40000000 0 0xf1d>,

4
arch/arm64/boot/dts/qcom/sm8450.dtsi
View File

@ -1746,7 +1746,7 @@
reg = <0 0x010c3000 0 0x1000>;
};
pcie0: pci@1c00000 {
pcie0: pcie@1c00000 {
compatible = "qcom,pcie-sm8450-pcie0";
reg = <0 0x01c00000 0 0x3000>,
<0 0x60000000 0 0xf1d>,
@ -1855,7 +1855,7 @@
status = "disabled";
};
pcie1: pci@1c08000 {
pcie1: pcie@1c08000 {
compatible = "qcom,pcie-sm8450-pcie1";
reg = <0 0x01c08000 0 0x3000>,
<0 0x40000000 0 0xf1d>,

4
arch/arm64/boot/dts/qcom/sm8550.dtsi
View File

@ -1683,7 +1683,7 @@
reg = <0 0x010c3000 0 0x1000>;
};
pcie0: pci@1c00000 {
pcie0: pcie@1c00000 {
device_type = "pci";
compatible = "qcom,pcie-sm8550";
reg = <0 0x01c00000 0 0x3000>,
@ -1774,7 +1774,7 @@
status = "disabled";
};
pcie1: pci@1c08000 {
pcie1: pcie@1c08000 {
device_type = "pci";
compatible = "qcom,pcie-sm8550";
reg = <0x0 0x01c08000 0x0 0x3000>,