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drm/i915/gt: Re-work intel_write_status_page

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Re-work intel_write_status_page to use drm_clflush_virt_range. This
will prevent compiler errors when building for non-x86 architectures.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220321223819.72833-2-michael.cheng@intel.com
This commit is contained in:
Michael Cheng 2022-03-21 15:38:15 -07:00 committed by Matt Roper
parent 6f30158f40
commit 055f15e7be
1 changed files with 4 additions and 9 deletions
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13
drivers/gpu/drm/i915/gt/intel_engine.h
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@ -4,6 +4,7 @@
#include <asm/cacheflush.h>
#include <drm/drm_util.h>
#include <drm/drm_cache.h>
#include <linux/hashtable.h>
#include <linux/irq_work.h>
@ -143,15 +144,9 @@ intel_write_status_page(struct intel_engine_cs *engine, int reg, u32 value)
* of extra paranoia to try and ensure that the HWS takes the value
* we give and that it doesn't end up trapped inside the CPU!
*/
if (static_cpu_has(X86_FEATURE_CLFLUSH)) {
mb();
clflush(&engine->status_page.addr[reg]);
engine->status_page.addr[reg] = value;
clflush(&engine->status_page.addr[reg]);
mb();
} else {
WRITE_ONCE(engine->status_page.addr[reg], value);
}
drm_clflush_virt_range(&engine->status_page.addr[reg], sizeof(value));
WRITE_ONCE(engine->status_page.addr[reg], value);
drm_clflush_virt_range(&engine->status_page.addr[reg], sizeof(value));
}
/*