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wifi: rtlwifi: rtl8821ae: Access full PMCS reg and use pci_regs.h

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_rtl8821ae_clear_pci_pme_status() accesses the upper byte of the Power
Management Control/Status register (PMCS) with literal 5 offset.

Access the entire PMCS register using defines from pci_regs.h to
improve code readability.

While at it, remove the obvious comment and tweak debug prints
slightly to not sound misleading.

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231124084725.12738-9-ilpo.jarvinen@linux.intel.com
This commit is contained in:
Ilpo Järvinen 2023-11-24 10:47:23 +02:00 committed by Kalle Valo
parent 7bd350d2ac
commit 05b311a3f9
1 changed files with 7 additions and 14 deletions
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21
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c
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@ -2271,7 +2271,7 @@ static void _rtl8821ae_clear_pci_pme_status(struct ieee80211_hw *hw)
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct pci_dev *pdev = rtlpci->pdev;
u8 pmcs_reg;
u16 pmcs_reg;
u8 pm_cap;
pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
@ -2281,23 +2281,16 @@ static void _rtl8821ae_clear_pci_pme_status(struct ieee80211_hw *hw)
return;
}
/* Get the PM CSR (Control/Status Register),
* The PME_Status is located at PM Capatibility offset 5, bit 7
*/
pci_read_config_byte(pdev, pm_cap + 5, &pmcs_reg);
if (pmcs_reg & BIT(7)) {
pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pmcs_reg);
if (pmcs_reg & PCI_PM_CTRL_PME_STATUS) {
/* Clear PME_Status with write */
pci_write_config_byte(pdev, pm_cap + 5, pmcs_reg);
/* Read it back to check */
pci_read_config_byte(pdev, pm_cap + 5, &pmcs_reg);
pci_write_config_word(pdev, pm_cap + PCI_PM_CTRL, pmcs_reg);
pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pmcs_reg);
rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
"Clear PME status 0x%2x to 0x%2x\n",
pm_cap + 5, pmcs_reg);
"Cleared PME status, PMCS reg = 0x%4x\n", pmcs_reg);
} else {
rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
"PME status(0x%2x) = 0x%2x\n",
pm_cap + 5, pmcs_reg);
"PMCS reg = 0x%4x\n", pmcs_reg);
}
}