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drm/amd/display: Filter out YCbCr420 timing if VSC SDP not supported

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[Why]
Per DP specification, YCbCr420 shall use VSC SDP.

[How]
For YCbCr420 timings, fail DP mode timing validation
if DPCD caps do not indicate VSC SDP colorimetry
support.

Signed-off-by: George Shen <george.shen@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Wayne Lin <Wayne.Lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
George Shen
2021-04-16 17:35:07 -04:00
committed by Alex Deucher
parent 70c14a1d7e
commit 05e62b6b64
1 changed files with 6 additions and 0 deletions
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6
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
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@ -2411,6 +2411,12 @@ bool dp_validate_mode_timing(
const struct dc_link_settings *link_setting; const struct dc_link_settings *link_setting;
/* According to spec, VSC SDP should be used if pixel format is YCbCr420 */
if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420 &&
!link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED &&
dal_graphics_object_id_get_connector_id(link->link_id) != CONNECTOR_ID_VIRTUAL)
return false;
/*always DP fail safe mode*/ /*always DP fail safe mode*/
if ((timing->pix_clk_100hz / 10) == (uint32_t) 25175 && if ((timing->pix_clk_100hz / 10) == (uint32_t) 25175 &&
timing->h_addressable == (uint32_t) 640 && timing->h_addressable == (uint32_t) 640 &&