clk: qcom: gcc-msm8939: Point MM peripherals to system_mm_noc clock
Qcom docs indciate the following peripherals operating from System NOC
MM not from System NOC clocks.
- MDP
- VFE
- JPEGe
- Venus
Switch over the relevant parent pointers.
Fixes: 1664014e46
("clk: qcom: gcc-msm8939: Add MSM8939 Generic Clock Controller")
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220504163835.40130-5-bryan.odonoghue@linaro.org
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@ -2453,7 +2453,7 @@ static struct clk_branch gcc_camss_jpeg_axi_clk = {
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.hw.init = &(struct clk_init_data){
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.name = "gcc_camss_jpeg_axi_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &system_noc_bfdcd_clk_src.clkr.hw,
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.hw = &system_mm_noc_bfdcd_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -2657,7 +2657,7 @@ static struct clk_branch gcc_camss_vfe_axi_clk = {
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.hw.init = &(struct clk_init_data){
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.name = "gcc_camss_vfe_axi_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &system_noc_bfdcd_clk_src.clkr.hw,
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.hw = &system_mm_noc_bfdcd_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -2813,7 +2813,7 @@ static struct clk_branch gcc_mdss_axi_clk = {
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.hw.init = &(struct clk_init_data){
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.name = "gcc_mdss_axi_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &system_noc_bfdcd_clk_src.clkr.hw,
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.hw = &system_mm_noc_bfdcd_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -3205,7 +3205,7 @@ static struct clk_branch gcc_mdp_tbu_clk = {
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.hw.init = &(struct clk_init_data){
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.name = "gcc_mdp_tbu_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &system_noc_bfdcd_clk_src.clkr.hw,
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.hw = &system_mm_noc_bfdcd_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -3223,7 +3223,7 @@ static struct clk_branch gcc_venus_tbu_clk = {
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.hw.init = &(struct clk_init_data){
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.name = "gcc_venus_tbu_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &system_noc_bfdcd_clk_src.clkr.hw,
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.hw = &system_mm_noc_bfdcd_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -3241,7 +3241,7 @@ static struct clk_branch gcc_vfe_tbu_clk = {
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.hw.init = &(struct clk_init_data){
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.name = "gcc_vfe_tbu_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &system_noc_bfdcd_clk_src.clkr.hw,
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.hw = &system_mm_noc_bfdcd_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -3259,7 +3259,7 @@ static struct clk_branch gcc_jpeg_tbu_clk = {
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.hw.init = &(struct clk_init_data){
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.name = "gcc_jpeg_tbu_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &system_noc_bfdcd_clk_src.clkr.hw,
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.hw = &system_mm_noc_bfdcd_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -3496,7 +3496,7 @@ static struct clk_branch gcc_venus0_axi_clk = {
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.hw.init = &(struct clk_init_data){
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.name = "gcc_venus0_axi_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &system_noc_bfdcd_clk_src.clkr.hw,
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.hw = &system_mm_noc_bfdcd_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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