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Devicetree changes for omaps for v6.6

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Updates for opp and pinctrl nodes to follow the devicetree bindings.
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Merge tag 'omap-for-v6.6/dt-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt

Devicetree changes for omaps for v6.6

Updates for opp and pinctrl nodes to follow the devicetree bindings.

* tag 'omap-for-v6.6/dt-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  arm: dts: ti: omap: Fix OPP table node names
  arm: dts: ti: omap: am5729-beagleboneai: Drop the OPP
  arm: dts: ti: omap: omap36xx: Rename opp_supply nodename
  ARM: dts: ti: add missing space before {
  ARM: dts: ti: split interrupts per cells
  ARM: dts: Unify pinctrl-single pin group nodes for davinci

Link: https://lore.kernel.org/r/pull-1691658952-110529@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-08-12 10:56:09 +02:00
commit 064a805c4a
19 changed files with 121 additions and 103 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/ti/davinci/da850-evm.dts
View File

@ -161,7 +161,7 @@
&pmx_core {
status = "okay";
mcasp0_pins: pinmux_mcasp0_pins {
mcasp0_pins: mcasp0-pins {
pinctrl-single,bits = <
/*
* AHCLKX, ACLKX, AFSX, AHCLKR, ACLKR,
@ -172,7 +172,7 @@
0x04 0x00011000 0x000ff000
>;
};
nand_pins: nand_pins {
nand_pins: nand-pins {
pinctrl-single,bits = <
/* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */
0x1c 0x10110110 0xf0ff0ff0

4
arch/arm/boot/dts/ti/davinci/da850-lcdk.dts
View File

@ -199,7 +199,7 @@
&pmx_core {
status = "okay";
mcasp0_pins: pinmux_mcasp0_pins {
mcasp0_pins: mcasp0-pins {
pinctrl-single,bits = <
/* AHCLKX AFSX ACLKX */
0x00 0x00101010 0x00f0f0f0
@ -208,7 +208,7 @@
>;
};
nand_pins: nand_pins {
nand_pins: nand-pins {
pinctrl-single,bits = <
/* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
0x1c 0x10110010 0xf0ff00f0

4
arch/arm/boot/dts/ti/davinci/da850-lego-ev3.dts
View File

@ -234,7 +234,7 @@
&pmx_core {
status = "okay";
ev3_lcd_pins: pinmux_lcd {
ev3_lcd_pins: lcd-pins {
pinctrl-single,bits = <
/* SIMO, CLK */
0x14 0x00100100 0x00f00f00
@ -391,7 +391,7 @@
pinctrl-names = "default";
cs-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
display@0{
display@0 {
compatible = "lego,ev3-lcd";
reg = <0>;
spi-max-frequency = <10000000>;

67
arch/arm/boot/dts/ti/davinci/da850.dtsi
View File

@ -170,55 +170,55 @@
#pinctrl-single,gpio-range-cells = <3>;
};
serial0_rtscts_pins: pinmux_serial0_rtscts_pins {
serial0_rtscts_pins: serial0-rtscts-pins {
pinctrl-single,bits = <
/* UART0_RTS UART0_CTS */
0x0c 0x22000000 0xff000000
>;
};
serial0_rxtx_pins: pinmux_serial0_rxtx_pins {
serial0_rxtx_pins: serial0-rxtx-pins {
pinctrl-single,bits = <
/* UART0_TXD UART0_RXD */
0x0c 0x00220000 0x00ff0000
>;
};
serial1_rtscts_pins: pinmux_serial1_rtscts_pins {
serial1_rtscts_pins: serial1-rtscts-pins {
pinctrl-single,bits = <
/* UART1_CTS UART1_RTS */
0x00 0x00440000 0x00ff0000
>;
};
serial1_rxtx_pins: pinmux_serial1_rxtx_pins {
serial1_rxtx_pins: serial1-rxtx-pins {
pinctrl-single,bits = <
/* UART1_TXD UART1_RXD */
0x10 0x22000000 0xff000000
>;
};
serial2_rtscts_pins: pinmux_serial2_rtscts_pins {
serial2_rtscts_pins: serial2-rtscts-pins {
pinctrl-single,bits = <
/* UART2_CTS UART2_RTS */
0x00 0x44000000 0xff000000
>;
};
serial2_rxtx_pins: pinmux_serial2_rxtx_pins {
serial2_rxtx_pins: serial2-rxtx-pins {
pinctrl-single,bits = <
/* UART2_TXD UART2_RXD */
0x10 0x00220000 0x00ff0000
>;
};
i2c0_pins: pinmux_i2c0_pins {
i2c0_pins: i2c0-pins {
pinctrl-single,bits = <
/* I2C0_SDA,I2C0_SCL */
0x10 0x00002200 0x0000ff00
>;
};
i2c1_pins: pinmux_i2c1_pins {
i2c1_pins: i2c1-pins {
pinctrl-single,bits = <
/* I2C1_SDA, I2C1_SCL */
0x10 0x00440000 0x00ff0000
>;
};
mmc0_pins: pinmux_mmc_pins {
mmc0_pins: mmc-pins {
pinctrl-single,bits = <
/* MMCSD0_DAT[3] MMCSD0_DAT[2]
* MMCSD0_DAT[1] MMCSD0_DAT[0]
@ -227,85 +227,85 @@
0x28 0x00222222 0x00ffffff
>;
};
ehrpwm0a_pins: pinmux_ehrpwm0a_pins {
ehrpwm0a_pins: ehrpwm0a-pins {
pinctrl-single,bits = <
/* EPWM0A */
0xc 0x00000002 0x0000000f
>;
};
ehrpwm0b_pins: pinmux_ehrpwm0b_pins {
ehrpwm0b_pins: ehrpwm0b-pins {
pinctrl-single,bits = <
/* EPWM0B */
0xc 0x00000020 0x000000f0
>;
};
ehrpwm1a_pins: pinmux_ehrpwm1a_pins {
ehrpwm1a_pins: ehrpwm1a-pins {
pinctrl-single,bits = <
/* EPWM1A */
0x14 0x00000002 0x0000000f
>;
};
ehrpwm1b_pins: pinmux_ehrpwm1b_pins {
ehrpwm1b_pins: ehrpwm1b-pins {
pinctrl-single,bits = <
/* EPWM1B */
0x14 0x00000020 0x000000f0
>;
};
ecap0_pins: pinmux_ecap0_pins {
ecap0_pins: ecap0-pins {
pinctrl-single,bits = <
/* ECAP0_APWM0 */
0x8 0x20000000 0xf0000000
>;
};
ecap1_pins: pinmux_ecap1_pins {
ecap1_pins: ecap1-pins {
pinctrl-single,bits = <
/* ECAP1_APWM1 */
0x4 0x40000000 0xf0000000
>;
};
ecap2_pins: pinmux_ecap2_pins {
ecap2_pins: ecap2-pins {
pinctrl-single,bits = <
/* ECAP2_APWM2 */
0x4 0x00000004 0x0000000f
>;
};
spi0_pins: pinmux_spi0_pins {
spi0_pins: spi0-pins {
pinctrl-single,bits = <
/* SIMO, SOMI, CLK */
0xc 0x00001101 0x0000ff0f
>;
};
spi0_cs0_pin: pinmux_spi0_cs0 {
spi0_cs0_pin: spi0-cs0-pins {
pinctrl-single,bits = <
/* CS0 */
0x10 0x00000010 0x000000f0
>;
};
spi0_cs3_pin: pinmux_spi0_cs3_pin {
spi0_cs3_pin: spi0-cs3-pins {
pinctrl-single,bits = <
/* CS3 */
0xc 0x01000000 0x0f000000
>;
};
spi1_pins: pinmux_spi1_pins {
spi1_pins: spi1-pins {
pinctrl-single,bits = <
/* SIMO, SOMI, CLK */
0x14 0x00110100 0x00ff0f00
>;
};
spi1_cs0_pin: pinmux_spi1_cs0 {
spi1_cs0_pin: spi1-cs0-pins {
pinctrl-single,bits = <
/* CS0 */
0x14 0x00000010 0x000000f0
>;
};
mdio_pins: pinmux_mdio_pins {
mdio_pins: mdio-pins {
pinctrl-single,bits = <
/* MDIO_CLK, MDIO_D */
0x10 0x00000088 0x000000ff
>;
};
mii_pins: pinmux_mii_pins {
mii_pins: mii-pins {
pinctrl-single,bits = <
/*
* MII_TXEN, MII_TXCLK, MII_COL
@ -321,7 +321,7 @@
0xc 0x88888888 0xffffffff
>;
};
lcd_pins: pinmux_lcd_pins {
lcd_pins: lcd-pins {
pinctrl-single,bits = <
/*
* LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5],
@ -342,7 +342,7 @@
0x4c 0x02000022 0x0f0000ff
>;
};
vpif_capture_pins: vpif_capture_pins {
vpif_capture_pins: vpif-capture-pins {
pinctrl-single,bits = <
/* VP_DIN[2..7], VP_CLKIN1, VP_CLKIN0 */
0x38 0x11111111 0xffffffff
@ -352,7 +352,7 @@
0x40 0x00000011 0x000000ff
>;
};
vpif_display_pins: vpif_display_pins {
vpif_display_pins: vpif-display-pins {
pinctrl-single,bits = <
/* VP_DOUT[2..7] */
0x40 0x11111100 0xffffff00
@ -421,7 +421,7 @@
/* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
reg = <0x0 0x8000>;
reg-names = "edma3_cc";
interrupts = <11 12>;
interrupts = <11>, <12>;
interrupt-names = "edma3_ccint", "edma3_ccerrint";
#dma-cells = <2>;
@ -447,7 +447,7 @@
/* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
reg = <0x230000 0x8000>;
reg-names = "edma3_cc";
interrupts = <93 94>;
interrupts = <93>, <94>;
interrupt-names = "edma3_ccint", "edma3_ccerrint";
#dma-cells = <2>;
@ -494,8 +494,7 @@
rtc0: rtc@23000 {
compatible = "ti,da830-rtc";
reg = <0x23000 0x1000>;
interrupts = <19
19>;
interrupts = <19>, <19>;
clocks = <&pll0_auxclk>;
clock-names = "int-clk";
status = "disabled";
@ -725,11 +724,7 @@
ti,davinci-ctrl-ram-offset = <0>;
ti,davinci-ctrl-ram-size = <0x2000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <33
34
35
36
>;
interrupts = <33>, <34>, <35>,<36>;
clocks = <&psc1 5>;
power-domains = <&psc1 5>;
status = "disabled";
@ -748,7 +743,7 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0x226000 0x1000>;
interrupts = <42 43 44 45 46 47 48 49 50>;
interrupts = <42>, <43>, <44>, <45>, <46>, <47>, <48>, <49>, <50>;
ti,ngpio = <144>;
ti,davinci-gpio-unbanked = <0>;
clocks = <&psc1 3>;

2
arch/arm/boot/dts/ti/keystone/keystone-k2l.dtsi
View File

@ -137,7 +137,7 @@
>;
};
dfesync_rp1_pins: dfesync-rp1-pins{
dfesync_rp1_pins: dfesync-rp1-pins {
pinctrl-single,bits = <
/* DFESYNC_RP1_SEL */
0x0 0x0 0x2

3
arch/arm/boot/dts/ti/omap/am335x-boneblack.dts
View File

@ -20,7 +20,8 @@
* BeagleBone Blacks have PG 2.0 silicon which is guaranteed
* to support 1GHz OPP so enable it for PG 2.0 on this board.
*/
oppnitro-1000000000 {
opp-1000000000 {
/* OPP Nitro */
opp-supported-hw = <0x06 0x0100>;
};
};

3
arch/arm/boot/dts/ti/omap/am335x-osd335x-common.dtsi
View File

@ -28,7 +28,8 @@
* the HW OPP table, the silicon looks like it is Revision 1.0 (ie the
* EFUSE_SMA register reads as all zeros).
*/
oppnitro-1000000000 {
opp-1000000000 {
/* OPP Nitro */
opp-supported-hw = <0x06 0x0100>;
};
};

10
arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi
View File

@ -455,8 +455,8 @@
rtc: rtc@0 {
compatible = "ti,am3352-rtc", "ti,da830-rtc";
reg = <0x0 0x1000>;
interrupts = <75
76>;
interrupts = <75>,
<76>;
};
};
@ -739,7 +739,7 @@
* c0_tx_pend
* c0_misc_pend
*/
interrupts = <40 41 42 43>;
interrupts = <40>, <41>, <42>, <43>;
ranges = <0 0 0x8000>;
syscon = <&scm_conf>;
status = "disabled";
@ -779,7 +779,7 @@
syscon = <&scm_conf>;
status = "disabled";
interrupts = <40 41 42 43>;
interrupts = <40>, <41>, <42>, <43>;
interrupt-names = "rx_thresh", "rx", "tx", "misc";
ethernet-ports {
@ -899,7 +899,7 @@
pruss_intc: interrupt-controller@20000 {
compatible = "ti,pruss-intc";
reg = <0x20000 0x2000>;
interrupts = <20 21 22 23 24 25 26 27>;
interrupts = <20>, <21>, <22>, <23>, <24>, <25>, <26>, <27>;
interrupt-names = "host_intr0", "host_intr1",
"host_intr2", "host_intr3",
"host_intr4", "host_intr5",

30
arch/arm/boot/dts/ti/omap/am33xx.dtsi
View File

@ -80,64 +80,74 @@
* because the can not be enabled simultaneously on a
* single SoC.
*/
opp50-300000000 {
opp-50-300000000{
/* OPP50 */
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <950000 931000 969000>;
opp-supported-hw = <0x06 0x0010>;
opp-suspend;
};
opp100-275000000 {
opp-100-275000000{
/* OPP100-1 */
opp-hz = /bits/ 64 <275000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x01 0x00FF>;
opp-suspend;
};
opp100-300000000 {
opp-100-300000000{
/* OPP100-2 */
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x06 0x0020>;
opp-suspend;
};
opp100-500000000 {
opp-100-500000000{
/* OPP100-3 */
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x01 0xFFFF>;
};
opp100-600000000 {
opp-100-600000000 {
/* OPP100-4 */
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x06 0x0040>;
};
opp120-600000000 {
opp-120-600000000 {
/* OPP120-1 */
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1200000 1176000 1224000>;
opp-supported-hw = <0x01 0xFFFF>;
};
opp120-720000000 {
opp-120-720000000 {
/* OPP120-2 */
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1200000 1176000 1224000>;
opp-supported-hw = <0x06 0x0080>;
};
oppturbo-720000000 {
opp-720000000 {
/* OPP Turbo-1 */
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1260000 1234800 1285200>;
opp-supported-hw = <0x01 0xFFFF>;
};
oppturbo-800000000 {
opp-800000000 {
/* OPP Turbo-2 */
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1260000 1234800 1285200>;
opp-supported-hw = <0x06 0x0100>;
};
oppnitro-1000000000 {
opp-1000000000 {
/* OPP Nitro */
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1325000 1298500 1351500>;
opp-supported-hw = <0x04 0x0200>;

6
arch/arm/boot/dts/ti/omap/am3517.dtsi
View File

@ -34,14 +34,16 @@
* appear to operate at 300MHz as well. Since AM3517 only
* lists one operating voltage, it will remain fixed at 1.2V
*/
opp50-300000000 {
opp-50-300000000 {
/* OPP50 */
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <1200000>;
opp-supported-hw = <0xffffffff 0xffffffff>;
opp-suspend;
};
opp100-600000000 {
opp-100-600000000 {
/* OPP100 */
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1200000>;
opp-supported-hw = <0xffffffff 0xffffffff>;

15
arch/arm/boot/dts/ti/omap/am4372.dtsi
View File

@ -70,32 +70,37 @@
compatible = "operating-points-v2-ti-cpu";
syscon = <&scm_conf>;
opp50-300000000 {
opp-50-300000000 {
/* OPP50 */
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <950000 931000 969000>;
opp-supported-hw = <0xFF 0x01>;
opp-suspend;
};
opp100-600000000 {
opp-100-600000000 {
/* OPP100 */
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0xFF 0x04>;
};
opp120-720000000 {
opp-120-720000000 {
/* OPP120 */
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1200000 1176000 1224000>;
opp-supported-hw = <0xFF 0x08>;
};
oppturbo-800000000 {
opp-800000000{
/* OPP Turbo */
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1260000 1234800 1285200>;
opp-supported-hw = <0xFF 0x10>;
};
oppnitro-1000000000 {
opp-1000000000 {
/* OPP Nitro */
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1325000 1298500 1351500>;
opp-supported-hw = <0xFF 0x20>;

14
arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts
View File

@ -58,7 +58,7 @@
vin-supply = <&vdd_corereg>;
};
v1_8dreg: fixed-regulator-v1_8dreg{
v1_8dreg: fixed-regulator-v1_8dreg {
compatible = "regulator-fixed";
regulator-name = "V1_8DREG";
regulator-min-microvolt = <1800000>;
@ -68,7 +68,7 @@
vin-supply = <&v24_0d>;
};
v1_8d: fixed-regulator-v1_8d{
v1_8d: fixed-regulator-v1_8d {
compatible = "regulator-fixed";
regulator-name = "V1_8D";
regulator-min-microvolt = <1800000>;
@ -78,7 +78,7 @@
vin-supply = <&v1_8dreg>;
};
v1_5dreg: fixed-regulator-v1_5dreg{
v1_5dreg: fixed-regulator-v1_5dreg {
compatible = "regulator-fixed";
regulator-name = "V1_5DREG";
regulator-min-microvolt = <1500000>;
@ -88,7 +88,7 @@
vin-supply = <&v24_0d>;
};
v1_5d: fixed-regulator-v1_5d{
v1_5d: fixed-regulator-v1_5d {
compatible = "regulator-fixed";
regulator-name = "V1_5D";
regulator-min-microvolt = <1500000>;
@ -527,11 +527,13 @@
* Supply voltage supervisor on board will not allow opp50 so
* disable it and set opp100 as suspend OPP.
*/
opp50-300000000 {
opp-50-300000000 {
/* opp50-300000000 */
status = "disabled";
};
opp100-600000000 {
opp-100-600000000 {
/* opp100-600000000 */
opp-suspend;
};
};

12
arch/arm/boot/dts/ti/omap/am437x-l4.dtsi
View File

@ -442,8 +442,8 @@
compatible = "ti,am4372-rtc", "ti,am3352-rtc",
"ti,da830-rtc";
reg = <0x0 0x1000>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_32768_ck>;
clock-names = "int-clk";
system-power-controller;
@ -549,10 +549,10 @@
syscon = <&scm_conf>;
status = "disabled";
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "rx_thresh", "rx", "tx", "misc";
ethernet-ports {

6
arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts
View File

@ -677,12 +677,6 @@
clock-frequency = <100000>;
};
&cpu0_opp_table {
opp_slow-500000000 {
opp-shared;
};
};
&ipu2 {
status = "okay";
memory-region = <&ipu2_memory_region>;

9
arch/arm/boot/dts/ti/omap/dra7.dtsi
View File

@ -101,7 +101,8 @@
compatible = "operating-points-v2-ti-cpu";
syscon = <&scm_wkup>;
opp_nom-1000000000 {
opp-1000000000 {
/* OPP NOM */
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1060000 850000 1150000>,
<1060000 850000 1150000>;
@ -109,7 +110,8 @@
opp-suspend;
};
opp_od-1176000000 {
opp-1176000000 {
/* OPP OD */
opp-hz = /bits/ 64 <1176000000>;
opp-microvolt = <1160000 885000 1160000>,
<1160000 885000 1160000>;
@ -117,7 +119,8 @@
opp-supported-hw = <0xFF 0x02>;
};
opp_high@1500000000 {
opp-1500000000 {
/* OPP High */
opp-hz = /bits/ 64 <1500000000>;
opp-microvolt = <1210000 950000 1250000>,
<1210000 950000 1250000>;

3
arch/arm/boot/dts/ti/omap/dra76x.dtsi
View File

@ -130,7 +130,8 @@
};
&cpu0_opp_table {
opp_plus@1800000000 {
opp-1800000000 {
/* OPP Plus */
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1250000 950000 1250000>,
<1250000 950000 1250000>;

12
arch/arm/boot/dts/ti/omap/omap34xx.dtsi
View File

@ -25,7 +25,7 @@
compatible = "operating-points-v2-ti-cpu";
syscon = <&scm_conf>;
opp1-125000000 {
opp-125000000 {
opp-hz = /bits/ 64 <125000000>;
/*
* we currently only select the max voltage from table
@ -40,32 +40,32 @@
opp-supported-hw = <0xffffffff 3>;
};
opp2-250000000 {
opp-250000000 {
opp-hz = /bits/ 64 <250000000>;
opp-microvolt = <1075000 1075000 1075000>;
opp-supported-hw = <0xffffffff 3>;
opp-suspend;
};
opp3-500000000 {
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <1200000 1200000 1200000>;
opp-supported-hw = <0xffffffff 3>;
};
opp4-550000000 {
opp-550000000 {
opp-hz = /bits/ 64 <550000000>;
opp-microvolt = <1275000 1275000 1275000>;
opp-supported-hw = <0xffffffff 3>;
};
opp5-600000000 {
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1350000 1350000 1350000>;
opp-supported-hw = <0xffffffff 3>;
};
opp6-720000000 {
opp-720000000 {
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1350000 1350000 1350000>;
/* only high-speed grade omap3530 devices */

14
arch/arm/boot/dts/ti/omap/omap36xx.dtsi
View File

@ -30,7 +30,8 @@
compatible = "operating-points-v2-ti-cpu";
syscon = <&scm_conf>;
opp50-300000000 {
opp-50-300000000 {
/* OPP50 */
opp-hz = /bits/ 64 <300000000>;
/*
* we currently only select the max voltage from table
@ -48,21 +49,24 @@
opp-suspend;
};
opp100-600000000 {
opp-100-600000000 {
/* OPP100 */
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1200000 1200000 1200000>,
<1200000 1200000 1200000>;
opp-supported-hw = <0xffffffff 3>;
};
opp130-800000000 {
opp-130-800000000 {
/* OPP130 */
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1325000 1325000 1325000>,
<1325000 1325000 1325000>;
opp-supported-hw = <0xffffffff 3>;
};
opp1g-1000000000 {
opp-1000000000 {
/* OPP1G */
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1375000 1375000 1375000>,
<1375000 1375000 1375000>;
@ -71,7 +75,7 @@
};
};
opp_supply_mpu_iva: opp_supply {
opp_supply_mpu_iva: opp-supply {
compatible = "ti,omap-opp-supply";
ti,absolute-max-voltage-uv = <1375000>;
};

6
arch/arm/boot/dts/ti/omap/omap5-board-common.dtsi
View File

@ -415,9 +415,9 @@
gpadc: gpadc {
compatible = "ti,palmas-gpadc";
interrupts = <18 0
16 0
17 0>;
interrupts = <18 0>,
<16 0>,
<17 0>;
#io-channel-cells = <1>;
ti,channel0-current-microamp = <5>;
ti,channel3-current-microamp = <10>;