Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile
* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: arch/tile: mark "hardwall" device as non-seekable asm-generic/stat.h: support 64-bit file time_t for stat() arch/tile: don't allow user code to set the PL via ptrace or signal return arch/tile: correct double syscall restart for nested signals arch/tile: avoid __must_check warning on one strict_strtol check arch/tile: bomb raw_local_irq_ to arch_local_irq_ arch/tile: complete migration to new kmap_atomic scheme
This commit is contained in:
commit
0660a9b16a
@ -23,7 +23,6 @@
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#include <linux/interrupt.h>
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#include <linux/threads.h>
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#include <asm/kmap_types.h>
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#include <asm/tlbflush.h>
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#include <asm/homecache.h>
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@ -16,28 +16,42 @@
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#define _ASM_TILE_KMAP_TYPES_H
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/*
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* In TILE Linux each set of four of these uses another 16MB chunk of
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* address space, given 64 tiles and 64KB pages, so we only enable
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* ones that are required by the kernel configuration.
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* In 32-bit TILE Linux we have to balance the desire to have a lot of
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* nested atomic mappings with the fact that large page sizes and many
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* processors chew up address space quickly. In a typical
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* 64-processor, 64KB-page layout build, making KM_TYPE_NR one larger
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* adds 4MB of required address-space. For now we leave KM_TYPE_NR
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* set to depth 8.
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*/
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enum km_type {
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KM_TYPE_NR = 8
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};
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/*
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* We provide dummy definitions of all the stray values that used to be
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* required for kmap_atomic() and no longer are.
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*/
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enum {
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KM_BOUNCE_READ,
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KM_SKB_SUNRPC_DATA,
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KM_SKB_DATA_SOFTIRQ,
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KM_USER0,
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KM_USER1,
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KM_BIO_SRC_IRQ,
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KM_BIO_DST_IRQ,
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KM_PTE0,
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KM_PTE1,
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KM_IRQ0,
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KM_IRQ1,
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KM_SOFTIRQ0,
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KM_SOFTIRQ1,
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KM_MEMCPY0,
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KM_MEMCPY1,
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#if defined(CONFIG_HIGHPTE)
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KM_PTE0,
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KM_PTE1,
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#endif
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KM_TYPE_NR
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KM_SYNC_ICACHE,
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KM_SYNC_DCACHE,
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KM_UML_USERCOPY,
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KM_IRQ_PTE,
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KM_NMI,
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KM_NMI_PTE,
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KM_KDB
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};
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#endif /* _ASM_TILE_KMAP_TYPES_H */
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@ -344,10 +344,8 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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#define pgd_offset_k(address) pgd_offset(&init_mm, address)
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#if defined(CONFIG_HIGHPTE)
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extern pte_t *_pte_offset_map(pmd_t *, unsigned long address, enum km_type);
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#define pte_offset_map(dir, address) \
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_pte_offset_map(dir, address, KM_PTE0)
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#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
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extern pte_t *pte_offset_map(pmd_t *, unsigned long address);
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#define pte_unmap(pte) kunmap_atomic(pte)
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#else
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#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
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#define pte_unmap(pte) do { } while (0)
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@ -1 +1,4 @@
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#ifdef CONFIG_COMPAT
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#define __ARCH_WANT_STAT64 /* Used for compat_sys_stat64() etc. */
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#endif
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#include <asm-generic/stat.h>
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@ -41,6 +41,7 @@ __SYSCALL(__NR_cmpxchg_badaddr, sys_cmpxchg_badaddr)
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#ifdef CONFIG_COMPAT
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#define __ARCH_WANT_SYS_LLSEEK
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#endif
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#define __ARCH_WANT_SYS_NEWFSTATAT
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#endif
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#endif /* _ASM_TILE_UNISTD_H */
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@ -148,11 +148,11 @@ long tile_compat_sys_msgrcv(int msqid,
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#define compat_sys_readahead sys32_readahead
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#define compat_sys_sync_file_range compat_sys_sync_file_range2
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/* The native 64-bit "struct stat" matches the 32-bit "struct stat64". */
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#define compat_sys_stat64 sys_newstat
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#define compat_sys_lstat64 sys_newlstat
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#define compat_sys_fstat64 sys_newfstat
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#define compat_sys_fstatat64 sys_newfstatat
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/* We leverage the "struct stat64" type for 32-bit time_t/nsec. */
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#define compat_sys_stat64 sys_stat64
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#define compat_sys_lstat64 sys_lstat64
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#define compat_sys_fstat64 sys_fstat64
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#define compat_sys_fstatat64 sys_fstatat64
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/* The native sys_ptrace dynamically handles compat binaries. */
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#define compat_sys_ptrace sys_ptrace
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@ -54,7 +54,7 @@ void early_printk(const char *fmt, ...)
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void early_panic(const char *fmt, ...)
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{
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va_list ap;
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raw_local_irq_disable_all();
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arch_local_irq_disable_all();
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va_start(ap, fmt);
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early_printk("Kernel panic - not syncing: ");
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early_vprintk(fmt, ap);
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@ -151,12 +151,12 @@ enum direction_protect {
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static void enable_firewall_interrupts(void)
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{
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raw_local_irq_unmask_now(INT_UDN_FIREWALL);
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arch_local_irq_unmask_now(INT_UDN_FIREWALL);
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}
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static void disable_firewall_interrupts(void)
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{
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raw_local_irq_mask_now(INT_UDN_FIREWALL);
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arch_local_irq_mask_now(INT_UDN_FIREWALL);
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}
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/* Set up hardwall on this cpu based on the passed hardwall_info. */
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@ -768,13 +768,13 @@ static int hardwall_release(struct inode *inode, struct file *file)
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}
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static const struct file_operations dev_hardwall_fops = {
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.open = nonseekable_open,
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.unlocked_ioctl = hardwall_ioctl,
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#ifdef CONFIG_COMPAT
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.compat_ioctl = hardwall_compat_ioctl,
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#endif
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.flush = hardwall_flush,
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.release = hardwall_release,
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.llseek = noop_llseek,
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};
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static struct cdev hardwall_dev;
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@ -26,7 +26,7 @@
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#define IS_HW_CLEARED 1
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/*
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* The set of interrupts we enable for raw_local_irq_enable().
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* The set of interrupts we enable for arch_local_irq_enable().
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* This is initialized to have just a single interrupt that the kernel
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* doesn't actually use as a sentinel. During kernel init,
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* interrupts are added as the kernel gets prepared to support them.
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@ -225,7 +225,7 @@ void __cpuinit setup_irq_regs(void)
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/* Enable interrupt delivery. */
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unmask_irqs(~0UL);
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#if CHIP_HAS_IPI()
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raw_local_irq_unmask(INT_IPI_K);
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arch_local_irq_unmask(INT_IPI_K);
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#endif
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}
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@ -182,13 +182,13 @@ static void kexec_find_and_set_command_line(struct kimage *image)
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if ((entry & IND_SOURCE)) {
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void *va =
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kmap_atomic_pfn(entry >> PAGE_SHIFT, KM_USER0);
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kmap_atomic_pfn(entry >> PAGE_SHIFT);
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r = kexec_bn2cl(va);
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if (r) {
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command_line = r;
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break;
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}
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kunmap_atomic(va, KM_USER0);
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kunmap_atomic(va);
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}
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}
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@ -198,7 +198,7 @@ static void kexec_find_and_set_command_line(struct kimage *image)
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hverr = hv_set_command_line(
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(HV_VirtAddr) command_line, strlen(command_line));
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kunmap_atomic(command_line, KM_USER0);
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kunmap_atomic(command_line);
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} else {
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pr_info("%s: no command line found; making empty\n",
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__func__);
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@ -34,7 +34,7 @@ void __cpuinit init_messaging(void)
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panic("hv_register_message_state: error %d", rc);
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/* Make sure downcall interrupts will be enabled. */
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raw_local_irq_unmask(INT_INTCTRL_K);
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arch_local_irq_unmask(INT_INTCTRL_K);
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}
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void hv_message_intr(struct pt_regs *regs, int intnum)
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@ -50,10 +50,10 @@ long arch_ptrace(struct task_struct *child, long request,
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{
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unsigned long __user *datap = (long __user __force *)data;
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unsigned long tmp;
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int i;
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long ret = -EIO;
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unsigned long *childregs;
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char *childreg;
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struct pt_regs copyregs;
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int ex1_offset;
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switch (request) {
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@ -80,6 +80,16 @@ long arch_ptrace(struct task_struct *child, long request,
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if (addr >= PTREGS_SIZE)
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break;
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childreg = (char *)task_pt_regs(child) + addr;
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/* Guard against overwrites of the privilege level. */
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ex1_offset = PTREGS_OFFSET_EX1;
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#if defined(CONFIG_COMPAT) && defined(__BIG_ENDIAN)
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if (is_compat_task()) /* point at low word */
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ex1_offset += sizeof(compat_long_t);
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#endif
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if (addr == ex1_offset)
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data = PL_ICS_EX1(USER_PL, EX1_ICS(data));
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#ifdef CONFIG_COMPAT
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if (is_compat_task()) {
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if (addr & (sizeof(compat_long_t)-1))
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@ -96,26 +106,19 @@ long arch_ptrace(struct task_struct *child, long request,
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break;
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case PTRACE_GETREGS: /* Get all registers from the child. */
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if (!access_ok(VERIFY_WRITE, datap, PTREGS_SIZE))
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break;
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childregs = (long *)task_pt_regs(child);
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for (i = 0; i < sizeof(struct pt_regs)/sizeof(unsigned long);
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++i) {
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ret = __put_user(childregs[i], &datap[i]);
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if (ret != 0)
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break;
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if (copy_to_user(datap, task_pt_regs(child),
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sizeof(struct pt_regs)) == 0) {
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ret = 0;
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}
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break;
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case PTRACE_SETREGS: /* Set all registers in the child. */
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if (!access_ok(VERIFY_READ, datap, PTREGS_SIZE))
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break;
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childregs = (long *)task_pt_regs(child);
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for (i = 0; i < sizeof(struct pt_regs)/sizeof(unsigned long);
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++i) {
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ret = __get_user(childregs[i], &datap[i]);
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if (ret != 0)
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break;
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if (copy_from_user(©regs, datap,
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sizeof(struct pt_regs)) == 0) {
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copyregs.ex1 =
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PL_ICS_EX1(USER_PL, EX1_ICS(copyregs.ex1));
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*task_pt_regs(child) = copyregs;
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ret = 0;
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}
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break;
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@ -27,7 +27,7 @@
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void machine_halt(void)
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{
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warn_early_printk();
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raw_local_irq_disable_all();
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arch_local_irq_disable_all();
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smp_send_stop();
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hv_halt();
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}
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@ -35,14 +35,14 @@ void machine_halt(void)
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void machine_power_off(void)
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{
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warn_early_printk();
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raw_local_irq_disable_all();
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arch_local_irq_disable_all();
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smp_send_stop();
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hv_power_off();
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}
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void machine_restart(char *cmd)
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{
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raw_local_irq_disable_all();
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arch_local_irq_disable_all();
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smp_send_stop();
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hv_restart((HV_VirtAddr) "vmlinux", (HV_VirtAddr) cmd);
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}
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|
@ -868,14 +868,14 @@ void __cpuinit setup_cpu(int boot)
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/* Allow asynchronous TLB interrupts. */
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#if CHIP_HAS_TILE_DMA()
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raw_local_irq_unmask(INT_DMATLB_MISS);
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raw_local_irq_unmask(INT_DMATLB_ACCESS);
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arch_local_irq_unmask(INT_DMATLB_MISS);
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arch_local_irq_unmask(INT_DMATLB_ACCESS);
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#endif
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#if CHIP_HAS_SN_PROC()
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raw_local_irq_unmask(INT_SNITLB_MISS);
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arch_local_irq_unmask(INT_SNITLB_MISS);
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#endif
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#ifdef __tilegx__
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raw_local_irq_unmask(INT_SINGLE_STEP_K);
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arch_local_irq_unmask(INT_SINGLE_STEP_K);
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#endif
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/*
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|
@ -71,6 +71,9 @@ int restore_sigcontext(struct pt_regs *regs,
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for (i = 0; i < sizeof(struct pt_regs)/sizeof(long); ++i)
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err |= __get_user(regs->regs[i], &sc->gregs[i]);
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/* Ensure that the PL is always set to USER_PL. */
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regs->ex1 = PL_ICS_EX1(USER_PL, EX1_ICS(regs->ex1));
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regs->faultnum = INT_SWINT_1_SIGRETURN;
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err |= __get_user(*pr0, &sc->gregs[0]);
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@ -330,7 +333,7 @@ void do_signal(struct pt_regs *regs)
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current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
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}
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return;
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goto done;
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}
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/* Did we come from a system call? */
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@ -358,4 +361,8 @@ void do_signal(struct pt_regs *regs)
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current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
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sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
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}
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done:
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/* Avoid double syscall restart if there are nested signals. */
|
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regs->faultnum = INT_SWINT_1_SIGRETURN;
|
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}
|
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|
@ -115,7 +115,7 @@ static void smp_start_cpu_interrupt(void)
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static void smp_stop_cpu_interrupt(void)
|
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{
|
||||
set_cpu_online(smp_processor_id(), 0);
|
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raw_local_irq_disable_all();
|
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arch_local_irq_disable_all();
|
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for (;;)
|
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asm("nap");
|
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}
|
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|
@ -132,7 +132,7 @@ static int tile_timer_set_next_event(unsigned long ticks,
|
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{
|
||||
BUG_ON(ticks > MAX_TICK);
|
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__insn_mtspr(SPR_TILE_TIMER_CONTROL, ticks);
|
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raw_local_irq_unmask_now(INT_TILE_TIMER);
|
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arch_local_irq_unmask_now(INT_TILE_TIMER);
|
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return 0;
|
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}
|
||||
|
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@ -143,7 +143,7 @@ static int tile_timer_set_next_event(unsigned long ticks,
|
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static void tile_timer_set_mode(enum clock_event_mode mode,
|
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struct clock_event_device *evt)
|
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{
|
||||
raw_local_irq_mask_now(INT_TILE_TIMER);
|
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arch_local_irq_mask_now(INT_TILE_TIMER);
|
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}
|
||||
|
||||
/*
|
||||
@ -172,7 +172,7 @@ void __cpuinit setup_tile_timer(void)
|
||||
evt->cpumask = cpumask_of(smp_processor_id());
|
||||
|
||||
/* Start out with timer not firing. */
|
||||
raw_local_irq_mask_now(INT_TILE_TIMER);
|
||||
arch_local_irq_mask_now(INT_TILE_TIMER);
|
||||
|
||||
/* Register tile timer. */
|
||||
clockevents_register_device(evt);
|
||||
@ -188,7 +188,7 @@ void do_timer_interrupt(struct pt_regs *regs, int fault_num)
|
||||
* Mask the timer interrupt here, since we are a oneshot timer
|
||||
* and there are now by definition no events pending.
|
||||
*/
|
||||
raw_local_irq_mask(INT_TILE_TIMER);
|
||||
arch_local_irq_mask(INT_TILE_TIMER);
|
||||
|
||||
/* Track time spent here in an interrupt context */
|
||||
irq_enter();
|
||||
|
@ -54,7 +54,7 @@ typedef unsigned long (*memcpy_t)(void *, const void *, unsigned long);
|
||||
* we must run with interrupts disabled to avoid the risk of some
|
||||
* other code seeing the incoherent data in our cache. (Recall that
|
||||
* our cache is indexed by PA, so even if the other code doesn't use
|
||||
* our KM_MEMCPY virtual addresses, they'll still hit in cache using
|
||||
* our kmap_atomic virtual addresses, they'll still hit in cache using
|
||||
* the normal VAs that aren't supposed to hit in cache.)
|
||||
*/
|
||||
static void memcpy_multicache(void *dest, const void *source,
|
||||
@ -64,6 +64,7 @@ static void memcpy_multicache(void *dest, const void *source,
|
||||
unsigned long flags, newsrc, newdst;
|
||||
pmd_t *pmdp;
|
||||
pte_t *ptep;
|
||||
int type0, type1;
|
||||
int cpu = get_cpu();
|
||||
|
||||
/*
|
||||
@ -77,7 +78,8 @@ static void memcpy_multicache(void *dest, const void *source,
|
||||
sim_allow_multiple_caching(1);
|
||||
|
||||
/* Set up the new dest mapping */
|
||||
idx = FIX_KMAP_BEGIN + (KM_TYPE_NR * cpu) + KM_MEMCPY0;
|
||||
type0 = kmap_atomic_idx_push();
|
||||
idx = FIX_KMAP_BEGIN + (KM_TYPE_NR * cpu) + type0;
|
||||
newdst = __fix_to_virt(idx) + ((unsigned long)dest & (PAGE_SIZE-1));
|
||||
pmdp = pmd_offset(pud_offset(pgd_offset_k(newdst), newdst), newdst);
|
||||
ptep = pte_offset_kernel(pmdp, newdst);
|
||||
@ -87,7 +89,8 @@ static void memcpy_multicache(void *dest, const void *source,
|
||||
}
|
||||
|
||||
/* Set up the new source mapping */
|
||||
idx += (KM_MEMCPY0 - KM_MEMCPY1);
|
||||
type1 = kmap_atomic_idx_push();
|
||||
idx += (type0 - type1);
|
||||
src_pte = hv_pte_set_nc(src_pte);
|
||||
src_pte = hv_pte_clear_writable(src_pte); /* be paranoid */
|
||||
newsrc = __fix_to_virt(idx) + ((unsigned long)source & (PAGE_SIZE-1));
|
||||
@ -119,6 +122,8 @@ static void memcpy_multicache(void *dest, const void *source,
|
||||
* We're done: notify the simulator that all is back to normal,
|
||||
* and re-enable interrupts and pre-emption.
|
||||
*/
|
||||
kmap_atomic_idx_pop();
|
||||
kmap_atomic_idx_pop();
|
||||
sim_allow_multiple_caching(0);
|
||||
local_irq_restore(flags);
|
||||
put_cpu();
|
||||
|
@ -227,7 +227,7 @@ EXPORT_SYMBOL(kmap_atomic_prot);
|
||||
void *__kmap_atomic(struct page *page)
|
||||
{
|
||||
/* PAGE_NONE is a magic value that tells us to check immutability. */
|
||||
return kmap_atomic_prot(page, type, PAGE_NONE);
|
||||
return kmap_atomic_prot(page, PAGE_NONE);
|
||||
}
|
||||
EXPORT_SYMBOL(__kmap_atomic);
|
||||
|
||||
|
@ -988,8 +988,12 @@ static long __write_once initfree = 1;
|
||||
/* Select whether to free (1) or mark unusable (0) the __init pages. */
|
||||
static int __init set_initfree(char *str)
|
||||
{
|
||||
strict_strtol(str, 0, &initfree);
|
||||
pr_info("initfree: %s free init pages\n", initfree ? "will" : "won't");
|
||||
long val;
|
||||
if (strict_strtol(str, 0, &val)) {
|
||||
initfree = val;
|
||||
pr_info("initfree: %s free init pages\n",
|
||||
initfree ? "will" : "won't");
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
__setup("initfree=", set_initfree);
|
||||
|
@ -134,9 +134,9 @@ void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t flags)
|
||||
}
|
||||
|
||||
#if defined(CONFIG_HIGHPTE)
|
||||
pte_t *_pte_offset_map(pmd_t *dir, unsigned long address, enum km_type type)
|
||||
pte_t *_pte_offset_map(pmd_t *dir, unsigned long address)
|
||||
{
|
||||
pte_t *pte = kmap_atomic(pmd_page(*dir), type) +
|
||||
pte_t *pte = kmap_atomic(pmd_page(*dir)) +
|
||||
(pmd_ptfn(*dir) << HV_LOG2_PAGE_TABLE_ALIGN) & ~PAGE_MASK;
|
||||
return &pte[pte_index(address)];
|
||||
}
|
||||
|
@ -33,18 +33,18 @@ struct stat {
|
||||
int st_blksize; /* Optimal block size for I/O. */
|
||||
int __pad2;
|
||||
long st_blocks; /* Number 512-byte blocks allocated. */
|
||||
int st_atime; /* Time of last access. */
|
||||
unsigned int st_atime_nsec;
|
||||
int st_mtime; /* Time of last modification. */
|
||||
unsigned int st_mtime_nsec;
|
||||
int st_ctime; /* Time of last status change. */
|
||||
unsigned int st_ctime_nsec;
|
||||
long st_atime; /* Time of last access. */
|
||||
unsigned long st_atime_nsec;
|
||||
long st_mtime; /* Time of last modification. */
|
||||
unsigned long st_mtime_nsec;
|
||||
long st_ctime; /* Time of last status change. */
|
||||
unsigned long st_ctime_nsec;
|
||||
unsigned int __unused4;
|
||||
unsigned int __unused5;
|
||||
};
|
||||
|
||||
#if __BITS_PER_LONG != 64
|
||||
/* This matches struct stat64 in glibc2.1. Only used for 32 bit. */
|
||||
#if __BITS_PER_LONG != 64 || defined(__ARCH_WANT_STAT64)
|
||||
struct stat64 {
|
||||
unsigned long long st_dev; /* Device. */
|
||||
unsigned long long st_ino; /* File serial number. */
|
||||
|
Loading…
Reference in New Issue
Block a user