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tty: serial: fsl_lpuart: Clear the error flags by writing 1 for lpuart32 platforms

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commit 282069845a upstream.

Do not read the data register to clear the error flags for lpuart32
platforms, the additional read may cause the receive FIFO underflow
since the DMA has already read the data register.
Actually all lpuart32 platforms support write 1 to clear those error
bits, let's use this method to better clear the error flags.

Fixes: 42b68768e5 ("serial: fsl_lpuart: DMA support for 32-bit variant")
Cc: stable <stable@kernel.org>
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Link: https://lore.kernel.org/r/20230801022304.24251-1-sherry.sun@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Sherry Sun
2023-08-01 10:23:04 +08:00
committed by Greg Kroah-Hartman
parent 31311a9a4b
commit 0693c8f134
1 changed files with 2 additions and 2 deletions
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4
drivers/tty/serial/fsl_lpuart.c
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@ -1125,8 +1125,8 @@ static void lpuart_copy_rx_to_tty(struct lpuart_port *sport)
unsigned long sr = lpuart32_read(&sport->port, UARTSTAT); unsigned long sr = lpuart32_read(&sport->port, UARTSTAT);
if (sr & (UARTSTAT_PE | UARTSTAT_FE)) { if (sr & (UARTSTAT_PE | UARTSTAT_FE)) {
/* Read DR to clear the error flags */ /* Clear the error flags */
lpuart32_read(&sport->port, UARTDATA); lpuart32_write(&sport->port, sr, UARTSTAT);
if (sr & UARTSTAT_PE) if (sr & UARTSTAT_PE)
sport->port.icount.parity++; sport->port.icount.parity++;