staging: sm750fb: rename getChipType to sm750_get_chip_type
Rename CamelCased function getChipType to sm750_get_chip_type (prefex with sm750 in order to make the context of the function clear). This issue was found by checkpatch.pl Signed-off-by: Moshe Green <mgmoshes@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -10,7 +10,7 @@
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#define roundedDiv(num, denom) ((2 * (num) + (denom)) / (2 * (denom)))
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#define MHz(x) ((x) * 1000000)
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logical_chip_type_t getChipType(void)
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logical_chip_type_t sm750_get_chip_type(void)
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{
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unsigned short physicalID;
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char physicalRev;
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@ -37,7 +37,7 @@ static unsigned int get_mxclk_freq(void)
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unsigned int pll_reg;
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unsigned int M, N, OD, POD;
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if (getChipType() == SM750LE)
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if (sm750_get_chip_type() == SM750LE)
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return MHz(130);
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pll_reg = PEEK32(MXCLK_PLL_CTRL);
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@ -60,7 +60,7 @@ static void setChipClock(unsigned int frequency)
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unsigned int ulActualMxClk;
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/* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */
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if (getChipType() == SM750LE)
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if (sm750_get_chip_type() == SM750LE)
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return;
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if (frequency) {
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@ -90,7 +90,7 @@ static void setMemoryClock(unsigned int frequency)
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/* Cheok_0509: For SM750LE, the memory clock is fixed.
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* Nothing to set.
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*/
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if (getChipType() == SM750LE)
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if (sm750_get_chip_type() == SM750LE)
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return;
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if (frequency) {
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@ -141,7 +141,7 @@ static void setMasterClock(unsigned int frequency)
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/* Cheok_0509: For SM750LE, the memory clock is fixed.
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* Nothing to set.
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*/
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if (getChipType() == SM750LE)
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if (sm750_get_chip_type() == SM750LE)
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return;
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if (frequency) {
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@ -182,7 +182,7 @@ unsigned int ddk750_getVMSize(void)
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unsigned int data;
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/* sm750le only use 64 mb memory*/
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if (getChipType() == SM750LE)
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if (sm750_get_chip_type() == SM750LE)
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return SZ_64M;
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/* for 750,always use power mode0*/
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@ -221,7 +221,7 @@ int ddk750_initHw(initchip_param_t *pInitParam)
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reg |= (CURRENT_GATE_DISPLAY | CURRENT_GATE_LOCALMEM);
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setCurrentGate(reg);
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if (getChipType() != SM750LE) {
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if (sm750_get_chip_type() != SM750LE) {
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/* set panel pll and graphic mode via mmio_88 */
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reg = PEEK32(VGA_CONFIGURATION);
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reg |= (VGA_CONFIGURATION_PLL | VGA_CONFIGURATION_MODE);
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@ -320,7 +320,7 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
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const int max_OD = 3;
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int max_d = 6;
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if (getChipType() == SM750LE) {
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if (sm750_get_chip_type() == SM750LE) {
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/* SM750LE don't have
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* programmable PLL and M/N values to work on.
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* Just return the requested clock.
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@ -69,7 +69,7 @@ typedef struct _initchip_param_t {
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}
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initchip_param_t;
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logical_chip_type_t getChipType(void);
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logical_chip_type_t sm750_get_chip_type(void);
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unsigned int calcPllValue(unsigned int request, pll_value_t *pll);
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unsigned int formatPllReg(pll_value_t *pPLL);
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void ddk750_set_mmio(void __iomem *, unsigned short, char);
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@ -117,7 +117,7 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll)
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if (pModeParam->horizontal_sync_polarity)
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tmp |= DISPLAY_CTRL_HSYNC_PHASE;
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if (getChipType() == SM750LE) {
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if (sm750_get_chip_type() == SM750LE) {
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displayControlAdjust_SM750LE(pModeParam, tmp);
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} else {
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reg = PEEK32(CRT_DISPLAY_CTRL) &
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@ -209,7 +209,7 @@ int ddk750_setModeTiming(mode_parameter_t *parm, clock_type_t clock)
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pll.clockType = clock;
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uiActualPixelClk = calcPllValue(parm->pixel_clock, &pll);
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if (getChipType() == SM750LE) {
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if (sm750_get_chip_type() == SM750LE) {
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/* set graphic mode via IO method */
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outb_p(0x88, 0x3d4);
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outb_p(0x06, 0x3d5);
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@ -6,7 +6,7 @@ void ddk750_setDPMS(DPMS_t state)
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{
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unsigned int value;
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if (getChipType() == SM750LE) {
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if (sm750_get_chip_type() == SM750LE) {
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value = PEEK32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_DPMS_MASK;
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value |= (state << CRT_DISPLAY_CTRL_DPMS_SHIFT);
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POKE32(CRT_DISPLAY_CTRL, value);
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@ -19,7 +19,7 @@ void ddk750_setDPMS(DPMS_t state)
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static unsigned int getPowerMode(void)
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{
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if (getChipType() == SM750LE)
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if (sm750_get_chip_type() == SM750LE)
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return 0;
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return PEEK32(POWER_MODE_CTRL) & POWER_MODE_CTRL_MODE_MASK;
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}
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@ -35,7 +35,7 @@ void setPowerMode(unsigned int powerMode)
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control_value = PEEK32(POWER_MODE_CTRL) & ~POWER_MODE_CTRL_MODE_MASK;
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if (getChipType() == SM750LE)
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if (sm750_get_chip_type() == SM750LE)
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return;
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switch (powerMode) {
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@ -403,7 +403,7 @@ long sm750_sw_i2c_init(
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if ((clk_gpio > 31) || (data_gpio > 31))
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return -1;
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if (getChipType() == SM750LE)
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if (sm750_get_chip_type() == SM750LE)
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return sm750le_i2c_init(clk_gpio, data_gpio);
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/* Initialize the GPIO pin for the i2c Clock Register */
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@ -91,7 +91,7 @@ int hw_sm750_inithw(struct sm750_dev *sm750_dev, struct pci_dev *pdev)
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parm = &sm750_dev->initParm;
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if (parm->chip_clk == 0)
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parm->chip_clk = (getChipType() == SM750LE) ?
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parm->chip_clk = (sm750_get_chip_type() == SM750LE) ?
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DEFAULT_SM750LE_CHIP_CLOCK :
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DEFAULT_SM750_CHIP_CLOCK;
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@ -107,7 +107,7 @@ int hw_sm750_inithw(struct sm750_dev *sm750_dev, struct pci_dev *pdev)
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PEEK32(SYSTEM_CTRL) | SYSTEM_CTRL_PCI_BURST);
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}
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if (getChipType() != SM750LE) {
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if (sm750_get_chip_type() != SM750LE) {
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unsigned int val;
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/* does user need CRT? */
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if (sm750_dev->nocrt) {
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@ -183,7 +183,7 @@ int hw_sm750_output_setMode(struct lynxfb_output *output,
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dispSet = 0;
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channel = *output->channel;
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if (getChipType() != SM750LE) {
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if (sm750_get_chip_type() != SM750LE) {
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if (channel == sm750_primary) {
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pr_info("primary channel\n");
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if (output->paths & sm750_panel)
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@ -471,7 +471,7 @@ void hw_sm750_initAccel(struct sm750_dev *sm750_dev)
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enable2DEngine(1);
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if (getChipType() == SM750LE) {
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if (sm750_get_chip_type() == SM750LE) {
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reg = PEEK32(DE_STATE1);
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reg |= DE_STATE1_DE_ABORT;
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POKE32(DE_STATE1, reg);
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