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arm64: dts: qcom: sc7280: Add secondary MI2S pinmux specifications for CRD 3.0/3.1

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Add drive strength property for secondary MI2S on
sc7280 based platforms of rev5+ (aka CRD 3.0/3.1) boards.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1655108645-1517-3-git-send-email-quic_srivasam@quicinc.com
This commit is contained in:
Srinivasa Rao Mandadapu 2022-06-13 13:54:03 +05:30 committed by Bjorn Andersson
parent b9e3f65ecf
commit 06c73a39c3
2 changed files with 21 additions and 0 deletions
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20
arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi Normal file
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@ -0,0 +1,20 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* sc7280 device tree source for boards using Max98360 and wcd9385 codec
*
* Copyright (c) 2022, The Linux Foundation. All rights reserved.
*/
&mi2s1_data0 {
drive-strength = <6>;
bias-disable;
};
&mi2s1_sclk {
drive-strength = <6>;
bias-disable;
};
&mi2s1_ws {
drive-strength = <6>;
};

1
arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
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@ -8,6 +8,7 @@
/dts-v1/;
#include "sc7280-herobrine.dtsi"
#include "sc7280-herobrine-audio-wcd9385.dtsi"
/ {
model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+)";