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Visconti device tree updates for 5.16

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- Add DT support for Toshiba Visconti5 PCIe driver
  - Add 150MHz fixed clock to TMPV7708 SoC
  - Add DT support for VisROBO VRB boardi
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Merge tag 'visconti-arm-dt-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti into arm/dt

Visconti device tree updates for 5.16

 - Add DT support for Toshiba Visconti5 PCIe driver
 - Add 150MHz fixed clock to TMPV7708 SoC
 - Add DT support for VisROBO VRB boardi

* tag 'visconti-arm-dt-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti:
  arm64: dts: visconti: Add DTS for the VisROBO board
  dt-bindings: arm: toshiba: Add the TMPV7708 VisROBO VRB board
  arm64: dts: visconti: Add 150MHz fixed clock to TMPV7708 SoC
  arm64: dts: visconti: Add PCIe host controller support for TMPV7708 SoC

Link: https://lore.kernel.org/r/YWoH3g7vU1ZEAp+P@toshiba.co.jp
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-10-20 14:59:16 +02:00
commit 06ddf8fb43
6 changed files with 172 additions and 0 deletions
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1
Documentation/devicetree/bindings/arm/toshiba.yaml
View File

@ -18,6 +18,7 @@ properties:
items:
- enum:
- toshiba,tmpv7708-rm-mbrc # TMPV7708 RM main board
- toshiba,tmpv7708-visrobo-vrb # TMPV7708 VisROBO VRB board
- const: toshiba,tmpv7708
additionalProperties: true

1
arch/arm64/boot/dts/toshiba/Makefile
View File

@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_VISCONTI) += tmpv7708-rm-mbrc.dtb
dtb-$(CONFIG_ARCH_VISCONTI) += tmpv7708-visrobo-vrb.dtb

6
arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts
View File

@ -76,3 +76,9 @@
&pwm {
status = "okay";
};
&pcie {
status = "okay";
clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>;
clock-names = "ref", "core", "aux";
};

61
arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts Normal file
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@ -0,0 +1,61 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree File for TMPV7708 VisROBO VRB board
*
* (C) Copyright 2020, 2021, Toshiba Corporation.
* (C) Copyright 2020, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
*/
/dts-v1/;
#include "tmpv7708-visrobo-vrc.dtsi"
/ {
model = "Toshiba TMPV7708 VisROBO (VRB) board";
compatible = "toshiba,tmpv7708-visrobo-vrb", "toshiba,tmpv7708";
aliases {
serial0 = &uart0;
serial1 = &uart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
/* 768MB memory */
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x30000000>;
};
};
&uart0 {
status = "okay";
clocks = <&uart_clk>;
clock-names = "apb_pclk";
};
&uart1 {
status = "okay";
clocks = <&uart_clk>;
clock-names = "apb_pclk";
};
&piether {
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
clocks = <&clk300mhz>, <&clk125mhz>;
clock-names = "stmmaceth", "phy_ref_clk";
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@1 {
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};

44
arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi Normal file
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@ -0,0 +1,44 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree File for TMPV7708 VisROBO VRC SoM
*
* (C) Copyright 2020, 2021, Toshiba Corporation.
* (C) Copyright 2020, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
*/
/dts-v1/;
#include "tmpv7708.dtsi"
#include <dt-bindings/gpio/gpio.h>
&wdt {
status = "okay";
clocks = <&wdt_clk>;
};
&gpio {
status = "okay";
};
&spi0_pins {
groups = "spi0_grp", "spi0_cs0_grp";
};
&spi0 {
status = "okay";
clocks = <&clk300mhz>, <&clk150mhz>;
clock-names = "sspclk", "apb_pclk";
mmc-slot@0 {
compatible = "mmc-spi-slot";
reg = <0>;
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
voltage-ranges = <3200 3400>;
spi-max-frequency = <12000000>;
};
};
&i2c0 {
status = "okay";
clocks = <&clk150mhz>;
};

59
arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
View File

@ -134,6 +134,13 @@
#clock-cells = <0>;
};
clk25mhz: clk25mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
clock-output-names = "clk25mhz";
};
clk125mhz: clk125mhz {
compatible = "fixed-clock";
clock-frequency = <125000000>;
@ -141,6 +148,13 @@
clock-output-names = "clk125mhz";
};
clk150mhz: clk150mhz {
compatible = "fixed-clock";
clock-frequency = <150000000>;
#clock-cells = <0>;
clock-output-names = "clk150mhz";
};
clk300mhz: clk300mhz {
compatible = "fixed-clock";
clock-frequency = <300000000>;
@ -148,6 +162,20 @@
clock-output-names = "clk300mhz";
};
clk600mhz: clk600mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <600000000>;
clock-output-names = "clk600mhz";
};
extclk100mhz: extclk100mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
clock-output-names = "extclk100mhz";
};
wdt_clk: wdt-clk {
compatible = "fixed-clock";
clock-frequency = <150000000>;
@ -441,6 +469,37 @@
#pwm-cells = <2>;
status = "disabled";
};
pcie: pcie@28400000 {
compatible = "toshiba,visconti-pcie";
reg = <0x0 0x28400000 0x0 0x00400000>,
<0x0 0x70000000 0x0 0x10000000>,
<0x0 0x28050000 0x0 0x00010000>,
<0x0 0x24200000 0x0 0x00002000>,
<0x0 0x24162000 0x0 0x00001000>;
reg-names = "dbi", "config", "ulreg", "smu", "mpu";
device_type = "pci";
bus-range = <0x00 0xff>;
num-lanes = <2>;
num-viewport = <8>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x81000000 0 0x40000000 0 0x40000000 0 0x00010000
0x82000000 0 0x50000000 0 0x50000000 0 0x20000000>;
interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi", "intr";
interrupt-map-mask = <0 0 0 7>;
interrupt-map =
<0 0 0 1 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
0 0 0 2 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
0 0 0 3 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
0 0 0 4 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
max-link-speed = <2>;
status = "disabled";
};
};
};